[301a2a3c] | 1 | void break_when_you_get_here(); |
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[c932d85] | 2 | /* |
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| 3 | ******************************************************************* |
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| 4 | ******************************************************************* |
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| 5 | ** ** |
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| 6 | ** RTEMS/KA9Q DRIVER FOR NATIONAL DP83932 `SONIC' ** |
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| 7 | ** SYSTEMS-ORIENTED NETWORK INTERFACE CONTROLLER ** |
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| 8 | ** ** |
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| 9 | ******************************************************************* |
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| 10 | ******************************************************************* |
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| 11 | */ |
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| 12 | |
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| 13 | /* |
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| 14 | * $Revision$ $Date$ $Author$ |
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| 15 | * $State$ |
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| 16 | */ |
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| 17 | |
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| 18 | /* |
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| 19 | * References: |
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| 20 | * 1) DP83932C-20/25/33 MHz SONIC(TM) Systems-Oriented Network Interface |
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| 21 | * Controller data sheet. TL/F/10492, RRD-B30M105, National Semiconductor, |
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| 22 | * 1995. |
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| 23 | * |
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| 24 | * 2) Software Driver Programmer's Guide for the DP83932 SONIC(TM), |
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| 25 | * Application Note 746, Wesley Lee and Mike Lui, TL/F/11140, |
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| 26 | * RRD-B30M75, National Semiconductor, March, 1991. |
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| 27 | * |
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| 28 | * 3) SVME/DMV-171 Single Board Computer Documentation Package, #805905, |
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| 29 | * DY 4 Systems Inc., Kanata, Ontario, September, 1996. |
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| 30 | */ |
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[7fc5d54e] | 31 | |
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[c932d85] | 32 | #include "sonic.h" |
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| 33 | |
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| 34 | #include <rtems/error.h> |
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| 35 | #include <ka9q/rtems_ka9q.h> |
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| 36 | #include <ka9q/global.h> |
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| 37 | #include <ka9q/domain.h> |
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| 38 | #include <ka9q/enet.h> |
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| 39 | #include <ka9q/iface.h> |
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| 40 | #include <ka9q/netuser.h> |
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| 41 | #include <ka9q/trace.h> |
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| 42 | #include <ka9q/commands.h> |
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| 43 | |
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[e995f3a1] | 44 | /* |
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| 45 | * Debug levels |
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| 46 | * |
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| 47 | */ |
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| 48 | |
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| 49 | #define SONIC_DEBUG_NONE 0x0000 |
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| 50 | #define SONIC_DEBUG_ALL 0xFFFF |
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| 51 | #define SONIC_DEBUG_PRINT_REGISTERS 0x0001 |
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| 52 | #define SONIC_DEBUG_MEMORY 0x0002 |
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[e70a8f16] | 53 | #define SONIC_DEBUG_MEMORY_ALLOCATE 0x0004 |
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[301a2a3c] | 54 | #define SONIC_DEBUG_FRAGMENTS 0x0008 |
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| 55 | #define SONIC_DEBUG_CAM 0x0008 |
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| 56 | |
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| 57 | #define SONIC_DEBUG (SONIC_DEBUG_MEMORY|SONIC_DEBUG_CAM) |
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| 58 | /* SONIC_DEBUG_ALL */ |
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[e995f3a1] | 59 | |
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| 60 | |
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[fa655207] | 61 | /* |
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| 62 | * XXX |
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| 63 | */ |
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| 64 | |
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| 65 | #include <dmv170.h> |
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| 66 | |
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[7fc5d54e] | 67 | /* |
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| 68 | * Use the top line if you want more symbols. |
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| 69 | */ |
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| 70 | |
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| 71 | #define SONIC_STATIC |
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| 72 | /* #define SONIC_STATIC static */ |
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| 73 | |
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[c932d85] | 74 | /* |
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| 75 | * Number of devices supported by this driver |
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| 76 | */ |
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| 77 | #ifndef NSONIC |
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| 78 | # define NSONIC 1 |
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| 79 | #endif |
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| 80 | |
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| 81 | /* |
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| 82 | * Default location of device registers |
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| 83 | */ |
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| 84 | #ifndef SONIC_BASE_ADDRESS |
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| 85 | # define SONIC_BASE_ADDRESS 0xF3000000 |
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| 86 | # warning "Using default SONIC_BASE_ADDRESS." |
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| 87 | #endif |
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| 88 | |
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| 89 | /* |
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| 90 | * Default interrupt vector |
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| 91 | */ |
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| 92 | #ifndef SONIC_VECTOR |
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| 93 | # define SONIC_VECTOR 1 |
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| 94 | # warning "Using default SONIC_VECTOR." |
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| 95 | #endif |
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| 96 | |
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| 97 | /* |
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| 98 | * Default device configuration register values |
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| 99 | * Conservative, generic values. |
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| 100 | * DCR: |
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| 101 | * No extended bus mode |
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| 102 | * Unlatched bus retry |
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| 103 | * Programmable outputs unused |
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| 104 | * Asynchronous bus mode |
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| 105 | * User definable pins unused |
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| 106 | * No wait states (access time controlled by DTACK*) |
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| 107 | * 32-bit DMA |
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| 108 | * Empty/Fill DMA mode |
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| 109 | * Maximum Transmit/Receive FIFO |
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| 110 | * DC2: |
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| 111 | * Extended programmable outputs unused |
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| 112 | * Normal HOLD request |
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| 113 | * Packet compress output unused |
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| 114 | * No reject on CAM match |
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| 115 | */ |
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[dddc0557] | 116 | #define SONIC_DCR \ |
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| 117 | (DCR_DW32 | DCR_WAIT0 | DCR_PO0 | DCR_PO1 | DCR_RFT24 | DCR_TFT28) |
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[c932d85] | 118 | #ifndef SONIC_DCR |
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[dddc0557] | 119 | # define SONIC_DCR (DCR_DW32 | DCR_TFT28) |
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[c932d85] | 120 | #endif |
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| 121 | #ifndef SONIC_DC2 |
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| 122 | # define SONIC_DC2 (0) |
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| 123 | #endif |
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| 124 | |
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| 125 | /* |
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| 126 | * Default sizes of transmit and receive descriptor areas |
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| 127 | */ |
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| 128 | #define RDA_COUNT 20 |
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| 129 | #define TDA_COUNT 10 |
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| 130 | |
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| 131 | /* |
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| 132 | * |
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| 133 | * As suggested by National Application Note 746, make the |
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| 134 | * receive resource area bigger than the receive descriptor area. |
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| 135 | */ |
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| 136 | #define RRA_EXTRA_COUNT 3 |
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| 137 | |
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| 138 | /* |
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| 139 | * RTEMS event used by interrupt handler to signal daemons. |
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| 140 | */ |
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| 141 | #define INTERRUPT_EVENT RTEMS_EVENT_1 |
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| 142 | |
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| 143 | /* |
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| 144 | * Largest Ethernet frame. |
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| 145 | */ |
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| 146 | #define MAXIMUM_FRAME_SIZE 1518 |
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| 147 | |
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| 148 | /* |
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| 149 | * Receive buffer size. |
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| 150 | * Allow for a pointer, plus a full ethernet frame (including Frame |
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| 151 | * Check Sequence) rounded up to a 4-byte boundary. |
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| 152 | */ |
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| 153 | #define RBUF_SIZE ((sizeof (void *) + (MAXIMUM_FRAME_SIZE) + 3) & ~3) |
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| 154 | #define RBUF_WC ((((MAXIMUM_FRAME_SIZE) + 3) & ~3) / 2) |
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| 155 | |
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| 156 | /* |
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| 157 | * Macros for manipulating 32-bit pointers as 16-bit fragments |
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| 158 | */ |
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| 159 | #define LSW(p) ((rtems_unsigned16)((rtems_unsigned32)(p))) |
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| 160 | #define MSW(p) ((rtems_unsigned16)((rtems_unsigned32)(p) >> 16)) |
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| 161 | #define PTR(m,l) ((void*)(((rtems_unsigned16)(m)<<16)|(rtems_unsigned16)(l))) |
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| 162 | |
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| 163 | /* |
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| 164 | * Hardware-specific storage |
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| 165 | */ |
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| 166 | struct sonic { |
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| 167 | /* |
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| 168 | * Connection to KA9Q |
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| 169 | */ |
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| 170 | struct iface *iface; |
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| 171 | |
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| 172 | /* |
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| 173 | * Default location of device registers |
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| 174 | * ===CACHE=== |
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| 175 | * This area must be non-cacheable, guarded. |
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| 176 | */ |
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[7fc5d54e] | 177 | void *sonic; |
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[c932d85] | 178 | |
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| 179 | /* |
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| 180 | * Interrupt vector |
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| 181 | */ |
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| 182 | rtems_vector_number vector; |
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| 183 | |
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| 184 | /* |
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| 185 | * Task waiting for transmit resources |
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| 186 | */ |
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| 187 | rtems_id txWaitTid; |
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| 188 | |
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| 189 | /* |
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| 190 | * Receive resource area |
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| 191 | */ |
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| 192 | int rdaCount; |
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| 193 | ReceiveResourcePointer_t rsa; |
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[301a2a3c] | 194 | CamDescriptorPointer_t cdp; |
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[e70a8f16] | 195 | ReceiveDescriptorPointer_t rda; |
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[dddc0557] | 196 | ReceiveDescriptorPointer_t rdp_last; |
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[c932d85] | 197 | |
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| 198 | /* |
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| 199 | * Transmit descriptors |
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| 200 | */ |
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[e70a8f16] | 201 | int tdaCount; |
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[c932d85] | 202 | TransmitDescriptorPointer_t tdaHead; /* Last filled */ |
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| 203 | TransmitDescriptorPointer_t tdaTail; /* Next to retire */ |
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| 204 | int tdaActiveCount; |
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| 205 | |
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| 206 | /* |
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| 207 | * Statistics |
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| 208 | */ |
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[c153a7b] | 209 | unsigned long Interrupts; |
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[c932d85] | 210 | unsigned long rxInterrupts; |
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| 211 | unsigned long rxMissed; |
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| 212 | unsigned long rxGiant; |
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| 213 | unsigned long rxNonOctet; |
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| 214 | unsigned long rxBadCRC; |
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| 215 | unsigned long rxCollision; |
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| 216 | |
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| 217 | unsigned long txInterrupts; |
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| 218 | unsigned long txSingleCollision; |
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| 219 | unsigned long txMultipleCollision; |
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| 220 | unsigned long txCollision; |
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| 221 | unsigned long txDeferred; |
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| 222 | unsigned long txUnderrun; |
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| 223 | unsigned long txLateCollision; |
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| 224 | unsigned long txExcessiveCollision; |
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| 225 | unsigned long txExcessiveDeferral; |
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| 226 | unsigned long txLostCarrier; |
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| 227 | unsigned long txRawWait; |
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| 228 | }; |
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[7fc5d54e] | 229 | SONIC_STATIC struct sonic sonic[NSONIC]; |
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[c932d85] | 230 | |
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| 231 | /* |
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| 232 | ****************************************************************** |
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| 233 | * * |
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| 234 | * Support Routines * |
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| 235 | * * |
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| 236 | ****************************************************************** |
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| 237 | */ |
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| 238 | |
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[7fc5d54e] | 239 | void sonic_write_register( |
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| 240 | void *base, |
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| 241 | unsigned32 regno, |
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| 242 | unsigned32 value |
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| 243 | ); |
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| 244 | |
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| 245 | unsigned32 sonic_read_register( |
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| 246 | void *base, |
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| 247 | unsigned32 regno |
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| 248 | ); |
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| 249 | |
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[c932d85] | 250 | /* |
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| 251 | * Allocate non-cacheable memory on a single 64k page. |
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| 252 | * Very simple minded -- just keeps trying till the memory is on a single page. |
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| 253 | */ |
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[301a2a3c] | 254 | SONIC_STATIC void * sonic_allocate(unsigned int nbytes) |
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[c932d85] | 255 | { |
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| 256 | void *p; |
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| 257 | unsigned long a1, a2; |
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| 258 | |
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| 259 | for (;;) { |
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| 260 | /* |
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| 261 | * ===CACHE=== |
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| 262 | * Change malloc to malloc_noncacheable_guarded. |
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| 263 | */ |
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[dddc0557] | 264 | p = calloc(1, nbytes); |
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[c932d85] | 265 | if (p == NULL) |
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| 266 | rtems_panic ("No memory!"); |
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| 267 | a1 = (unsigned long)p; |
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| 268 | a2 = a1 + nbytes - 1; |
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| 269 | if ((a1 >> 16) == (a2 >> 16)) |
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| 270 | break; |
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| 271 | } |
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[e70a8f16] | 272 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY_ALLOCATE) |
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[dddc0557] | 273 | printf( "sonic_allocate %d bytes at %p\n", nbytes, p ); |
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| 274 | #endif |
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[c932d85] | 275 | return p; |
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| 276 | } |
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| 277 | |
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| 278 | /* |
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| 279 | * Shut down the interface. |
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| 280 | * This is a pretty simple-minded routine. It doesn't worry |
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| 281 | * about cleaning up mbufs, shutting down daemons, etc. |
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| 282 | */ |
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[7fc5d54e] | 283 | |
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| 284 | SONIC_STATIC int sonic_stop (struct iface *iface) |
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[c932d85] | 285 | { |
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| 286 | int i; |
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| 287 | struct sonic *dp = &sonic[iface->dev]; |
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[7fc5d54e] | 288 | void *rp = dp->sonic; |
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[c932d85] | 289 | |
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| 290 | /* |
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| 291 | * Stop the transmitter and receiver. |
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| 292 | */ |
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[7fc5d54e] | 293 | sonic_write_register( rp, SONIC_REG_CR, CR_HTX | CR_RXDIS ); |
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[c932d85] | 294 | |
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| 295 | /* |
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| 296 | * Wait for things to stop. |
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| 297 | * For safety's sake, there is an alternate exit. |
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| 298 | */ |
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| 299 | i = 0; |
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[7fc5d54e] | 300 | while (sonic_read_register( rp, SONIC_REG_CR ) & (CR_RXEN | CR_TXP)) { |
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[c932d85] | 301 | if (++i == 10000) |
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| 302 | break; |
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| 303 | } |
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| 304 | |
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| 305 | /* |
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| 306 | * Reset the device |
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| 307 | */ |
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[7fc5d54e] | 308 | sonic_write_register( rp, SONIC_REG_CR, CR_RST ); |
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| 309 | sonic_write_register( rp, SONIC_REG_IMR, 0 ); |
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[c932d85] | 310 | return 0; |
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| 311 | } |
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| 312 | |
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| 313 | /* |
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| 314 | * Show interface statistics |
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| 315 | */ |
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[7fc5d54e] | 316 | |
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| 317 | SONIC_STATIC void sonic_show (struct iface *iface) |
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[c932d85] | 318 | { |
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| 319 | struct sonic *dp = &sonic[iface->dev]; |
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| 320 | |
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[c153a7b] | 321 | printf (" Total Interrupts:%-8lu", dp->Interrupts); |
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[c932d85] | 322 | printf (" Rx Interrupts:%-8lu", dp->rxInterrupts); |
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| 323 | printf (" Giant:%-8lu", dp->rxGiant); |
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| 324 | printf (" Non-octet:%-8lu\n", dp->rxNonOctet); |
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| 325 | printf (" Bad CRC:%-8lu", dp->rxBadCRC); |
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| 326 | printf (" Collision:%-8lu", dp->rxCollision); |
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| 327 | printf (" Missed:%-8lu\n", dp->rxMissed); |
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| 328 | |
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| 329 | printf ( " Tx Interrupts:%-8lu", dp->txInterrupts); |
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| 330 | printf ( " Deferred:%-8lu", dp->txDeferred); |
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| 331 | printf (" Lost Carrier:%-8lu\n", dp->txLostCarrier); |
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| 332 | printf ( "Single Collisions:%-8lu", dp->txSingleCollision); |
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| 333 | printf ( "Multiple Collisions:%-8lu", dp->txMultipleCollision); |
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| 334 | printf ("Excessive Collisions:%-8lu\n", dp->txExcessiveCollision); |
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| 335 | printf ( " Total Collisions:%-8lu", dp->txCollision); |
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| 336 | printf ( " Late Collision:%-8lu", dp->txLateCollision); |
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| 337 | printf (" Underrun:%-8lu\n", dp->txUnderrun); |
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| 338 | printf ( " Raw output wait:%-8lu\n", dp->txRawWait); |
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| 339 | } |
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| 340 | |
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| 341 | /* |
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| 342 | ****************************************************************** |
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| 343 | * * |
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| 344 | * Interrupt Handler * |
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| 345 | * * |
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| 346 | ****************************************************************** |
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| 347 | */ |
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[7fc5d54e] | 348 | |
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| 349 | SONIC_STATIC rtems_isr sonic_interrupt_handler (rtems_vector_number v) |
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[c932d85] | 350 | { |
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| 351 | struct sonic *dp = sonic; |
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[7fc5d54e] | 352 | void *rp; |
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[c932d85] | 353 | |
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| 354 | #if (NSONIC > 1) |
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| 355 | /* |
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| 356 | * Find the device which requires service |
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| 357 | */ |
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| 358 | for (;;) { |
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| 359 | if (dp->vector == v) |
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| 360 | break; |
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| 361 | if (++dp == &sonic[NSONIC]) |
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| 362 | return; /* Spurious interrupt? */ |
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| 363 | } |
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| 364 | #endif /* NSONIC > 1 */ |
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| 365 | |
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| 366 | /* |
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| 367 | * Get pointer to SONIC registers |
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| 368 | */ |
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| 369 | rp = dp->sonic; |
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| 370 | |
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[c153a7b] | 371 | dp->Interrupts++; |
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| 372 | |
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[c932d85] | 373 | /* |
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| 374 | * Packet received or receive buffer area exceeded? |
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| 375 | */ |
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[7fc5d54e] | 376 | if ((sonic_read_register( rp, SONIC_REG_IMR ) & (IMR_PRXEN | IMR_RBAEEN)) && |
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| 377 | (sonic_read_register( rp, SONIC_REG_ISR ) & (ISR_PKTRX | ISR_RBAE))) { |
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| 378 | sonic_write_register( |
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| 379 | rp, |
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| 380 | SONIC_REG_IMR, |
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| 381 | sonic_read_register( rp, SONIC_REG_IMR) & ~(IMR_PRXEN | IMR_RBAEEN) |
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| 382 | ); |
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[c932d85] | 383 | dp->rxInterrupts++; |
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| 384 | rtems_event_send (dp->iface->rxproc, INTERRUPT_EVENT); |
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| 385 | } |
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| 386 | |
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| 387 | /* |
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| 388 | * Packet started, transmitter done or transmitter error? |
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| 389 | */ |
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[7fc5d54e] | 390 | if ((sonic_read_register( rp, SONIC_REG_IMR ) & (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN)) |
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| 391 | && (sonic_read_register( rp, SONIC_REG_ISR ) & (ISR_PINT | ISR_TXDN | ISR_TXER))) { |
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| 392 | sonic_write_register( |
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| 393 | rp, |
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| 394 | SONIC_REG_IMR, |
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| 395 | sonic_read_register( rp, SONIC_REG_IMR) & |
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| 396 | ~(IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) |
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| 397 | ); |
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[c932d85] | 398 | dp->txInterrupts++; |
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| 399 | rtems_event_send (dp->txWaitTid, INTERRUPT_EVENT); |
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| 400 | } |
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| 401 | } |
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| 402 | |
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| 403 | /* |
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| 404 | ****************************************************************** |
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| 405 | * * |
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| 406 | * Transmitter Routines * |
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| 407 | * * |
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| 408 | ****************************************************************** |
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| 409 | */ |
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| 410 | |
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| 411 | /* |
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| 412 | * Soak up transmit descriptors that have been sent. |
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| 413 | */ |
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[7fc5d54e] | 414 | |
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| 415 | SONIC_STATIC void sonic_retire_tda (struct sonic *dp) |
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[c932d85] | 416 | { |
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| 417 | rtems_unsigned16 status; |
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| 418 | unsigned int collisions; |
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| 419 | |
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| 420 | /* |
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| 421 | * Repeat for all completed transmit descriptors. |
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| 422 | */ |
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| 423 | while ((dp->tdaActiveCount != 0) |
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| 424 | && ((status = dp->tdaTail->status) != 0)) { |
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[301a2a3c] | 425 | |
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[3fbd528] | 426 | printf( "retire TDA %p (0x%04x)\n", dp->tdaTail, status ); |
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[c932d85] | 427 | /* |
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| 428 | * Check for errors which stop the transmitter. |
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| 429 | */ |
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| 430 | if (status & (TDA_STATUS_EXD | |
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| 431 | TDA_STATUS_EXC | |
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| 432 | TDA_STATUS_FU | |
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| 433 | TDA_STATUS_BCM)) { |
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| 434 | /* |
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| 435 | * Restart the transmitter if there are |
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| 436 | * packets waiting to go. |
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| 437 | */ |
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| 438 | rtems_unsigned16 link; |
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| 439 | link = *(dp->tdaTail->linkp); |
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| 440 | |
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| 441 | if ((link & TDA_LINK_EOL) == 0) { |
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[7fc5d54e] | 442 | void *rp = dp->sonic; |
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[c932d85] | 443 | |
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[7fc5d54e] | 444 | sonic_write_register( rp, SONIC_REG_CTDA, link ); |
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| 445 | sonic_write_register( rp, SONIC_REG_CR, CR_TXP ); |
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[c932d85] | 446 | } |
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| 447 | } |
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| 448 | |
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| 449 | /* |
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| 450 | * Update network statistics |
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| 451 | */ |
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| 452 | collisions = (status & TDA_STATUS_COLLISION_MASK) >> TDA_STATUS_COLLISION_SHIFT; |
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| 453 | if (collisions) { |
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| 454 | if (collisions == 1) |
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| 455 | dp->txSingleCollision++; |
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| 456 | else |
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| 457 | dp->txMultipleCollision++; |
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| 458 | dp->txCollision += collisions; |
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| 459 | } |
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| 460 | if (status & TDA_STATUS_EXC) |
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| 461 | dp->txExcessiveCollision++; |
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| 462 | if (status & TDA_STATUS_OWC) |
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| 463 | dp->txLateCollision++; |
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| 464 | if (status & TDA_STATUS_EXD) |
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| 465 | dp->txExcessiveDeferral++; |
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| 466 | if (status & TDA_STATUS_DEF) |
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| 467 | dp->txDeferred++; |
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| 468 | if (status & TDA_STATUS_FU) |
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| 469 | dp->txUnderrun++; |
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| 470 | if (status & TDA_STATUS_CRSL) |
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| 471 | dp->txLostCarrier++; |
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| 472 | |
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| 473 | /* |
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| 474 | * Free the packet |
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| 475 | */ |
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| 476 | dp->tdaActiveCount--; |
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| 477 | free_p ((struct mbuf **)&dp->tdaTail->mbufp); |
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| 478 | |
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[339737b] | 479 | /* XXX this does not help when you wrap |
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| 480 | dp->tdaTail->frag_count = 1; |
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| 481 | dp->tdaTail->frag[0].frag_link = LSW(dp->tdaTail->link_pad); |
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| 482 | */ |
---|
| 483 | |
---|
[c932d85] | 484 | /* |
---|
| 485 | * Move to the next transmit descriptor |
---|
| 486 | */ |
---|
| 487 | dp->tdaTail = dp->tdaTail->next; |
---|
[3fbd528] | 488 | printf( "next TDA %p\n", dp->tdaTail ); |
---|
[c932d85] | 489 | } |
---|
| 490 | } |
---|
| 491 | |
---|
| 492 | /* |
---|
| 493 | * Send raw packet (caller provides header). |
---|
| 494 | * This code runs in the context of the interface transmit |
---|
| 495 | * task (most packets) or in the context of the network |
---|
| 496 | * task (for ARP requests). |
---|
| 497 | */ |
---|
[7fc5d54e] | 498 | |
---|
| 499 | SONIC_STATIC int sonic_raw (struct iface *iface, struct mbuf **bpp) |
---|
[c932d85] | 500 | { |
---|
| 501 | struct sonic *dp = &sonic[iface->dev]; |
---|
[7fc5d54e] | 502 | void *rp = dp->sonic; |
---|
[c932d85] | 503 | struct mbuf *bp; |
---|
| 504 | TransmitDescriptorPointer_t tdp; |
---|
| 505 | volatile struct TransmitDescriptorFragLink *fp; |
---|
| 506 | unsigned int packetSize; |
---|
| 507 | int i; |
---|
| 508 | static char padBuf[64]; |
---|
| 509 | |
---|
| 510 | /* |
---|
| 511 | * Update the log. |
---|
| 512 | */ |
---|
| 513 | iface->rawsndcnt++; |
---|
| 514 | iface->lastsent = secclock (); |
---|
| 515 | dump (iface, IF_TRACE_OUT, *bpp); |
---|
| 516 | |
---|
| 517 | /* |
---|
| 518 | * It would not do to have two tasks active in the transmit |
---|
| 519 | * loop at the same time. |
---|
| 520 | * The blocking is simple-minded since the odds of two tasks |
---|
| 521 | * simultaneously attempting to use this code are low. The only |
---|
| 522 | * way that two tasks can try to run here is: |
---|
| 523 | * 1) Task A enters this code and ends up having to |
---|
| 524 | * wait for a transmit buffer descriptor. |
---|
| 525 | * 2) Task B gains control and tries to transmit a packet. |
---|
| 526 | * The RTEMS/KA9Q scheduling semaphore ensures that there |
---|
| 527 | * are no race conditions associated with manipulating the |
---|
| 528 | * txWaitTid variable. |
---|
| 529 | */ |
---|
| 530 | if (dp->txWaitTid) { |
---|
| 531 | dp->txRawWait++; |
---|
| 532 | while (dp->txWaitTid) |
---|
| 533 | rtems_ka9q_ppause (10); |
---|
| 534 | } |
---|
| 535 | |
---|
| 536 | /* |
---|
| 537 | * Free up transmit descriptors. |
---|
| 538 | */ |
---|
| 539 | sonic_retire_tda (dp); |
---|
| 540 | |
---|
| 541 | /* |
---|
| 542 | * Wait for transmit descriptor to become available. |
---|
| 543 | */ |
---|
| 544 | if (dp->tdaActiveCount == dp->tdaCount) { |
---|
[c153a7b] | 545 | puts( "Wait for more TDAs" ); |
---|
[c932d85] | 546 | /* |
---|
| 547 | * Find out who we are |
---|
| 548 | */ |
---|
| 549 | if (dp->txWaitTid == 0) |
---|
| 550 | rtems_task_ident (RTEMS_SELF, 0, &dp->txWaitTid); |
---|
| 551 | |
---|
| 552 | /* |
---|
| 553 | * Clear old events. |
---|
| 554 | */ |
---|
[7fc5d54e] | 555 | sonic_write_register( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); |
---|
[c932d85] | 556 | |
---|
| 557 | /* |
---|
| 558 | * Wait for transmit descriptor to become available. |
---|
| 559 | * Note that the transmit descriptors are checked |
---|
| 560 | * *before* * entering the wait loop -- this catches |
---|
| 561 | * the possibility that a transmit descriptor became |
---|
| 562 | * available between the `if' the started this block, |
---|
| 563 | * and the clearing of the interrupt status register. |
---|
| 564 | */ |
---|
| 565 | sonic_retire_tda (dp); |
---|
| 566 | while (dp->tdaActiveCount == dp->tdaCount) { |
---|
| 567 | /* |
---|
| 568 | * Enable transmitter interrupts. |
---|
| 569 | */ |
---|
[7fc5d54e] | 570 | sonic_write_register( |
---|
| 571 | rp, |
---|
| 572 | SONIC_REG_IMR, |
---|
| 573 | sonic_read_register( rp, SONIC_REG_IMR) | |
---|
| 574 | (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) |
---|
| 575 | ); |
---|
[c932d85] | 576 | |
---|
| 577 | /* |
---|
| 578 | * Wait for interrupt |
---|
| 579 | */ |
---|
| 580 | rtems_ka9q_event_receive (INTERRUPT_EVENT, |
---|
| 581 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
| 582 | RTEMS_NO_TIMEOUT); |
---|
[7fc5d54e] | 583 | sonic_write_register( rp, SONIC_REG_ISR, ISR_PINT | ISR_TXDN | ISR_TXER ); |
---|
[c932d85] | 584 | sonic_retire_tda (dp); |
---|
| 585 | } |
---|
| 586 | } |
---|
| 587 | |
---|
| 588 | /* |
---|
| 589 | * Get the head of the packet mbuf chain. |
---|
| 590 | */ |
---|
| 591 | bp = *bpp; |
---|
| 592 | |
---|
| 593 | /* |
---|
| 594 | * Fill in the transmit descriptor fragment descriptors. |
---|
| 595 | * ===CACHE=== |
---|
| 596 | * If data cache is operating in write-back mode, flush cached |
---|
| 597 | * data to memory. |
---|
| 598 | */ |
---|
| 599 | tdp = dp->tdaHead->next; |
---|
| 600 | tdp->mbufp = bp; |
---|
| 601 | packetSize = 0; |
---|
| 602 | fp = tdp->frag; |
---|
| 603 | for (i = 0 ; i < MAXIMUM_FRAGS_PER_DESCRIPTOR ; i++, fp++) { |
---|
| 604 | fp->frag_lsw = LSW(bp->data); |
---|
| 605 | fp->frag_msw = MSW(bp->data); |
---|
| 606 | fp->frag_size = bp->cnt; |
---|
| 607 | packetSize += bp->cnt; |
---|
| 608 | |
---|
[301a2a3c] | 609 | #if (SONIC_DEBUG & SONIC_DEBUG_FRAGMENTS) |
---|
| 610 | printf( "fp %p 0x%04x%04x %d\n", |
---|
| 611 | fp, fp->frag_msw, fp->frag_lsw, fp->frag_size ); |
---|
| 612 | #endif |
---|
[c932d85] | 613 | /* |
---|
| 614 | * Break out of the loop if this mbuf is the last in the frame. |
---|
| 615 | */ |
---|
| 616 | if ((bp = bp->next) == NULL) |
---|
| 617 | break; |
---|
| 618 | } |
---|
| 619 | |
---|
| 620 | /* |
---|
| 621 | * Pad short packets. |
---|
| 622 | */ |
---|
| 623 | if ((packetSize < 64) && (i < MAXIMUM_FRAGS_PER_DESCRIPTOR)) { |
---|
| 624 | int padSize = 64 - packetSize; |
---|
[301a2a3c] | 625 | fp++; |
---|
[c932d85] | 626 | fp->frag_lsw = LSW(padBuf); |
---|
| 627 | fp->frag_msw = MSW(padBuf); |
---|
| 628 | fp->frag_size = padSize; |
---|
[301a2a3c] | 629 | #if (SONIC_DEBUG & SONIC_DEBUG_FRAGMENTS) |
---|
| 630 | printf( "PAD fp %p 0x%04x%04x %d\n", |
---|
| 631 | fp, fp->frag_msw, fp->frag_lsw, fp->frag_size ); |
---|
| 632 | #endif |
---|
[c932d85] | 633 | packetSize += padSize; |
---|
| 634 | i++; |
---|
| 635 | } |
---|
| 636 | |
---|
| 637 | /* |
---|
| 638 | * Fill Transmit Descriptor |
---|
| 639 | */ |
---|
| 640 | tdp->pkt_size = packetSize; |
---|
[301a2a3c] | 641 | tdp->frag_count = i + 1; |
---|
[c932d85] | 642 | tdp->status = 0; |
---|
| 643 | |
---|
| 644 | /* |
---|
| 645 | * Chain onto list and start transmission. |
---|
| 646 | */ |
---|
[339737b] | 647 | |
---|
[301a2a3c] | 648 | tdp->linkp = &(fp+1)->frag_link; |
---|
[c932d85] | 649 | *tdp->linkp = LSW(tdp->next) | TDA_LINK_EOL; |
---|
| 650 | *dp->tdaHead->linkp &= ~TDA_LINK_EOL; |
---|
[0c0419a1] | 651 | dp->tdaActiveCount++; |
---|
| 652 | dp->tdaHead = tdp; |
---|
| 653 | |
---|
[301a2a3c] | 654 | sonic_write_register( |
---|
| 655 | rp, |
---|
| 656 | SONIC_REG_IMR, |
---|
| 657 | sonic_read_register( rp, SONIC_REG_IMR) | |
---|
| 658 | (IMR_PINTEN | IMR_PTXEN | IMR_TXEREN) |
---|
| 659 | ); |
---|
[7fc5d54e] | 660 | sonic_write_register( rp, SONIC_REG_CR, CR_TXP ); |
---|
[c932d85] | 661 | |
---|
[c153a7b] | 662 | /* |
---|
| 663 | * Let KA9Q know the packet is on the way |
---|
| 664 | */ |
---|
| 665 | |
---|
| 666 | dp->txWaitTid = 0; |
---|
| 667 | *bpp = NULL; |
---|
[c932d85] | 668 | return 0; |
---|
| 669 | } |
---|
| 670 | |
---|
| 671 | /* |
---|
| 672 | ****************************************************************** |
---|
| 673 | * * |
---|
| 674 | * Receiver Routines * |
---|
| 675 | * * |
---|
| 676 | ****************************************************************** |
---|
| 677 | */ |
---|
| 678 | |
---|
| 679 | /* |
---|
| 680 | * Wait for SONIC to hand over a Receive Descriptor. |
---|
| 681 | */ |
---|
[7fc5d54e] | 682 | |
---|
| 683 | SONIC_STATIC void sonic_rda_wait( |
---|
| 684 | struct sonic *dp, |
---|
| 685 | ReceiveDescriptorPointer_t rdp |
---|
| 686 | ) |
---|
[c932d85] | 687 | { |
---|
| 688 | int i; |
---|
[7fc5d54e] | 689 | void *rp = dp->sonic; |
---|
[c932d85] | 690 | |
---|
| 691 | /* |
---|
| 692 | * Wait for Receive Descriptor. |
---|
| 693 | * The order of the tests is very important. |
---|
| 694 | * The RDA is checked after RBAE is detected. This ensures that |
---|
| 695 | * the driver processes all RDA entries before reusing the RRA |
---|
| 696 | * entry holding the giant packet. |
---|
| 697 | * The event wait is done after the RDA and RBAE checks. This |
---|
| 698 | * catches the possibility that a Receive Descriptor became ready |
---|
| 699 | * between the call to this function and the clearing of the |
---|
| 700 | * interrupt status register bit. |
---|
| 701 | */ |
---|
| 702 | for (;;) { |
---|
| 703 | /* |
---|
| 704 | * Has a giant packet arrived? |
---|
| 705 | * The National DP83932C data sheet is very vague on what |
---|
| 706 | * happens under this condition. The description of the |
---|
| 707 | * Interrupt Status Register (Section 4.3.6) states, |
---|
| 708 | * ``Reception is aborted and the SONIC fetches the next |
---|
| 709 | * available resource descriptors in the RRA. The buffer |
---|
| 710 | * space is not re-used and an RDA is not setup for the |
---|
| 711 | * truncated packet.'' |
---|
| 712 | * I take ``Reception is aborted'' to mean that the RXEN |
---|
| 713 | * bit in the Command Register is cleared and must be set |
---|
| 714 | * by the driver to begin reception again. |
---|
| 715 | * Unfortunately, an alternative interpretation could be |
---|
| 716 | * that only reception of the current packet is aborted. |
---|
| 717 | * This would be more difficult to recover from.... |
---|
| 718 | */ |
---|
[7fc5d54e] | 719 | if (sonic_read_register( rp, SONIC_REG_ISR ) & ISR_RBAE) { |
---|
[c932d85] | 720 | /* |
---|
| 721 | * One more check to soak up any Receive Descriptors |
---|
| 722 | * that may already have been handed back to the driver. |
---|
| 723 | */ |
---|
[e70a8f16] | 724 | if (rdp->in_use == RDA_IN_USE) |
---|
[c932d85] | 725 | break; |
---|
| 726 | |
---|
| 727 | /* |
---|
| 728 | * Check my interpretation of the SONIC manual. |
---|
| 729 | */ |
---|
[7fc5d54e] | 730 | if (sonic_read_register( rp, SONIC_REG_CR ) & CR_RXEN) |
---|
[c932d85] | 731 | rtems_panic ("SONIC RBAE/RXEN"); |
---|
| 732 | |
---|
| 733 | /* |
---|
| 734 | * Update statistics |
---|
| 735 | */ |
---|
| 736 | dp->rxGiant++; |
---|
| 737 | |
---|
| 738 | /* |
---|
| 739 | * Reuse receive buffer. |
---|
| 740 | * Again, the manual is subject to interpretation. The |
---|
| 741 | * RRP register is described as, `the lower address of |
---|
| 742 | * the next descriptor the SONIC will read.'' |
---|
| 743 | * Since, acording to the ISR/RBAE notes, the SONIC has |
---|
| 744 | * ``fetched the next available resource descriptor in |
---|
| 745 | * the RRA'', I interpret this to mean that that the |
---|
| 746 | * driver has to move the RRP back *two* entries to |
---|
| 747 | * reuse the receive buffer holding the giant packet. |
---|
| 748 | */ |
---|
| 749 | for (i = 0 ; i < 2 ; i++) { |
---|
[e995f3a1] | 750 | if (sonic_read_register( rp, SONIC_REG_RRP ) == |
---|
| 751 | sonic_read_register( rp, SONIC_REG_RSA )) |
---|
[7fc5d54e] | 752 | sonic_write_register( |
---|
| 753 | rp, |
---|
| 754 | SONIC_REG_RRP, |
---|
| 755 | sonic_read_register( rp, SONIC_REG_REA ) |
---|
| 756 | ); |
---|
| 757 | sonic_write_register( |
---|
| 758 | rp, |
---|
| 759 | SONIC_REG_RRP, |
---|
| 760 | sonic_read_register(rp, SONIC_REG_RRP) - sizeof(ReceiveResource_t) |
---|
| 761 | ); |
---|
[c932d85] | 762 | } |
---|
| 763 | |
---|
| 764 | /* |
---|
| 765 | * Restart reception |
---|
| 766 | */ |
---|
[7fc5d54e] | 767 | sonic_write_register( rp, SONIC_REG_ISR, ISR_RBAE ); |
---|
| 768 | sonic_write_register( rp, SONIC_REG_CR, CR_RXEN ); |
---|
[c932d85] | 769 | } |
---|
| 770 | |
---|
| 771 | /* |
---|
| 772 | * Clear old packet-received events. |
---|
| 773 | */ |
---|
[7fc5d54e] | 774 | sonic_write_register( rp, SONIC_REG_ISR, ISR_PKTRX ); |
---|
[c932d85] | 775 | |
---|
| 776 | /* |
---|
| 777 | * Has Receive Descriptor become available? |
---|
| 778 | */ |
---|
[e70a8f16] | 779 | if (rdp->in_use == RDA_IN_USE) |
---|
[c932d85] | 780 | break; |
---|
| 781 | |
---|
| 782 | /* |
---|
| 783 | * Enable interrupts. |
---|
| 784 | */ |
---|
[7fc5d54e] | 785 | sonic_write_register( |
---|
| 786 | rp, |
---|
| 787 | SONIC_REG_IMR, |
---|
| 788 | sonic_read_register( rp, SONIC_REG_IMR) | (IMR_PRXEN | IMR_RBAEEN) |
---|
| 789 | ); |
---|
[c932d85] | 790 | |
---|
| 791 | /* |
---|
| 792 | * Wait for interrupt. |
---|
| 793 | */ |
---|
| 794 | rtems_ka9q_event_receive (INTERRUPT_EVENT, |
---|
| 795 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
| 796 | RTEMS_NO_TIMEOUT); |
---|
| 797 | } |
---|
| 798 | } |
---|
| 799 | |
---|
| 800 | /* |
---|
| 801 | * SCC reader task |
---|
| 802 | */ |
---|
[7fc5d54e] | 803 | |
---|
| 804 | SONIC_STATIC void sonic_rx (int dev, void *p1, void *p2) |
---|
[c932d85] | 805 | { |
---|
| 806 | struct iface *iface = (struct iface *)p1; |
---|
| 807 | struct sonic *dp = (struct sonic *)p2; |
---|
[7fc5d54e] | 808 | void *rp = dp->sonic; |
---|
[c932d85] | 809 | struct mbuf *bp; |
---|
| 810 | rtems_unsigned16 status; |
---|
[dddc0557] | 811 | ReceiveDescriptorPointer_t rdp; |
---|
[c932d85] | 812 | ReceiveResourcePointer_t rwp, rea; |
---|
| 813 | rtems_unsigned16 newMissedTally, oldMissedTally; |
---|
| 814 | int continuousCount; |
---|
| 815 | |
---|
| 816 | rwp = dp->rsa; |
---|
| 817 | rea = rwp; |
---|
[e70a8f16] | 818 | rdp = dp->rda; /* XXX was rdp_last */ |
---|
[c932d85] | 819 | |
---|
| 820 | /* |
---|
| 821 | * Start the receiver |
---|
| 822 | */ |
---|
[7fc5d54e] | 823 | oldMissedTally = sonic_read_register( rp, SONIC_REG_MPT ); |
---|
| 824 | sonic_write_register( rp, SONIC_REG_CR, CR_RRRA ); |
---|
| 825 | sonic_write_register( rp, SONIC_REG_CR, CR_RXEN ); |
---|
[c932d85] | 826 | |
---|
| 827 | /* |
---|
| 828 | * Input packet handling loop |
---|
| 829 | */ |
---|
| 830 | continuousCount = 0; |
---|
| 831 | for (;;) { |
---|
| 832 | /* |
---|
| 833 | * Wait till SONIC supplies a Receive Descriptor. |
---|
| 834 | */ |
---|
[e70a8f16] | 835 | if (rdp->in_use == RDA_FREE) { |
---|
[c932d85] | 836 | continuousCount = 0; |
---|
| 837 | sonic_rda_wait (dp, rdp); |
---|
| 838 | } |
---|
| 839 | |
---|
[301a2a3c] | 840 | /* printf( "Incoming packet %p\n", rdp ); */ |
---|
[e70a8f16] | 841 | |
---|
[c932d85] | 842 | /* |
---|
| 843 | * Check that packet is valid |
---|
| 844 | */ |
---|
| 845 | status = rdp->status; |
---|
| 846 | if (status & RDA_STATUS_PRX) { |
---|
| 847 | struct mbuf **mbp; |
---|
| 848 | void *p; |
---|
| 849 | |
---|
[301a2a3c] | 850 | /* printf( "Valid packet\n" ); */ |
---|
[c932d85] | 851 | /* |
---|
| 852 | * Get the mbuf pointer |
---|
| 853 | */ |
---|
| 854 | p = PTR(rdp->pkt_msw, rdp->pkt_lsw); |
---|
| 855 | mbp = (struct mbuf **)p - 1; |
---|
| 856 | bp = *mbp; |
---|
| 857 | |
---|
| 858 | /* |
---|
| 859 | * Pass the packet up the chain. |
---|
| 860 | * The mbuf count is reduced to remove |
---|
| 861 | * the frame check sequence at the end |
---|
| 862 | * of the packet. |
---|
| 863 | * ===CACHE=== |
---|
| 864 | * Invalidate cache entries for this memory. |
---|
| 865 | */ |
---|
| 866 | bp->cnt = rdp->byte_count - sizeof (uint32); |
---|
[301a2a3c] | 867 | /* printf( "Routing the packet\n" ); */ |
---|
[c932d85] | 868 | net_route (iface, &bp); |
---|
| 869 | |
---|
| 870 | /* |
---|
| 871 | * Give the network code a chance to digest the |
---|
| 872 | * packet. This guards against a flurry of |
---|
| 873 | * incoming packets (usually an ARP storm) from |
---|
| 874 | * using up all the available memory. |
---|
| 875 | */ |
---|
| 876 | if (++continuousCount >= dp->rdaCount) |
---|
| 877 | kwait_null (); |
---|
| 878 | |
---|
| 879 | /* |
---|
| 880 | * Sanity check that Receive Resource Area is |
---|
| 881 | * still in sync with Receive Descriptor Area |
---|
| 882 | * The buffer reported in the Receive Descriptor |
---|
| 883 | * should be the same as the buffer in the Receive |
---|
| 884 | * Resource we are about to reuse. |
---|
| 885 | */ |
---|
[dddc0557] | 886 | /* XXX figure out whether this is valid or not */ |
---|
| 887 | #if 0 |
---|
[c932d85] | 888 | if ((LSW(p) != rwp->buff_ptr_lsw) |
---|
| 889 | || (MSW(p) != rwp->buff_ptr_msw)) |
---|
| 890 | rtems_panic ("SONIC RDA/RRA"); |
---|
[dddc0557] | 891 | #endif |
---|
[c932d85] | 892 | |
---|
| 893 | /* |
---|
| 894 | * Allocate a new mbuf. |
---|
| 895 | */ |
---|
| 896 | bp = ambufw (RBUF_SIZE); |
---|
| 897 | mbp = (struct mbuf **)bp->data; |
---|
| 898 | bp->data += sizeof *mbp; |
---|
| 899 | *mbp = bp; |
---|
| 900 | |
---|
| 901 | /* |
---|
| 902 | * Reuse Receive Resource. |
---|
| 903 | */ |
---|
| 904 | rwp->buff_ptr_lsw = LSW(bp->data); |
---|
| 905 | rwp->buff_ptr_msw = MSW(bp->data); |
---|
| 906 | rwp++; |
---|
| 907 | if (rwp == rea) |
---|
| 908 | rwp = dp->rsa; |
---|
[7fc5d54e] | 909 | sonic_write_register( rp, SONIC_REG_RWP , LSW(rwp) ); |
---|
[c932d85] | 910 | |
---|
| 911 | /* |
---|
| 912 | * Tell the SONIC to reread the RRA. |
---|
| 913 | */ |
---|
[7fc5d54e] | 914 | if (sonic_read_register( rp, SONIC_REG_ISR ) & ISR_RBE) |
---|
| 915 | sonic_write_register( rp, SONIC_REG_ISR, ISR_RBE ); |
---|
[c932d85] | 916 | } |
---|
| 917 | else { |
---|
| 918 | if (status & RDA_STATUS_COL) |
---|
| 919 | dp->rxCollision++; |
---|
| 920 | if (status & RDA_STATUS_FAER) |
---|
| 921 | dp->rxNonOctet++; |
---|
| 922 | else if (status & RDA_STATUS_CRCR) |
---|
| 923 | dp->rxBadCRC++; |
---|
| 924 | } |
---|
| 925 | |
---|
| 926 | /* |
---|
| 927 | * Count missed packets |
---|
| 928 | */ |
---|
[7fc5d54e] | 929 | newMissedTally = sonic_read_register( rp, SONIC_REG_MPT ); |
---|
[c932d85] | 930 | if (newMissedTally != oldMissedTally) { |
---|
| 931 | dp->rxMissed += (newMissedTally - oldMissedTally) & 0xFFFF; |
---|
| 932 | newMissedTally = oldMissedTally; |
---|
| 933 | } |
---|
| 934 | |
---|
| 935 | /* |
---|
| 936 | * Move to next receive descriptor |
---|
| 937 | */ |
---|
| 938 | rdp->link |= RDA_LINK_EOL; |
---|
[e70a8f16] | 939 | rdp->in_use = RDA_FREE; |
---|
[c932d85] | 940 | rdp = rdp->next; |
---|
[dddc0557] | 941 | rdp->link &= ~RDA_LINK_EOL; |
---|
[c932d85] | 942 | } |
---|
| 943 | } |
---|
| 944 | |
---|
| 945 | /* |
---|
| 946 | ****************************************************************** |
---|
| 947 | * * |
---|
| 948 | * Initialization Routines * |
---|
| 949 | * * |
---|
| 950 | ****************************************************************** |
---|
| 951 | */ |
---|
| 952 | |
---|
| 953 | /* |
---|
| 954 | * Initialize the SONIC hardware |
---|
| 955 | */ |
---|
[7fc5d54e] | 956 | SONIC_STATIC void sonic_initialize_hardware( |
---|
| 957 | struct sonic *dp, |
---|
| 958 | int broadcastFlag |
---|
| 959 | ) |
---|
[c932d85] | 960 | { |
---|
[7fc5d54e] | 961 | void *rp = dp->sonic; |
---|
[c932d85] | 962 | int i; |
---|
| 963 | unsigned char *hwaddr; |
---|
| 964 | rtems_isr_entry old_handler; |
---|
[339737b] | 965 | TransmitDescriptorPointer_t tdp; |
---|
[dddc0557] | 966 | ReceiveDescriptorPointer_t ordp, rdp; |
---|
| 967 | ReceiveResourcePointer_t rwp, rea; |
---|
| 968 | struct mbuf *bp; |
---|
[301a2a3c] | 969 | CamDescriptorPointer_t cdp; |
---|
[c932d85] | 970 | |
---|
[e70a8f16] | 971 | /* |
---|
| 972 | * The Revision B SONIC has a horrible bug known as the "Zero |
---|
| 973 | * Length Packet bug". The initial board used to develop this |
---|
| 974 | * driver had a newer revision of the SONIC so there was no reason |
---|
| 975 | * to check for this. If you have the Revision B SONIC chip, then |
---|
| 976 | * you need to add some code to the RX path to handle this weirdness. |
---|
| 977 | */ |
---|
| 978 | |
---|
| 979 | if ( sonic_read_register( rp, SONIC_REG_SR ) < SONIC_REVISION_C ) { |
---|
| 980 | rtems_fatal_error_occurred( 0x0BADF00D ); /* don't eat this part :) */ |
---|
| 981 | } |
---|
| 982 | |
---|
[c932d85] | 983 | /* |
---|
[dddc0557] | 984 | * Set up circular linked list in Transmit Descriptor Area. |
---|
| 985 | * Use the PINT bit in the transmit configuration field to |
---|
| 986 | * request an interrupt on every other transmitted packet. |
---|
| 987 | * |
---|
| 988 | * NOTE: sonic_allocate() zeroes all of the memory allocated. |
---|
[c932d85] | 989 | */ |
---|
[dddc0557] | 990 | |
---|
| 991 | dp->tdaActiveCount = 0; |
---|
[301a2a3c] | 992 | dp->tdaTail = sonic_allocate(dp->tdaCount * sizeof *tdp); |
---|
[e995f3a1] | 993 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
| 994 | printf( "tdaTail = %p\n", dp->tdaTail ); |
---|
| 995 | #endif |
---|
[339737b] | 996 | tdp = dp->tdaTail; |
---|
[dddc0557] | 997 | for (i = 0 ; i < dp->tdaCount ; i++) { |
---|
[301a2a3c] | 998 | /* |
---|
| 999 | * status, pkt_config, pkt_size, and all fragment fields |
---|
| 1000 | * are set to zero by sonic_allocate. |
---|
| 1001 | */ |
---|
| 1002 | |
---|
[339737b] | 1003 | /* XXX not used by other drivers we looked at |
---|
[dddc0557] | 1004 | if (i & 1) |
---|
| 1005 | tdp->pkt_config = TDA_CONFIG_PINT; |
---|
[301a2a3c] | 1006 | */ |
---|
| 1007 | |
---|
| 1008 | tdp->frag_count = 1; |
---|
| 1009 | tdp->frag[0].frag_link = LSW(tdp + 1); |
---|
| 1010 | tdp->link_pad = LSW(tdp + 1) | TDA_LINK_EOL; |
---|
[339737b] | 1011 | tdp->linkp = &((tdp + 1)->frag[0].frag_link); |
---|
[301a2a3c] | 1012 | tdp->next = (TransmitDescriptor_t *)(tdp + 1); |
---|
| 1013 | tdp++; |
---|
[dddc0557] | 1014 | } |
---|
[339737b] | 1015 | tdp--; |
---|
| 1016 | dp->tdaHead = tdp; |
---|
| 1017 | tdp->link_pad = LSW(dp->tdaTail) | TDA_LINK_EOL; |
---|
| 1018 | tdp->next = (TransmitDescriptor_t *)dp->tdaTail; |
---|
| 1019 | tdp->linkp = &dp->tdaTail->frag[0].frag_link; |
---|
[dddc0557] | 1020 | |
---|
| 1021 | /* |
---|
| 1022 | * Set up circular linked list in Receive Descriptor Area. |
---|
[339737b] | 1023 | * Leaves dp->rda pointing at the `beginning' of the list. |
---|
[301a2a3c] | 1024 | * |
---|
| 1025 | * NOTE: The RDA and CDP must have the same MSW for their addresses. |
---|
[dddc0557] | 1026 | */ |
---|
| 1027 | |
---|
[301a2a3c] | 1028 | dp->rda = sonic_allocate( |
---|
| 1029 | (dp->rdaCount * sizeof(ReceiveDescriptor_t)) + |
---|
| 1030 | sizeof(CamDescriptor_t) ); |
---|
| 1031 | dp->cdp = (CamDescriptorPointer_t) ((unsigned char *)dp->rda + |
---|
| 1032 | (dp->rdaCount * sizeof(ReceiveDescriptor_t))); |
---|
[e995f3a1] | 1033 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
[e70a8f16] | 1034 | printf( "rda area = %p\n", dp->rda ); |
---|
[301a2a3c] | 1035 | printf( "cdp area = %p\n", dp->cdp ); |
---|
[e995f3a1] | 1036 | #endif |
---|
[e70a8f16] | 1037 | |
---|
| 1038 | ordp = rdp = dp->rda; |
---|
[dddc0557] | 1039 | for (i = 0 ; i < dp->rdaCount ; i++) { |
---|
| 1040 | /* |
---|
[e70a8f16] | 1041 | * status, byte_count, pkt_ptr0, pkt_ptr1, and seq_no are set |
---|
| 1042 | * to zero by sonic_allocate. |
---|
[dddc0557] | 1043 | */ |
---|
[e70a8f16] | 1044 | rdp->link = LSW(rdp + 1); |
---|
| 1045 | rdp->in_use = RDA_FREE; |
---|
| 1046 | rdp->next = (ReceiveDescriptor_t *)(rdp + 1); |
---|
[dddc0557] | 1047 | ordp = rdp; |
---|
[e70a8f16] | 1048 | rdp++; |
---|
[dddc0557] | 1049 | } |
---|
[e70a8f16] | 1050 | /* |
---|
| 1051 | * Link the last desriptor to the 1st one and mark it as the end |
---|
| 1052 | * of the list. |
---|
| 1053 | */ |
---|
| 1054 | ordp->next = dp->rda; |
---|
[dddc0557] | 1055 | ordp->link |= RDA_LINK_EOL; |
---|
| 1056 | dp->rdp_last = rdp; |
---|
[e70a8f16] | 1057 | |
---|
[dddc0557] | 1058 | /* |
---|
| 1059 | * Allocate the receive resource area. |
---|
| 1060 | * In accordance with National Application Note 746, make the |
---|
| 1061 | * receive resource area bigger than the receive descriptor area. |
---|
| 1062 | * This has the useful side effect of making the receive resource |
---|
| 1063 | * area big enough to hold the CAM descriptor area. |
---|
| 1064 | */ |
---|
[e995f3a1] | 1065 | |
---|
[301a2a3c] | 1066 | dp->rsa = sonic_allocate((dp->rdaCount + RRA_EXTRA_COUNT) * sizeof *dp->rsa); |
---|
[e995f3a1] | 1067 | #if (SONIC_DEBUG & SONIC_DEBUG_MEMORY) |
---|
[dddc0557] | 1068 | printf( "rsa area = %p\n", dp->rsa ); |
---|
| 1069 | #endif |
---|
| 1070 | |
---|
| 1071 | /* |
---|
| 1072 | * Set up list in Receive Resource Area. |
---|
| 1073 | * Allocate space for incoming packets. |
---|
| 1074 | */ |
---|
| 1075 | |
---|
| 1076 | rwp = dp->rsa; |
---|
| 1077 | for (i = 0 ; i < (dp->rdaCount + RRA_EXTRA_COUNT) ; i++, rwp++) { |
---|
| 1078 | struct mbuf **mbp; |
---|
| 1079 | |
---|
| 1080 | /* |
---|
| 1081 | * Allocate memory for buffer. |
---|
| 1082 | * Place a pointer to the mbuf at the beginning of the buffer |
---|
| 1083 | * so we can find the mbuf when the SONIC returns the buffer |
---|
| 1084 | * to the driver. |
---|
| 1085 | */ |
---|
| 1086 | bp = ambufw (RBUF_SIZE); |
---|
| 1087 | mbp = (struct mbuf **)bp->data; |
---|
| 1088 | bp->data += sizeof *mbp; |
---|
| 1089 | *mbp = bp; |
---|
| 1090 | |
---|
| 1091 | /* |
---|
| 1092 | * Set up RRA entry |
---|
| 1093 | */ |
---|
[301a2a3c] | 1094 | |
---|
[dddc0557] | 1095 | rwp->buff_ptr_lsw = LSW(bp->data); |
---|
| 1096 | rwp->buff_ptr_msw = MSW(bp->data); |
---|
| 1097 | rwp->buff_wc_lsw = RBUF_WC; |
---|
| 1098 | rwp->buff_wc_msw = 0; |
---|
| 1099 | } |
---|
| 1100 | rea = rwp; |
---|
| 1101 | |
---|
| 1102 | /* |
---|
| 1103 | * Issue a software reset. |
---|
| 1104 | */ |
---|
| 1105 | sonic_write_register( rp, SONIC_REG_CR, CR_RST | CR_STP | CR_RXDIS | CR_HTX ); |
---|
[c932d85] | 1106 | |
---|
| 1107 | /* |
---|
| 1108 | * Set up data configuration registers. |
---|
| 1109 | */ |
---|
[7fc5d54e] | 1110 | sonic_write_register( rp, SONIC_REG_DCR, SONIC_DCR ); |
---|
| 1111 | sonic_write_register( rp, SONIC_REG_DCR2, SONIC_DC2 ); |
---|
[dddc0557] | 1112 | |
---|
| 1113 | sonic_write_register( rp, SONIC_REG_CR, CR_STP | CR_RXDIS | CR_HTX ); |
---|
[c932d85] | 1114 | |
---|
| 1115 | /* |
---|
[7fc5d54e] | 1116 | * Mask all interrupts |
---|
[c932d85] | 1117 | */ |
---|
[7fc5d54e] | 1118 | sonic_write_register( rp, SONIC_REG_IMR, 0x3fff ); |
---|
| 1119 | |
---|
[c932d85] | 1120 | /* |
---|
| 1121 | * Clear outstanding interrupts. |
---|
| 1122 | */ |
---|
[7fc5d54e] | 1123 | sonic_write_register( rp, SONIC_REG_ISR, 0x7FFF ); |
---|
[c932d85] | 1124 | |
---|
[7fc5d54e] | 1125 | /* |
---|
[dddc0557] | 1126 | * Clear the tally counters |
---|
[7fc5d54e] | 1127 | */ |
---|
[dddc0557] | 1128 | |
---|
| 1129 | sonic_write_register( rp, SONIC_REG_CRCT, 0xFFFF ); |
---|
| 1130 | sonic_write_register( rp, SONIC_REG_FAET, 0xFFFF ); |
---|
| 1131 | sonic_write_register( rp, SONIC_REG_MPT, 0xFFFF ); |
---|
[301a2a3c] | 1132 | sonic_write_register( rp, SONIC_REG_RSC, 0 ); |
---|
[dddc0557] | 1133 | |
---|
[c932d85] | 1134 | /* |
---|
[dddc0557] | 1135 | * Set the Receiver mode |
---|
| 1136 | * |
---|
| 1137 | * Enable/disable reception of broadcast packets |
---|
[c932d85] | 1138 | */ |
---|
[dddc0557] | 1139 | |
---|
| 1140 | if (broadcastFlag) |
---|
[7344fba9] | 1141 | sonic_write_register( rp, SONIC_REG_RCR, RCR_BRD ); |
---|
[dddc0557] | 1142 | else |
---|
[7344fba9] | 1143 | sonic_write_register( rp, SONIC_REG_RCR, 0 ); |
---|
[dddc0557] | 1144 | |
---|
| 1145 | /* |
---|
| 1146 | * Set up Resource Area pointers |
---|
| 1147 | */ |
---|
[301a2a3c] | 1148 | |
---|
[dddc0557] | 1149 | sonic_write_register( rp, SONIC_REG_URRA, MSW(dp->rsa) ); |
---|
| 1150 | sonic_write_register( rp, SONIC_REG_RSA, LSW(dp->rsa) ); |
---|
| 1151 | |
---|
| 1152 | sonic_write_register( rp, SONIC_REG_REA, LSW(rea) ); |
---|
| 1153 | |
---|
| 1154 | sonic_write_register( rp, SONIC_REG_RRP, LSW(dp->rsa) ); |
---|
| 1155 | sonic_write_register( rp, SONIC_REG_RWP, LSW(dp->rsa) ); /* XXX was rea */ |
---|
| 1156 | |
---|
[e70a8f16] | 1157 | sonic_write_register( rp, SONIC_REG_URDA, MSW(dp->rda) ); |
---|
| 1158 | sonic_write_register( rp, SONIC_REG_CRDA, LSW(dp->rda) ); |
---|
[dddc0557] | 1159 | |
---|
| 1160 | sonic_write_register( rp, SONIC_REG_UTDA, MSW(dp->tdaTail) ); |
---|
| 1161 | sonic_write_register( rp, SONIC_REG_CTDA, LSW(dp->tdaTail) ); |
---|
| 1162 | |
---|
| 1163 | /* |
---|
| 1164 | * Set End Of Buffer Count register to the value recommended |
---|
| 1165 | * in Note 1 of Section 3.4.4.4 of the SONIC data sheet. |
---|
| 1166 | */ |
---|
| 1167 | |
---|
| 1168 | sonic_write_register( rp, SONIC_REG_EOBC, RBUF_WC - 2 ); |
---|
| 1169 | |
---|
| 1170 | /* |
---|
| 1171 | * Issue the load RRA command |
---|
| 1172 | */ |
---|
| 1173 | |
---|
| 1174 | sonic_write_register( rp, SONIC_REG_CR, CR_RRRA ); |
---|
| 1175 | while (sonic_read_register( rp, SONIC_REG_CR ) & CR_RRRA) |
---|
| 1176 | continue; |
---|
| 1177 | |
---|
| 1178 | /* |
---|
| 1179 | * Remove device reset |
---|
| 1180 | */ |
---|
| 1181 | |
---|
| 1182 | sonic_write_register( rp, SONIC_REG_CR, 0 ); |
---|
[c932d85] | 1183 | |
---|
| 1184 | /* |
---|
[7344fba9] | 1185 | * Set up the SONIC CAM with our hardware address. |
---|
[c932d85] | 1186 | */ |
---|
[7344fba9] | 1187 | |
---|
[c932d85] | 1188 | hwaddr = dp->iface->hwaddr; |
---|
[301a2a3c] | 1189 | cdp = dp->cdp; |
---|
| 1190 | |
---|
| 1191 | #if (SONIC_DEBUG & SONIC_DEBUG_CAM) |
---|
| 1192 | printf( "hwaddr: %2x:%2x:%2x:%2x:%2x:%2x\n", |
---|
| 1193 | hwaddr[0], hwaddr[1], hwaddr[2], hwaddr[3], hwaddr[4], hwaddr[5] ); |
---|
| 1194 | #endif |
---|
[dddc0557] | 1195 | |
---|
[7344fba9] | 1196 | cdp->cep = 0; /* Fill first and only entry in CAM */ |
---|
| 1197 | cdp->cap0 = hwaddr[1] << 8 | hwaddr[0]; |
---|
| 1198 | cdp->cap1 = hwaddr[3] << 8 | hwaddr[2]; |
---|
| 1199 | cdp->cap2 = hwaddr[5] << 8 | hwaddr[4]; |
---|
| 1200 | cdp->ce = 0x0001; /* Enable first entry in CAM */ |
---|
| 1201 | |
---|
| 1202 | sonic_write_register( rp, SONIC_REG_CDC, 1 ); /* 1 entry in CDA */ |
---|
[7fc5d54e] | 1203 | sonic_write_register( rp, SONIC_REG_CDP, LSW(cdp) ); |
---|
[7344fba9] | 1204 | sonic_write_register( rp, SONIC_REG_CR, CR_LCAM ); /* Load the CAM */ |
---|
| 1205 | |
---|
[7fc5d54e] | 1206 | while (sonic_read_register( rp, SONIC_REG_CR ) & CR_LCAM) |
---|
[c932d85] | 1207 | continue; |
---|
| 1208 | |
---|
| 1209 | /* |
---|
| 1210 | * Verify that CAM was properly loaded. |
---|
| 1211 | */ |
---|
[e70a8f16] | 1212 | |
---|
| 1213 | sonic_write_register( rp, SONIC_REG_CR, CR_RST | CR_STP | CR_RXDIS | CR_HTX ); |
---|
| 1214 | |
---|
[301a2a3c] | 1215 | #if (SONIC_DEBUG & SONIC_DEBUG_CAM) |
---|
| 1216 | sonic_write_register( rp, SONIC_REG_CEP, 0 ); /* Select first entry in CAM */ |
---|
| 1217 | printf ("Loaded Ethernet address into SONIC CAM.\n" |
---|
| 1218 | " Wrote %04x%04x%04x - %#x\n" |
---|
| 1219 | " Read %04x%04x%04x - %#x\n", |
---|
[7344fba9] | 1220 | cdp->cap2, cdp->cap1, cdp->cap0, cdp->ce, |
---|
[301a2a3c] | 1221 | sonic_read_register( rp, SONIC_REG_CAP2 ), |
---|
| 1222 | sonic_read_register( rp, SONIC_REG_CAP1 ), |
---|
| 1223 | sonic_read_register( rp, SONIC_REG_CAP0 ), |
---|
| 1224 | sonic_read_register( rp, SONIC_REG_CE )); |
---|
| 1225 | #endif |
---|
| 1226 | |
---|
[e70a8f16] | 1227 | sonic_write_register( rp, SONIC_REG_CEP, 0 ); /* Select first entry in CAM */ |
---|
[7344fba9] | 1228 | if ((sonic_read_register( rp, SONIC_REG_CAP2 ) != cdp->cap2) |
---|
| 1229 | || (sonic_read_register( rp, SONIC_REG_CAP1 ) != cdp->cap1) |
---|
| 1230 | || (sonic_read_register( rp, SONIC_REG_CAP0 ) != cdp->cap0) |
---|
[7fc5d54e] | 1231 | || (sonic_read_register( rp, SONIC_REG_CE ) != cdp->ce)) { |
---|
[c932d85] | 1232 | printf ("Failed to load Ethernet address into SONIC CAM.\n" |
---|
| 1233 | " Wrote %04x%04x%04x - %#x\n" |
---|
| 1234 | " Read %04x%04x%04x - %#x\n", |
---|
[7344fba9] | 1235 | cdp->cap2, cdp->cap1, cdp->cap0, cdp->ce, |
---|
[7fc5d54e] | 1236 | sonic_read_register( rp, SONIC_REG_CAP2 ), |
---|
| 1237 | sonic_read_register( rp, SONIC_REG_CAP1 ), |
---|
| 1238 | sonic_read_register( rp, SONIC_REG_CAP0 ), |
---|
| 1239 | sonic_read_register( rp, SONIC_REG_CE )); |
---|
[c932d85] | 1240 | rtems_panic ("SONIC LCAM"); |
---|
[e70a8f16] | 1241 | } |
---|
| 1242 | |
---|
[301a2a3c] | 1243 | sonic_write_register(rp, SONIC_REG_CR, CR_TXP | CR_RXEN | CR_STP); |
---|
[c932d85] | 1244 | |
---|
| 1245 | /* |
---|
| 1246 | * Attach SONIC interrupt handler |
---|
| 1247 | */ |
---|
[7fc5d54e] | 1248 | sonic_write_register( rp, SONIC_REG_IMR, 0 ); |
---|
[dddc0557] | 1249 | old_handler = set_vector(sonic_interrupt_handler, dp->vector, 0); |
---|
[c932d85] | 1250 | |
---|
| 1251 | /* |
---|
| 1252 | * Remainder of hardware initialization is |
---|
| 1253 | * done by the receive and transmit daemons. |
---|
| 1254 | */ |
---|
| 1255 | } |
---|
| 1256 | |
---|
| 1257 | /* |
---|
| 1258 | * Attach an SONIC driver to the system |
---|
| 1259 | * This is the only `extern' function in the driver. |
---|
| 1260 | * |
---|
| 1261 | * argv[0]: interface label, e.g. "rtems" |
---|
| 1262 | * The remainder of the arguments are optional key/value pairs: |
---|
| 1263 | * mtu ## -- maximum transmission unit, default 1500 |
---|
| 1264 | * broadcast y/n -- accept or ignore broadcast packets, default yes |
---|
| 1265 | * rbuf ## -- Set number of receive descriptor entries |
---|
| 1266 | * tbuf ## -- Set number of transmit descriptor entries |
---|
| 1267 | * ip ###.###.###.### -- IP address |
---|
| 1268 | * ether ##:##:##:##:##:## -- Ethernet address |
---|
| 1269 | * reg ###### -- Address of SONIC device registers |
---|
| 1270 | * vector ### -- SONIC interrupt vector |
---|
| 1271 | */ |
---|
| 1272 | int |
---|
| 1273 | rtems_ka9q_driver_attach (int argc, char *argv[], void *p) |
---|
| 1274 | { |
---|
| 1275 | struct sonic *dp; |
---|
| 1276 | struct iface *iface; |
---|
| 1277 | char *cp; |
---|
| 1278 | int argIndex; |
---|
| 1279 | int broadcastFlag; |
---|
| 1280 | char cbuf[30]; |
---|
| 1281 | |
---|
| 1282 | /* |
---|
| 1283 | * Find an unused entry |
---|
| 1284 | */ |
---|
| 1285 | dp = sonic; |
---|
| 1286 | for (;;) { |
---|
| 1287 | if (dp == &sonic[NSONIC]) { |
---|
| 1288 | printf ("No more SONIC devices.\n"); |
---|
| 1289 | return -1; |
---|
| 1290 | } |
---|
| 1291 | if (dp->iface == NULL) |
---|
| 1292 | break; |
---|
| 1293 | dp++; |
---|
| 1294 | } |
---|
| 1295 | if (if_lookup (argv[0]) != NULL) { |
---|
| 1296 | printf ("Interface %s already exists\n", argv[0]); |
---|
| 1297 | return -1; |
---|
| 1298 | } |
---|
| 1299 | |
---|
[c153a7b] | 1300 | /* |
---|
| 1301 | * zero out the control structure |
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| 1302 | */ |
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| 1303 | |
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| 1304 | memset( dp, 0, sizeof(struct sonic) ); |
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| 1305 | |
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[c932d85] | 1306 | /* |
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| 1307 | * Create an inteface descriptor |
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| 1308 | */ |
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| 1309 | iface = callocw (1, sizeof *iface); |
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| 1310 | iface->name = strdup (argv[0]); |
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[c153a7b] | 1311 | iface->dev = dp - sonic; |
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[c932d85] | 1312 | |
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| 1313 | /* |
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| 1314 | * Set default values |
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| 1315 | */ |
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| 1316 | broadcastFlag = 1; |
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| 1317 | dp->txWaitTid = 0; |
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| 1318 | dp->rdaCount = RDA_COUNT; |
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| 1319 | dp->tdaCount = TDA_COUNT; |
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| 1320 | iface->mtu = 1500; |
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| 1321 | iface->addr = Ip_addr; |
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| 1322 | iface->hwaddr = mallocw (EADDR_LEN); |
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| 1323 | memset (iface->hwaddr, 0x08, EADDR_LEN); |
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| 1324 | dp->sonic = (struct SonicRegisters *)SONIC_BASE_ADDRESS; |
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| 1325 | dp->vector = SONIC_VECTOR; |
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| 1326 | |
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| 1327 | /* |
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| 1328 | * Parse remaining arguments |
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| 1329 | */ |
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| 1330 | for (argIndex = 1 ; argIndex < (argc - 1) ; argIndex++) { |
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| 1331 | if (strcmp ("mtu", argv[argIndex]) == 0) { |
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| 1332 | iface->mtu = strtoul (argv[++argIndex], NULL, 0); |
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| 1333 | } |
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| 1334 | else if (strcmp ("broadcast", argv[argIndex]) == 0) { |
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| 1335 | if (*argv[++argIndex] == 'n') |
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| 1336 | broadcastFlag = 0; |
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| 1337 | } |
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| 1338 | else if (strcmp ("rbuf", argv[argIndex]) == 0) { |
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| 1339 | /* |
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| 1340 | * The minimum RDA count is 2. A single-entry RDA |
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| 1341 | * would be difficult to use since the SONIC does |
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| 1342 | * not release (in_use = 0) the RDA that has the |
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| 1343 | * EOL bit set. |
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| 1344 | */ |
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| 1345 | dp->rdaCount = strtoul (argv[++argIndex], NULL, 0); |
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| 1346 | if ((dp->rdaCount <= 1) || (dp->rdaCount > 200)) { |
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| 1347 | printf ("RDA option (%d) is invalid.\n", dp->rdaCount); |
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| 1348 | return -1; |
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| 1349 | } |
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| 1350 | } |
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| 1351 | else if (strcmp ("tbuf", argv[argIndex]) == 0) { |
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| 1352 | dp->tdaCount = strtoul (argv[++argIndex], NULL, 0); |
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| 1353 | if ((dp->tdaCount <= 1) || (dp->tdaCount > 200)) { |
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| 1354 | printf ("TDA option (%d) is invalid.\n", dp->tdaCount); |
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| 1355 | return -1; |
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| 1356 | } |
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| 1357 | } |
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| 1358 | else if (strcmp ("ip", argv[argIndex]) == 0) { |
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| 1359 | iface->addr = resolve (argv[++argIndex]); |
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| 1360 | } |
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| 1361 | else if (strcmp ("ether", argv[argIndex]) == 0) { |
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| 1362 | gether (iface->hwaddr, argv[++argIndex]); |
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| 1363 | } |
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| 1364 | else if (strcmp ("reg", argv[argIndex]) == 0) { |
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| 1365 | dp->sonic = (struct SonicRegisters *)strtoul (argv[++argIndex], NULL, 0); |
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| 1366 | } |
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| 1367 | else if (strcmp ("vector", argv[argIndex]) == 0) { |
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| 1368 | dp->vector = strtoul (argv[++argIndex], NULL, 0); |
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| 1369 | } |
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| 1370 | else { |
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| 1371 | printf ("Argument %d (%s) is invalid.\n", argIndex, argv[argIndex]); |
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| 1372 | return -1; |
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| 1373 | } |
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| 1374 | } |
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| 1375 | printf ("Ethernet address: %s\n", pether (cbuf, iface->hwaddr)); |
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| 1376 | iface->raw = sonic_raw; |
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| 1377 | iface->stop = sonic_stop; |
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| 1378 | iface->show = sonic_show; |
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| 1379 | dp->iface = iface; |
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| 1380 | setencap (iface, "Ethernet"); |
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| 1381 | |
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| 1382 | /* |
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| 1383 | * Set up SONIC hardware |
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| 1384 | */ |
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| 1385 | sonic_initialize_hardware (dp, broadcastFlag); |
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| 1386 | |
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| 1387 | /* |
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| 1388 | * Chain onto list of interfaces |
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| 1389 | */ |
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| 1390 | iface->next = Ifaces; |
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| 1391 | Ifaces = iface; |
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| 1392 | |
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| 1393 | /* |
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| 1394 | * Start I/O daemons |
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| 1395 | */ |
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| 1396 | cp = if_name (iface, " tx"); |
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| 1397 | iface->txproc = newproc (cp, 2048, if_tx, iface->dev, iface, NULL, 0); |
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| 1398 | free (cp); |
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| 1399 | cp = if_name (iface, " rx"); |
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| 1400 | iface->rxproc = newproc (cp, 2048, sonic_rx, iface->dev, iface, dp, 0); |
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| 1401 | free (cp); |
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| 1402 | return 0; |
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| 1403 | } |
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[7fc5d54e] | 1404 | |
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[e995f3a1] | 1405 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
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[7fc5d54e] | 1406 | #include <stdio.h> |
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| 1407 | |
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[dddc0557] | 1408 | char SONIC_Reg_name[64][6]= { |
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| 1409 | "CR", /* 0x00 */ |
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| 1410 | "DCR", /* 0x01 */ |
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| 1411 | "RCR", /* 0x02 */ |
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| 1412 | "TCR", /* 0x03 */ |
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| 1413 | "IMR", /* 0x04 */ |
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| 1414 | "ISR", /* 0x05 */ |
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| 1415 | "UTDA", /* 0x06 */ |
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| 1416 | "CTDA", /* 0x07 */ |
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| 1417 | "0x08", /* 0x08 */ |
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| 1418 | "0x09", /* 0x09 */ |
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| 1419 | "0x0A", /* 0x0A */ |
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| 1420 | "0x0B", /* 0x0B */ |
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| 1421 | "0x0C", /* 0x0C */ |
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| 1422 | "URDA", /* 0x0D */ |
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| 1423 | "CRDA", /* 0x0E */ |
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| 1424 | "0x0F", /* 0x0F */ |
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| 1425 | "0x10", /* 0x10 */ |
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| 1426 | "0x11", /* 0x11 */ |
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| 1427 | "0x12", /* 0x12 */ |
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| 1428 | "EOBC", /* 0x13 */ |
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| 1429 | "URRA", /* 0x14 */ |
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| 1430 | "RSA", /* 0x15 */ |
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| 1431 | "REA", /* 0x16 */ |
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| 1432 | "RRP", /* 0x17 */ |
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| 1433 | "RWP", /* 0x18 */ |
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| 1434 | "0x19", /* 0x19 */ |
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| 1435 | "0x1A", /* 0x1A */ |
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| 1436 | "0x1B", /* 0x1B */ |
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| 1437 | "0x1C", /* 0x1C */ |
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| 1438 | "0x0D", /* 0x1D */ |
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| 1439 | "0x1E", /* 0x1E */ |
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| 1440 | "0x1F", /* 0x1F */ |
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| 1441 | "0x20", /* 0x20 */ |
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| 1442 | "CEP", /* 0x21 */ |
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| 1443 | "CAP2", /* 0x22 */ |
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| 1444 | "CAP1", /* 0x23 */ |
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| 1445 | "CAP0", /* 0x24 */ |
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| 1446 | "CE", /* 0x25 */ |
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| 1447 | "CDP", /* 0x26 */ |
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| 1448 | "CDC", /* 0x27 */ |
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| 1449 | "SR", /* 0x28 */ |
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| 1450 | "WT0", /* 0x29 */ |
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| 1451 | "WT1", /* 0x2A */ |
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| 1452 | "RSC", /* 0x2B */ |
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| 1453 | "CRCT", /* 0x2C */ |
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| 1454 | "FAET", /* 0x2D */ |
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| 1455 | "MPT", /* 0x2E */ |
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| 1456 | "MDT", /* 0x2F */ |
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| 1457 | "0x30", /* 0x30 */ |
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| 1458 | "0x31", /* 0x31 */ |
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| 1459 | "0x32", /* 0x32 */ |
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| 1460 | "0x33", /* 0x33 */ |
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| 1461 | "0x34", /* 0x34 */ |
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| 1462 | "0x35", /* 0x35 */ |
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| 1463 | "0x36", /* 0x36 */ |
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| 1464 | "0x37", /* 0x37 */ |
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| 1465 | "0x38", /* 0x38 */ |
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| 1466 | "0x39", /* 0x39 */ |
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| 1467 | "0x3A", /* 0x3A */ |
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| 1468 | "0x3B", /* 0x3B */ |
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| 1469 | "0x3C", /* 0x3C */ |
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| 1470 | "0x3D", /* 0x3D */ |
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| 1471 | "0x3E", /* 0x3E */ |
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| 1472 | "DCR2" /* 0x3F */ |
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| 1473 | }; |
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| 1474 | #endif |
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[7fc5d54e] | 1475 | void sonic_write_register( |
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| 1476 | void *base, |
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| 1477 | unsigned32 regno, |
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| 1478 | unsigned32 value |
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| 1479 | ) |
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| 1480 | { |
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| 1481 | volatile unsigned32 *p = base; |
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| 1482 | |
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[e995f3a1] | 1483 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
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| 1484 | printf( "%p Write 0x%04x to %s (0x%02x)\n", |
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| 1485 | &p[regno], value, SONIC_Reg_name[regno], regno ); |
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[7fc5d54e] | 1486 | fflush( stdout ); |
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| 1487 | #endif |
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| 1488 | p[regno] = value; |
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| 1489 | } |
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| 1490 | |
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| 1491 | unsigned32 sonic_read_register( |
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| 1492 | void *base, |
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| 1493 | unsigned32 regno |
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| 1494 | ) |
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| 1495 | { |
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| 1496 | volatile unsigned32 *p = base; |
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| 1497 | unsigned32 value; |
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| 1498 | |
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| 1499 | value = p[regno]; |
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[e995f3a1] | 1500 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
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| 1501 | printf( "%p Read 0x%04x from %s (0x%02x)\n", |
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| 1502 | &p[regno], value, SONIC_Reg_name[regno], regno ); |
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[7fc5d54e] | 1503 | fflush( stdout ); |
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| 1504 | #endif |
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| 1505 | return value; |
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| 1506 | } |
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