1 | /* |
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2 | * DMV177 SONIC Configuration Information |
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3 | * |
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4 | * References: |
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5 | * |
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6 | * 1) SVME/DMV-171 Single Board Computer Documentation Package, #805905, |
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7 | * DY 4 Systems Inc., Kanata, Ontario, September, 1996. |
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8 | * |
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9 | * $Id$ |
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10 | */ |
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11 | |
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12 | #include <bsp.h> |
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13 | #include <rtems/rtems_bsdnet.h> |
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14 | #include <libchip/sonic.h> |
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15 | |
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16 | void dmv177_sonic_write_register( |
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17 | void *base, |
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18 | unsigned32 regno, |
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19 | unsigned32 value |
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20 | ) |
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21 | { |
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22 | volatile unsigned32 *p = base; |
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23 | |
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24 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
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25 | printf( "%p Write 0x%04x to %s (0x%02x)\n", |
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26 | &p[regno], value, SONIC_Reg_name[regno], regno ); |
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27 | fflush( stdout ); |
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28 | #endif |
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29 | p[regno] = value; |
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30 | } |
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31 | |
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32 | unsigned32 dmv177_sonic_read_register( |
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33 | void *base, |
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34 | unsigned32 regno |
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35 | ) |
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36 | { |
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37 | volatile unsigned32 *p = base; |
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38 | unsigned32 value; |
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39 | |
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40 | value = p[regno]; |
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41 | #if (SONIC_DEBUG & SONIC_DEBUG_PRINT_REGISTERS) |
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42 | printf( "%p Read 0x%04x from %s (0x%02x)\n", |
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43 | &p[regno], value, SONIC_Reg_name[regno], regno ); |
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44 | fflush( stdout ); |
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45 | #endif |
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46 | return value; |
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47 | } |
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48 | |
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49 | /* |
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50 | * Default sizes of transmit and receive descriptor areas |
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51 | */ |
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52 | #define RDA_COUNT 20 /* 20 */ |
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53 | #define TDA_COUNT 20 /* 10 */ |
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54 | |
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55 | /* |
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56 | * Default device configuration register values |
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57 | * Conservative, generic values. |
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58 | * DCR: |
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59 | * No extended bus mode |
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60 | * Unlatched bus retry |
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61 | * Programmable outputs unused |
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62 | * Asynchronous bus mode |
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63 | * User definable pins unused |
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64 | * No wait states (access time controlled by DTACK*) |
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65 | * 32-bit DMA |
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66 | * Empty/Fill DMA mode |
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67 | * Maximum Transmit/Receive FIFO |
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68 | * DC2: |
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69 | * Extended programmable outputs unused |
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70 | * Normal HOLD request |
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71 | * Packet compress output unused |
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72 | * No reject on CAM match |
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73 | */ |
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74 | #define SONIC_DCR \ |
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75 | (DCR_DW32 | DCR_WAIT0 | DCR_PO0 | DCR_PO1 | DCR_RFT24 | DCR_TFT28) |
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76 | #ifndef SONIC_DCR |
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77 | # define SONIC_DCR (DCR_DW32 | DCR_TFT28) |
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78 | #endif |
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79 | #ifndef SONIC_DC2 |
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80 | # define SONIC_DC2 (0) |
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81 | #endif |
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82 | |
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83 | /* |
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84 | * Default location of device registers |
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85 | */ |
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86 | #ifndef SONIC_BASE_ADDRESS |
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87 | # define SONIC_BASE_ADDRESS 0xF3000000 |
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88 | # warning "Using default SONIC_BASE_ADDRESS." |
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89 | #endif |
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90 | |
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91 | /* |
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92 | * Default interrupt vector |
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93 | */ |
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94 | #ifndef SONIC_VECTOR |
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95 | # define SONIC_VECTOR 1 |
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96 | # warning "Using default SONIC_VECTOR." |
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97 | #endif |
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98 | |
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99 | sonic_configuration_t dmv177_sonic_configuration = { |
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100 | SONIC_BASE_ADDRESS, /* base address */ |
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101 | SONIC_VECTOR, /* vector number */ |
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102 | SONIC_DCR, /* DCR register value */ |
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103 | SONIC_DC2, /* DC2 register value */ |
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104 | TDA_COUNT, /* number of transmit descriptors */ |
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105 | RDA_COUNT, /* number of receive descriptors */ |
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106 | dmv177_sonic_write_register, |
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107 | dmv177_sonic_read_register |
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108 | }; |
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109 | |
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110 | int rtems_dmv177_sonic_driver_attach(struct rtems_bsdnet_ifconfig *config) |
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111 | { |
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112 | return rtems_sonic_driver_attach( config, &dmv177_sonic_configuration ); |
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113 | |
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114 | } |
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