[91f16d5] | 1 | # |
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| 2 | # Quirks in the DY-4 DMV177 |
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| 3 | # |
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| 4 | # $Id$ |
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| 5 | # |
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| 6 | |
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| 7 | Exar 88681 Clock |
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| 8 | ================ |
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| 9 | This board uses a different clock for the Exar 88681 DUART than is |
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| 10 | documented in the Exar manual or the original MC68681 manual. This |
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| 11 | resulted in the need for the the mc68681 libchip driver to support |
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| 12 | BSP specific baud rate tables and the development of a DMV177 |
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| 13 | specific baud rate table. |
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| 14 | |
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| 15 | In the end, this all works but you have a very limited range of |
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| 16 | useful baud rates on the 88681 ports compared to what would have |
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| 17 | been supported had DY-4 just followed the Exar or Motorola manual. |
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| 18 | |
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| 19 | |
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| 20 | SCC Addresses |
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| 21 | ============= |
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| 22 | The full set of SCC addresses is not documented in the DY-4 manual |
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| 23 | and they are not ordered as one would expect. Normally the four |
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| 24 | SCC registers are ordered Control A, Data A, Control B, and Data B. |
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| 25 | DY-4 orders them with B first. |
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| 26 | |
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| 27 | This required extra time to debug. |
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| 28 | |
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| 29 | |
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| 30 | SCV64 and the Foundation Firmware |
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| 31 | ================================= |
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| 32 | DY-4 technical support did not offer code to determine which interrupt |
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| 33 | sources were pending at the SCV64. They recommended calling into the |
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| 34 | Foundation Firmware ROM monitor to figure this out. The Foundation |
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| 35 | Firmware did not recognize enough interrupts on this board to be useful. |
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| 36 | |
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| 37 | In the end, we gave up on their technical support's recommendation |
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| 38 | and directly manipulated the SVC64. This is what we wanted to do in |
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| 39 | the first place but we got no information from them to aid in this. |
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| 40 | Luckily, the manual does document enough of DY-4's mapping of the specific |
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| 41 | interrupt sources to make this work. |
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| 42 | |
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| 43 | |
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| 44 | Z85C30 SCC Clock Speed |
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| 45 | ====================== |
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| 46 | |
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| 47 | The Z85C30 SCC can be factory configured for 10 Mhz or 2.4616 Mhz. Code |
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| 48 | had to be added to dynamically determine which clock was installed. |
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| 49 | |
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| 50 | The board we had used a 10 Mhz clock. No testing was done with a 2.4616 Mhz |
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| 51 | clock. |
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| 52 | |
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| 53 | |
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| 54 | P2 Octopus Cable |
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| 55 | ================ |
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| 56 | |
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| 57 | DY-4's P2 breakout is large and a bit unwieldy. It was difficult to |
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| 58 | fight into the VME cage we used. The SCSI connector comes off the |
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| 59 | side and is very stiff thus making it difficult to route around |
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| 60 | anything in the back of the cage. We gave up on trying to use |
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| 61 | it in the first few slots of OAR's cage. |
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