source: rtems/c/src/lib/libbsp/powerpc/beatnik/startup/bspstart.c @ 8ca372e

5
Last change on this file since 8ca372e was 8ca372e, checked in by Sebastian Huber <sebastian.huber@…>, on 01/26/16 at 09:11:48

Use linker set for MPCI initialization

Update #2408.

  • Property mode set to 100644
File size: 10.6 KB
RevLine 
[b7a6d23a]1/*
[dbd8b307]2 *  This routine does the bulk of the system initialization.
3 */
4
5/*
[b7a6d23a]6 *  COPYRIGHT (c) 1989-1998.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.OARcorp.com/rtems/license.html.
12 *
13 *  Modified to support the MCP750.
14 *  Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
15 *
16 *  Modified to support the Synergy VGM & Motorola PowerPC boards.
17 *  (C) by Till Straumann, <strauman@slac.stanford.edu>, 2002, 2004, 2005
18 *
19 *  Modified to support the mvme5500 BSP
20 *  (C) by Kate Feng <feng1@bnl.gov>, 2003, 2004
21 *      under the contract DE-AC02-98CH10886 with the Deaprtment of Energy
22 *
23 *  T. Straumann: 2005-2007; stolen again for 'beatnik'...
24 */
25#include <string.h>
26#include <stdlib.h>
27#include <ctype.h>
28
29#include <rtems/system.h>
30#include <rtems/libio.h>
31#include <rtems/libcsupport.h>
32#include <rtems/bspIo.h>
[24bf11e]33#include <rtems/counter.h>
[b7a6d23a]34#include <rtems/powerpc/powerpc.h>
35/*#include <bsp/consoleIo.h>*/
36#include <libcpu/spr.h>   /* registers.h is included here */
37#include <bsp.h>
[dbd8b307]38#include <bsp/bootcard.h>
[b7a6d23a]39#include <bsp/uart.h>
40#include <bsp/pci.h>
41#include <bsp/gtreg.h>
42#include <bsp/gt_timer.h>
43#include <libcpu/bat.h>
44#include <libcpu/pte121.h>
45#include <libcpu/cpuIdent.h>
46#include <bsp/vectors.h>
47#include <bsp/vpd.h>
48
49#define SHOW_MORE_INIT_SETTINGS
50
[5650235]51BSP_output_char_function_type     BSP_output_char = BSP_output_char_via_serial;
52BSP_polling_getchar_function_type BSP_poll_char = NULL;
[b7a6d23a]53
54extern Triv121PgTbl BSP_pgtbl_setup(unsigned int *);
55extern void BSP_pgtbl_activate(Triv121PgTbl);
56extern void BSP_motload_pci_fixup(void);
57
58extern unsigned long __rtems_end[];
59
60/* We really shouldn't use these since MMUoff also sets IP;
61 * nevertheless, during early init I don't care for now
62 */
63extern void MMUoff(void);
64extern void MMUon(void);
65
66extern uint32_t probeMemoryEnd(void);
67
68SPR_RW(SPRG0)
69SPR_RW(SPRG1)
70SPR_RO(HID1)
71
72/* Table of PLL multipliers for 7455/7457:
7301000   2     00010   7.5       00000   11.5      00001   17
7410000   3     11000   8         10111   12        00101   18
7510100   4     01100   8.5       11111   12.5      00111   20
7610110   5     01111   9         01011   13        01001   21
7710010   5.5   01110   9.5       11100   13.5      01101   24
7811010   6     10101   10        11001   14        11101   28
7901010   6.5   10001   10.5      00011   15        00110   bypass
8000100   7     10011   11        11011   16        11110   off
81*/
82
83/* Sorted according to CFG bits and multiplied by 2 it looks
84 * like this (note that this is in sequential order, not
85 * tabulated as above)
86 */
87signed char mpc7450PllMultByTwo[32] = {
8823,       34,           15,           30,
8914,       36,           2/*bypass*/,  40,
904,        42,           13,           26,
9117,       48,           19,           18,
926,        21,           11,           22,
938,        20,           10,           24,
9416,       28,           12,           32,
9527,       56,           0/*off*/,     25,
96};
97
98uint32_t bsp_clicks_per_usec         = 0;
99
100/*
101 * Total memory using probing.
102 */
103unsigned int BSP_mem_size;
104
105/*
106 * PCI Bus Frequency
107 */
108unsigned int BSP_bus_frequency       = 0xdeadbeef;
109/*
110 * processor clock frequency
111 */
112unsigned int BSP_processor_frequency = 0xdeadbeef;
113
114/*
115 * Time base divisior (bus freq / TB clock)
116 */
117unsigned int BSP_time_base_divisor   = 4000; /* most 604+ CPUs seem to use this */
118
119/* Board identification string */
120char BSP_productIdent[20] = {0};
121char BSP_serialNumber[20] = {0};
122
123/* VPD appends an extra char -- what for ? */
124char BSP_enetAddr0[7] = {0};
125char BSP_enetAddr1[7] = {0};
126
127char *rtems_progname;
128
129#define CMDLINE_BUF_SIZE        2048
130
131static char cmdline_buf[CMDLINE_BUF_SIZE];
132char *BSP_commandline_string = cmdline_buf;
133
134/* this routine is called early and must be safe with a not properly
135 * aligned stack
136 */
[2cb449d]137char *save_boot_params(
138  void *r3,
139  void *r4,
140  void *r5,
141  char *cmdline_start,
142  char *cmdline_end
143)
[b7a6d23a]144{
145int             i=cmdline_end-cmdline_start;
146        if ( i >= CMDLINE_BUF_SIZE )
147                i = CMDLINE_BUF_SIZE-1;
148        else if ( i < 0 )
149                i = 0;
150        memmove(cmdline_buf, cmdline_start, i);
151        cmdline_buf[i]=0;
152    return cmdline_buf;
153}
154
155static BSP_BoardType    board_type = Unknown;
156
157BSP_BoardType
158BSP_getBoardType( void )
159{
160        return board_type;
161}
162
163/*
164 *  bsp_start
165 *
166 *  This routine does the bulk of the system initialization.
167 */
168
169void bsp_start( void )
170{
171  unsigned char  *stack;
172  char           *chpt;
173  uint32_t       intrStackStart;
174  uint32_t       intrStackSize;
175
176  Triv121PgTbl  pt=0;
177
178  VpdBufRec vpdData [] = {
179        { key: ProductIdent, instance: 0, buf: BSP_productIdent, buflen: sizeof(BSP_productIdent) - 1 },
180        { key: SerialNumber, instance: 0, buf: BSP_serialNumber, buflen: sizeof(BSP_serialNumber) - 1 },
181        { key: CpuClockHz,   instance: 0, buf: &BSP_processor_frequency, buflen: sizeof(BSP_processor_frequency)  },
182        { key: BusClockHz,   instance: 0, buf: &BSP_bus_frequency, buflen: sizeof(BSP_bus_frequency)  },
183        { key: EthernetAddr, instance: 0, buf: BSP_enetAddr0, buflen: sizeof(BSP_enetAddr0) },
184        { key: EthernetAddr, instance: 1, buf: BSP_enetAddr1, buflen: sizeof(BSP_enetAddr1) },
185        VPD_END
186  };
187
188  /* T. Straumann: 4/2005
189   *
190   * Need to map the system registers early, so we can printk...
191   * (otherwise we silently die)
192   */
193  /* map the PCI 0, 1 Domain I/O space, GT64260B registers
194   * and the reserved area so that the size is the power of 2.
195   */
196  setdbat(7, BSP_DEV_AND_PCI_IO_BASE, BSP_DEV_AND_PCI_IO_BASE, BSP_DEV_AND_PCI_IO_SIZE, IO_PAGE);
197
198  /* Intersperse messages with actions to help locate problems */
199  printk("-----------------------------------------\n");
200
201  /*
202   * Get CPU identification dynamically. Note that the get_ppc_cpu_type() & friends functions
203   * store the result in global variables so that it can be used latter...
204   * This also verifies that we run on a known CPU.
205   */
206  get_ppc_cpu_type();
207  get_ppc_cpu_revision();
208
209  /* Make sure we detect a known host bridge */
210  BSP_getDiscoveryVersion(/* assert detection */ 1);
211
[f17a8e01]212  printk("Welcome to RTEMS %s\n", _RTEMS_version );
[b7a6d23a]213
214  /* Leave all caches as MotLoad left them. Seems to be fine */
215
216  /*
217   * the initial stack  has aready been set to this value in start.S
218   * so there is no need to set it in r1 again... It is just for info
219   * so that it can be printed without accessing R1.
220   */
[90b6801]221  __asm__ volatile("mr %0, 1":"=r"(stack));
[b7a6d23a]222
223  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
224
225  *((uint32_t *)stack) = 0;
226
227  /*
228   * Initialize the interrupt related settings
229   * SPRG0 = interrupt nesting level count
230   * SPRG1 = software managed IRQ stack
231   *
232   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
233   * some settings below...
234   */
235  intrStackStart = (uint32_t)__rtems_end;
236  intrStackSize  = rtems_configuration_get_interrupt_stack_size();
237
238  /*
239   * Initialize default raw exception handlers. See vectors/vectors_init.c
240   */
[801b5d8]241  ppc_exc_initialize(intrStackStart, intrStackSize);
[b7a6d23a]242
243  printk("CPU: %s\n", get_ppc_cpu_type_name(current_ppc_cpu));
244
245  /*
246   * Initialize RTEMS IRQ system
247   */
248   BSP_rtems_irq_mng_init(0);
249
250  BSP_vpdRetrieveFields(vpdData);
251
252  if ( !strncmp(BSP_productIdent,"MVME5500",8) )
253        board_type = MVME5500;
254  else if ( !strncmp(BSP_productIdent,"MVME6100",8) )
255        board_type = MVME6100;
256
257  printk("Board Type: %s (S/N %s)\n",
258                BSP_productIdent[0] ? BSP_productIdent : "n/a",
259                BSP_serialNumber[0] ? BSP_serialNumber : "n/a");
260
261  if ( 0xdeadbeef == BSP_bus_frequency ) {
262        BSP_bus_frequency       = 133333333;
263        printk("Bus Clock Freq NOT FOUND in VPD; using %10u Hz\n",
264                BSP_bus_frequency);
265  } else {
266        printk("Bus Clock Freq:  %10u Hz\n",
267                BSP_bus_frequency);
268  }
269
270  if ( 0xdeadbeef == BSP_processor_frequency ) {
271        BSP_processor_frequency  = BSP_bus_frequency/2;
272        BSP_processor_frequency *= mpc7450PllMultByTwo[ (_read_HID1() >> (31-19)) & 31 ];
273  }
274  printk("CPU Clock Freq:  %10u Hz\n", BSP_processor_frequency);
275       
276  /* probe real memory size; if it's more than 256M we can't currently access it
277   * since at this point only BAT-0 maps 0..256M
278   */
279  BSP_mem_size                          =  probeMemoryEnd();
280
281  if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) {
282                char            *endp;
283                uint32_t        sz;
284                chpt+=6 /* strlen("MEMSZ=") */;
285                sz = strtoul(chpt, &endp, 0);
286                if ( endp != chpt )
287                        BSP_mem_size = sz;
288  }
289
290  printk("Memory:          %10u bytes\n", BSP_mem_size);
291
292  if ( BSP_mem_size > 0x10000000 ) {
293        uint32_t s;
294        if ( BSP_mem_size > 0x80000000 ) {
295                BSP_mem_size = 0x80000000;
296                printk("Memory clipped to 0x%08x for now, sorry\n", BSP_mem_size);
297        }
298        for ( s = 0x20000000; s < BSP_mem_size ; s<<=1)
299                ;
300        MMUoff();
301        /* since it's currently in use we must first surrender it */
302        setdbat(0, 0, 0, 0, 0);
303        setdbat(0, 0, 0, s, _PAGE_RW);
304        MMUon();
305  }
306
307  printk("-----------------------------------------\n");
308
309  /* Maybe not setup yet because of the warning message */
310
311  /* Allocate and set up the page table mappings
312   * This is only available on >604 CPUs.
313   *
314   * NOTE: This setup routine may modify the available memory
315   *       size. It is essential to call it before
316   *       calculating the workspace etc.
317   */
318  pt = BSP_pgtbl_setup(&BSP_mem_size);
319  if (!pt)
320     printk("WARNING: unable to setup page tables.\n");
321
322#ifdef SHOW_MORE_INIT_SETTINGS
323  printk("Now BSP_mem_size = 0x%x\n",BSP_mem_size);
324#endif
325
326  /*
327   * Set up our hooks
328   */
329
[fd8dca5]330  bsp_clicks_per_usec = BSP_bus_frequency/(BSP_time_base_divisor * 1000);
[24bf11e]331  rtems_counter_initialize_converter(
332    BSP_bus_frequency / (BSP_time_base_divisor / 1000)
333  );
[b7a6d23a]334
335#ifdef SHOW_MORE_INIT_SETTINGS
[c479497]336  printk(
337    "Configuration.work_space_size = %x\n",
338    rtems_configuration_get_work_space_size()
339  );
[b7a6d23a]340#endif
341
342  /* Activate the page table mappings only after
343   * initializing interrupts because the irq_mng_init()
344   * routine needs to modify the text
345   */           
346  if ( pt ) {
347#ifdef SHOW_MORE_INIT_SETTINGS
348    printk("Page table setup finished; will activate it NOW...\n");
349#endif
350    BSP_pgtbl_activate(pt);
351  }
352
353#ifdef SHOW_MORE_INIT_SETTINGS
354  printk("Going to start PCI buses scanning and initialization\n");
355#endif
356  BSP_pci_initialize();
357
358  /* need to tweak the motload setup */
359  BSP_motload_pci_fixup();
360
361  /* map 512M, 256 for PCI 256 for VME */
362  setdbat(5,BSP_PCI_HOSE0_MEM_BASE, BSP_PCI_HOSE0_MEM_BASE, BSP_PCI_HOSE0_MEM_SIZE, IO_PAGE);
363  setdbat(6,BSP_PCI_HOSE1_MEM_BASE, BSP_PCI_HOSE1_MEM_BASE, 0x10000000, IO_PAGE);
364
365#ifdef SHOW_MORE_INIT_SETTINGS
366  printk("Number of PCI buses found is : %d\n", pci_bus_count());
367#endif
368
369  /*
370   * Initialize hardware timer facility (not used by BSP itself)
371   * Needs PCI to identify discovery version...
372   */
373  BSP_timers_initialize();
374
375#ifdef SHOW_MORE_INIT_SETTINGS
376  printk("MSR %x \n", _read_MSR());
377  printk("Exit from bspstart\n");
378#endif
379}
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