source: rtems/c/src/lib/libbsp/powerpc/beatnik/include/bsp.h @ 07d96453

5
Last change on this file since 07d96453 was 1c193a2, checked in by Sebastian Huber <sebastian.huber@…>, on 11/21/17 at 10:43:13

powerpc: Replace BSP_panic() with rtems_panic()

Due to a new rtems_panic() implementation, it is possible to replace the
PowerPC-specific BSP_panic() with rtems_panic(). Remove BSP_panic()
implementations.

Close #3245.

  • Property mode set to 100644
File size: 8.2 KB
Line 
1/*
2 *  bsp.h  -- contain BSP API definition.
3 */
4
5/*
6 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.org/license/LICENSE.
11 *
12 *  S. Kate Feng 2003-2007 : Modified it to support the mvme5500 BSP.
13 *
14 *  Modified for the 'beatnik' BSP by T. Straumann, 2005-2007.
15 */
16
17#ifndef LIBBSP_BEATNIK_BSP_H
18#define LIBBSP_BEATNIK_BSP_H
19
20#ifndef ASM
21
22#include <bspopts.h>
23#include <bsp/default-initial-extension.h>
24
25#include <rtems.h>
26#include <libcpu/io.h>
27#include <bsp/vectors.h>
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/* Board type */
34typedef enum {
35  Unknown = 0,
36  MVME5500,
37  MVME6100
38} BSP_BoardType;
39
40BSP_BoardType BSP_getBoardType(void);
41
42/* Discovery Version */
43
44typedef enum {
45  unknown    = 0,
46  GT_64260_A,      /* Revision 0x10 */
47  GT_64260_B,      /* Revision 0x20 */
48  MV_64360,
49} DiscoveryVersion;
50
51/* Determine the type of discovery chip on this board; info
52 * is cached and repeated calls just return the cached value.
53 *
54 * If a non-zero argument is passed, the routine panics
55 * (rtems_panic) if no recognized bridge is found;
56 */
57DiscoveryVersion BSP_getDiscoveryVersion(int assertion);
58
59/*
60 *  confdefs.h overrides for this BSP:
61 *   - Interrupt stack space is not minimum if defined.
62 */
63#define BSP_INTERRUPT_STACK_SIZE          (16 * 1024)
64
65/*
66 *  base address definitions for several devices
67 */
68#define BSP_MV64x60_BASE        (0xf1000000)
69#define BSP_MV64x60_DEV1_BASE   (0xf1100000)
70#define BSP_UART_IOBASE_COM1    ((BSP_MV64x60_DEV1_BASE)+0x20000)
71#define BSP_UART_IOBASE_COM2    ((BSP_MV64x60_DEV1_BASE)+0x21000)
72#define BSP_UART_USE_SHARED_IRQS
73
74#define BSP_NVRAM_BASE_ADDR      (0xf1110000)
75#define BSP_NVRAM_END_ADDR       (0xf1117fff)
76#define BSP_NVRAM_RTC_START      (0xf1117ff8)
77
78#define BSP_NVRAM_BOOTPARMS_START  (0xf1111000)
79#define BSP_NVRAM_BOOTPARMS_END    (0xf1111fff)
80
81
82/* This is only active/used during early init. It defines
83 * the hose0 base for the shared/generic pci code.
84 * Our own BSP specific pci initialization will then
85 * override the PCI configuration (see gt_pci_init.c:BSP_pci_initialize)
86 */
87
88#define PCI_CONFIG_ADDR        (BSP_MV64x60_BASE + 0xcf8)
89#define PCI_CONFIG_DATA        (BSP_MV64x60_BASE + 0xcfc)
90
91/* our wonderful PCI initialization remaps everything to CPU addresses
92 * - before calling BSP_pci_initialize() this is NOT VALID, however
93 * and the deprecated inl()/outl() etc won't work!
94 */
95#define _IO_BASE          0x00000000
96/* wonderful MotLoad has the base address as seen from the
97 * CPU programmed into config space :-)
98 */
99#define PCI_MEM_BASE               0
100#define PCI_MEM_BASE_ADJUSTMENT    0
101#define PCI_DRAM_OFFSET            0
102
103extern void BSP_motload_pci_fixup(void);
104
105/* PCI <-> local address mapping - no sophisticated windows
106 * (i.e., no support for cached regions etc. you read a BAR
107 * from config space and that's 1:1 where the CPU sees it).
108 * Our memory is mapped 1:1 to PCI also.
109 */
110#define BSP_PCI2LOCAL_ADDR(a) ((uint32_t)(a))
111#define BSP_LOCAL2PCI_ADDR(a) ((uint32_t)(a))
112
113#define BSP_CONFIG_NUM_PCI_CACHE_SLOTS  32
114
115#define BSP_CONSOLE_PORT      BSP_UART_COM1
116#define BSP_UART_BAUD_BASE    115200
117
118/* I2C Devices */
119/* Note that the i2c addresses stated in the manual are
120 * left-shifted by one bit.
121 */
122#define BSP_VPD_I2C_ADDR      (0xA8>>1)    /* the VPD EEPROM  */
123#define BSP_USR_I2C_ADDR      (0xAA>>1)    /* the user EEPROM */
124#define BSP_THM_I2C_ADDR      (0x90>>1)    /* the DS1621 temperature sensor & thermostat */
125
126#define BSP_I2C_BUS_DESCRIPTOR    gt64260_i2c_bus_descriptor
127
128#define BSP_I2C_BUS0_NAME             "/dev/i2c0"
129
130#define BSP_I2C_VPD_EEPROM_NAME       "vpd-eeprom"
131#define BSP_I2C_USR_EEPROM_NAME       "usr-eeprom"
132#define BSP_I2C_DS1621_NAME           "ds1621"
133#define BSP_I2C_THM_NAME              BSP_I2C_DS1621_NAME
134#define BSP_I2C_DS1621_RAW_NAME       "ds1621-raw"
135
136#define  BSP_I2C_VPD_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_VPD_EEPROM_NAME)
137#define  BSP_I2C_USR_EEPROM_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_USR_EEPROM_NAME)
138#define  BSP_I2C_DS1621_DEV_NAME          (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_NAME)
139#define BSP_I2C_THM_DEV_NAME              BSP_I2C_DS1621_DEV_NAME
140#define  BSP_I2C_DS1621_RAW_DEV_NAME      (BSP_I2C_BUS0_NAME"."BSP_I2C_DS1621_RAW_NAME)
141
142
143/* Initialize the I2C driver and register all devices
144 * RETURNS 0 on success, -1 on error.
145 *
146 * Access to the VPD and user EEPROMS as well
147 * as the ds1621 temperature sensor is possible
148 * by means of file nodes
149 *
150 *   /dev/i2c0.vpd-eeprom   (read-only)
151 *   /dev/i2c0.usr-eeprom   (read-write)
152 *   /dev/i2c0.ds1621       (read-only; one byte: board-temp in degC)
153 *   /dev/i2c0.ds1621-raw   (read-write; transfer bytes to/from the ds1621)
154 */
155int BSP_i2c_initialize(void);
156
157/* Networking; */
158#if defined(RTEMS_NETWORKING)
159#include <bsp/bsp_bsdnet_attach.h>
160#endif
161
162/* NOT FOR PUBLIC USE BELOW HERE */
163#define BSP_PCI_HOSE0_MEM_BASE    0x80000000  /* must be aligned to size */
164#define BSP_PCI_HOSE0_MEM_SIZE    0x20000000
165
166#define BSP_PCI_HOSE1_MEM_BASE    0xe0000000
167
168#define BSP_DEV_AND_PCI_IO_BASE   0xf0000000
169#define BSP_DEV_AND_PCI_IO_SIZE   0x10000000
170
171/* maintain coherency between CPU and GT64340 Ethernet
172 * (andpossibly other Discovery components).
173 */
174#define BSP_RW_PAGE_ATTRIBUTES  TRIV121_ATTR_M
175
176extern unsigned BSP_pci_hose1_bus_base;
177
178void BSP_pci_initialize(void);
179
180/* Exception Handling */
181
182/* Use a task notepad to attach user exception handler info;
183 * may be changed by application startup code (EPICS uses 11)
184 */
185#define BSP_EXCEPTION_NOTEPAD    14
186 
187#ifndef ASM
188
189#define outport_byte(port,value) outb(value,port)
190#define outport_word(port,value) outw(value,port)
191#define outport_long(port,value) outl(value,port)
192
193#define inport_byte(port,value) (value = inb(port))
194#define inport_word(port,value) (value = inw(port))
195#define inport_long(port,value) (value = inl(port))
196/*
197 * Vital Board data Start using DATA RESIDUAL
198 */
199/*
200 * Total memory using RESIDUAL DATA
201 */
202extern unsigned int BSP_mem_size;
203/*
204 * Start of the heap
205 */
206extern unsigned int BSP_heap_start;
207/*
208 * PCI Bus Frequency
209 */
210extern unsigned int BSP_bus_frequency;
211/*
212 * processor clock frequency
213 */
214extern unsigned int BSP_processor_frequency;
215/*
216 * Time base divisior (how many tick for 1 second).
217 */
218extern unsigned int BSP_time_base_divisor;
219
220extern char BSP_productIdent[20];
221extern char BSP_serialNumber[20];
222
223extern char BSP_enetAddr0[7];
224extern char BSP_enetAddr1[7];
225
226/*
227 * The commandline as passed from the bootloader.
228 */
229extern char *BSP_commandline_string;
230
231
232#define BSP_Convert_decrementer( _value ) \
233  ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
234
235extern rtems_configuration_table  BSP_Configuration;
236extern void bsp_reset(void);
237extern int BSP_disconnect_clock_handler (void);
238extern int BSP_connect_clock_handler (void);
239
240/* clear hostbridge errors
241 *
242 * enableMCP: whether to enable MCP checkstop / machine check interrupts
243 *            on the hostbridge and in HID0.
244 *
245 *            NOTE: The 5500 and 6100 boards have NO PHYSICAL CONNECTION
246 *                  to MCP so 'enableMCP' will always fail!
247 *
248 * quiet    : be silent
249 *
250 * RETURNS  : PCI status (hose 0 in byte 0, host 1 in byte 1) and
251 *            VME bridge status (upper 16 bits).
252 *            Zero if no errors were found.
253 */
254extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
255
256/* clear vme bridge errors and return (bridge-dependent) 16-bit status
257 *
258 * quiet    : be silent
259 *
260 * RETURNS  : 0 if there were no errors, non-zero, bridge-dependent
261 *            16-bit error status on error.
262 *
263 */
264extern unsigned short (*_BSP_clear_vmebridge_errors)(int);
265
266/*
267 * Prototypes for debug helpers
268 */
269void discovery_pic_set_debug_irq(int on);
270void discovery_pic_install_debug_irq(void);
271
272/*
273 * Prototypes for methods called only from .S for dependency tracking
274 */
275char *save_boot_params(
276  void *r3,
277  void *r4,
278  void *r5,
279  char *cmdline_start,
280  char *cmdline_end
281);
282void zero_bss(void);
283
284/*
285 * Prototypes for methods in the BSP that cross file boundaries
286 */
287uint32_t probeMemoryEnd(void);
288
289#endif
290
291#ifdef __cplusplus
292}
293#endif
294
295#endif /* !ASM */
296
297#endif
Note: See TracBrowser for help on using the repository browser.