1 | /* |
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2 | * This file contains the template for a console IO package. |
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3 | * |
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4 | * COPYRIGHT (c) 1989-1999. |
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5 | * On-Line Applications Research Corporation (OAR). |
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6 | * |
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7 | * The license and distribution terms for this file may be |
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8 | * found in the file LICENSE in this distribution or at |
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9 | * http://www.rtems.com/license/LICENSE. |
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10 | * |
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11 | * This file adapted from no_bsp board library of the RTEMS distribution. |
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12 | * The body has been modified for the Bender Or1k implementation by |
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13 | * Chris Ziomkowski. <chris@asics.ws> |
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14 | */ |
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15 | |
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16 | #define BENDER_INIT |
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17 | |
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18 | #include <bsp.h> |
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19 | #include <rtems/libio.h> |
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20 | #include "console.h" |
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21 | |
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22 | static int localEcho; |
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23 | static UART_16450* uart = (UART_16450*)0x80000000; /* This is where the simulator puts it */ |
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24 | |
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25 | /* console_initialize |
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26 | * |
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27 | * This routine initializes the console IO driver. |
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28 | * |
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29 | * Input parameters: NONE |
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30 | * |
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31 | * Output parameters: NONE |
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32 | * |
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33 | * Return values: |
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34 | */ |
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35 | |
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36 | void (*old_handler)(unsigned int,unsigned int,unsigned int,unsigned int); |
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37 | |
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38 | void console_interrupt(unsigned int vector,unsigned int pc, |
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39 | unsigned int effective_addr, unsigned int status) |
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40 | { |
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41 | int reason; |
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42 | register int pending; |
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43 | |
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44 | /* First thing's first...is this for us? */ |
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45 | asm volatile ("l.mfspr %0,r0,0x4802 \n\t" /* Read the PIC status */ |
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46 | "l.andi %0,%0,0x4 \n\t" : "=r" (pending)); |
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47 | |
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48 | if(pending) |
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49 | { |
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50 | reason = uart->read.IIR; |
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51 | |
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52 | switch(reason) |
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53 | { |
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54 | case 0: /* Interrupt because of modem status */ |
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55 | break; |
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56 | case 2: /* Interrupt because Transmitter empty */ |
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57 | break; |
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58 | case 4: /* Interrupt because Received data available */ |
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59 | break; |
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60 | case 6: /* Interrupt because Status Register */ |
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61 | break; |
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62 | case 12: /* Interrupt because of character timeout (16550 only) */ |
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63 | break; |
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64 | default: /* No interrupt */ |
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65 | break; |
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66 | } |
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67 | } |
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68 | |
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69 | if(old_handler) |
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70 | (*old_handler)(vector,pc,effective_addr,status); |
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71 | } |
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72 | |
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73 | rtems_device_driver console_initialize( |
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74 | rtems_device_major_number major, |
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75 | rtems_device_minor_number minor, |
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76 | void *arg |
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77 | ) |
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78 | { |
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79 | rtems_status_code status; |
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80 | int tmp,tmp2; |
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81 | uint32_t sr; |
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82 | extern uint32_t Or1k_Interrupt_Vectors[16]; |
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83 | |
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84 | /* Make sure the UART (interrupt 2) is enabled and |
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85 | reports a low prority interrupt */ |
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86 | asm volatile ("l.mfspr %0,r0,0x4800 \n\t" /* Get the PIC mask */ |
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87 | "l.ori %0,%0,0x4 \n\t" /* Enable int 2 */ |
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88 | "l.mtspr r0,%0,0x4800 \n\t" /* Write back mask */ |
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89 | "l.mfspr %0,r0,0x4801 \n\t" /* Get priority mask */ |
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90 | "l.addi %1,r0,-5 \n\t" |
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91 | "l.and %0,%0,%1 \n\t" /* Set us to low */ |
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92 | "l.mtspr r0,%0,0x4801 \n\t" /* Write back to PICPR */ |
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93 | : "=r" (tmp), "=r" (tmp2)); |
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94 | |
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95 | /* Install the interrupt handler */ |
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96 | asm volatile ("l.mfspr %0,r0,0x11 \n\t" |
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97 | "l.addi %1,r0,-5 \n\t" |
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98 | "l.and %1,%1,%0 \n\t" |
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99 | "l.mtspr r0,%1,0x11 \n\t": "=&r" (sr) : "r" (tmp)); |
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100 | |
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101 | old_handler = (void(*)(unsigned int,unsigned int,unsigned int,unsigned int)) |
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102 | Or1k_Interrupt_Vectors[5]; |
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103 | Or1k_Interrupt_Vectors[5] = (uint32_t)console_interrupt; |
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104 | |
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105 | asm volatile ("l.mtspr r0,%0,0x11\n\t":: "r" (sr)); |
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106 | |
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107 | /* Assume 1843.2/16 kHz clock */ |
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108 | uart->latch.LCR = 0x80; /* Set the divisor latch bit */ |
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109 | uart->latch.DLM = 2; /* 57,600 */ |
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110 | uart->latch.DLL = 0; |
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111 | uart->write.LCR = 0x03; /* 8-N-1 */ |
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112 | uart->write.MCR = 0x03; /* Assert RTS & DTR */ |
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113 | /* uart->write.FCR = 0x00; */ /* Make sure we're in 16450 mode... Ignore for 16450 driver */ |
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114 | uart->write.IER = 0x05; /* Don't worry about TEMT unless we need to. */ |
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115 | |
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116 | tmp = uart->read.LSR; /* Make sure interrupts are cleared */ |
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117 | tmp = uart->read.RBR; /* Clear the input buffer */ |
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118 | tmp = uart->read.MSR; /* Clear the modem status register */ |
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119 | |
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120 | localEcho = 1; /* Turn on local echo */ |
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121 | |
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122 | status = rtems_io_register_name( |
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123 | "/dev/console", |
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124 | major, |
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125 | (rtems_device_minor_number) 0 |
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126 | ); |
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127 | |
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128 | if (status != RTEMS_SUCCESSFUL) |
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129 | rtems_fatal_error_occurred(status); |
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130 | |
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131 | return RTEMS_SUCCESSFUL; |
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132 | } |
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133 | |
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134 | |
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135 | /* is_character_ready |
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136 | * |
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137 | * This routine returns TRUE if a character is available. |
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138 | * |
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139 | * Input parameters: NONE |
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140 | * |
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141 | * Output parameters: NONE |
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142 | * |
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143 | * Return values: |
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144 | */ |
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145 | |
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146 | rtems_boolean is_character_ready( |
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147 | char *ch |
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148 | ) |
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149 | { |
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150 | *ch = '\0'; /* return NULL for no particular reason */ |
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151 | return(TRUE); |
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152 | } |
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153 | |
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154 | /* inbyte |
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155 | * |
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156 | * This routine reads a character from the SOURCE. |
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157 | * |
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158 | * Input parameters: NONE |
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159 | * |
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160 | * Output parameters: NONE |
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161 | * |
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162 | * Return values: |
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163 | * character read from SOURCE |
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164 | */ |
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165 | |
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166 | char inbyte( void ) |
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167 | { |
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168 | unsigned int stat; |
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169 | |
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170 | stat = uart->read.LSR; |
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171 | while(!(stat & 0x01)) /* ! Data Ready */ |
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172 | { |
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173 | rtems_task_wake_after( RTEMS_YIELD_PROCESSOR ); |
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174 | stat = uart->read.LSR; |
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175 | } |
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176 | |
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177 | return uart->read.RBR; /* Return the character */ |
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178 | } |
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179 | |
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180 | /* outbyte |
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181 | * |
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182 | * This routine transmits a character out the SOURCE. Flow |
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183 | * control is not currently enabled. |
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184 | * |
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185 | * Input parameters: |
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186 | * ch - character to be transmitted |
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187 | * |
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188 | * Output parameters: NONE |
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189 | */ |
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190 | |
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191 | void outbyte(char ch) |
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192 | { |
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193 | unsigned int stat; |
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194 | /* |
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195 | * Carriage Return/New line translation. |
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196 | */ |
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197 | |
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198 | stat = uart->read.LSR; |
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199 | while(!(stat & 0x40)) /* ! TEMT */ |
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200 | { |
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201 | rtems_task_wake_after( RTEMS_YIELD_PROCESSOR ); |
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202 | stat = uart->read.LSR; |
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203 | } |
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204 | |
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205 | uart->write.THR = ch; |
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206 | if ( ch == '\n' ) |
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207 | outbyte( '\r' ); |
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208 | } |
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209 | |
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210 | |
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211 | /* |
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212 | * Open entry point |
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213 | */ |
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214 | |
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215 | rtems_device_driver console_open( |
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216 | rtems_device_major_number major, |
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217 | rtems_device_minor_number minor, |
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218 | void * arg |
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219 | ) |
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220 | { |
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221 | return RTEMS_SUCCESSFUL; |
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222 | } |
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223 | |
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224 | /* |
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225 | * Close entry point |
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226 | */ |
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227 | |
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228 | rtems_device_driver console_close( |
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229 | rtems_device_major_number major, |
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230 | rtems_device_minor_number minor, |
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231 | void * arg |
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232 | ) |
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233 | { |
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234 | return RTEMS_SUCCESSFUL; |
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235 | } |
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236 | |
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237 | /* |
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238 | * read bytes from the serial port. We only have stdin. |
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239 | */ |
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240 | |
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241 | rtems_device_driver console_read( |
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242 | rtems_device_major_number major, |
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243 | rtems_device_minor_number minor, |
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244 | void * arg |
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245 | ) |
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246 | { |
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247 | rtems_libio_rw_args_t *rw_args; |
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248 | char *buffer; |
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249 | int maximum; |
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250 | int count = 0; |
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251 | |
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252 | rw_args = (rtems_libio_rw_args_t *) arg; |
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253 | |
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254 | buffer = rw_args->buffer; |
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255 | maximum = rw_args->count; |
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256 | |
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257 | |
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258 | for (count = 0; count < maximum; count++) |
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259 | { |
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260 | buffer[ count ] = inbyte(); |
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261 | |
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262 | if (buffer[ count ] == '\n' || buffer[ count ] == '\r') |
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263 | { |
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264 | buffer[ count++ ] = '\n'; |
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265 | if(localEcho) |
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266 | outbyte('\n' ); /* newline */ |
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267 | break; /* Return for a newline */ |
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268 | } |
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269 | else if (buffer[ count ] == '\b' && count > 0 ) |
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270 | { |
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271 | if(localEcho) |
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272 | { |
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273 | outbyte('\b' ); /* move back one space */ |
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274 | outbyte(' ' ); /* erase the character */ |
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275 | outbyte('\b' ); /* move back one space */ |
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276 | } |
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277 | count-=2; |
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278 | } |
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279 | else if(localEcho) |
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280 | outbyte(buffer[ count ]); /* echo the character */ |
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281 | } |
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282 | |
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283 | rw_args->bytes_moved = count; |
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284 | return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; |
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285 | } |
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286 | |
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287 | /* |
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288 | * write bytes to the serial port. Stdout and stderr are the same. |
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289 | */ |
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290 | |
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291 | rtems_device_driver console_write( |
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292 | rtems_device_major_number major, |
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293 | rtems_device_minor_number minor, |
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294 | void * arg |
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295 | ) |
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296 | { |
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297 | int count; |
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298 | int maximum; |
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299 | rtems_libio_rw_args_t *rw_args; |
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300 | char *buffer; |
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301 | |
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302 | rw_args = (rtems_libio_rw_args_t *) arg; |
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303 | |
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304 | buffer = rw_args->buffer; |
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305 | maximum = rw_args->count; |
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306 | |
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307 | for (count = 0; count < maximum; count++) { |
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308 | if ( buffer[ count ] == '\n') { |
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309 | outbyte('\r'); |
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310 | } |
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311 | outbyte( buffer[ count ] ); |
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312 | } |
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313 | |
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314 | rw_args->bytes_moved = maximum; |
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315 | return 0; |
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316 | } |
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317 | |
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318 | /* |
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319 | * IO Control entry point |
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320 | */ |
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321 | |
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322 | rtems_device_driver console_control( |
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323 | rtems_device_major_number major, |
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324 | rtems_device_minor_number minor, |
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325 | void * arg |
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326 | ) |
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327 | { |
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328 | int param,div; |
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329 | ConsoleIOCTLRequest* request = (ConsoleIOCTLRequest*)arg; |
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330 | |
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331 | if (!arg) |
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332 | return RTEMS_INVALID_ADDRESS; |
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333 | |
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334 | switch(request->command) |
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335 | { |
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336 | case TERM_LOCAL_ECHO: |
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337 | param = (int)(request->data); |
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338 | if(param < 0 || param > 1) |
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339 | return RTEMS_INVALID_NUMBER; |
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340 | localEcho = param; |
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341 | break; |
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342 | case TERM_BIT_RATE: |
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343 | param = (int)(request->data); |
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344 | switch(param) |
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345 | { |
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346 | case 50: |
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347 | case 150: |
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348 | case 300: |
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349 | case 600: |
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350 | case 1200: |
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351 | case 1800: |
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352 | case 2000: |
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353 | case 2400: |
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354 | case 3600: |
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355 | case 4800: |
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356 | case 7200: |
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357 | case 9600: |
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358 | case 19200: |
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359 | case 38400: |
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360 | case 57600: |
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361 | case 115200: |
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362 | div = 115200/param; |
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363 | uart->latch.LCR |= 0x80; /* Set the divisor latch bit */ |
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364 | uart->latch.DLM = div & 0xFF; |
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365 | uart->latch.DLL = div >> 8; |
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366 | uart->write.LCR &= 0x7F; /* Clear the divisor latch bit */ |
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367 | break; |
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368 | default: |
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369 | return RTEMS_INVALID_NUMBER; |
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370 | } |
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371 | break; |
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372 | default: |
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373 | return RTEMS_NOT_CONFIGURED; |
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374 | } |
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375 | |
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376 | return RTEMS_SUCCESSFUL; |
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377 | } |
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