source: rtems/c/src/lib/libbsp/or1k/shared/include/cache_.h @ c080c343

4.115
Last change on this file since c080c343 was c080c343, checked in by Hesham ALMatary <heshamelmatary@…>, on 09/16/14 at 17:30:46

or1k: New cache manager.

Implement new cache functions for or1k and create new bspstart function
for or1ksim to initialize instruction and data caches. Also, sim.cfg
is modified to enable/confiure cache units.

  • Property mode set to 100644
File size: 1007 bytes
Line 
1/*
2 * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
3 *
4 * The license and distribution terms for this file may be
5 * found in the file LICENSE in this distribution or at
6 * http://www.rtems.org/license/LICENSE.
7 */
8
9#ifndef LIBBSP_OR1K_SHARED_CACHE_H
10#define LIBBSP_OR1K_SHARED_CACHE_H
11
12#include <assert.h>
13#include <bsp.h>
14#include <rtems/rtems/intr.h>
15
16
17#ifdef __cplusplus
18extern "C" {
19#endif /* __cplusplus */
20
21/* These two defines also ensure that the rtems_cache_* functions have bodies */
22#define CPU_DATA_CACHE_ALIGNMENT        32
23#define CPU_INSTRUCTION_CACHE_ALIGNMENT 32
24
25#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS 1
26
27static inline size_t
28_CPU_cache_get_data_cache_size( const uint32_t level )
29{
30  return (level == 0 || level == 1)? 8192 : 0;
31}
32
33static inline size_t
34_CPU_cache_get_instruction_cache_size( const uint32_t level )
35{
36  return (level == 0 || level == 1)? 8192 : 0;
37}
38
39#ifdef __cplusplus
40}
41#endif /* __cplusplus */
42
43#endif /* LIBBSP_OR1K_SHARED_CACHE_H */
Note: See TracBrowser for help on using the repository browser.