source: rtems/c/src/lib/libbsp/or1k/or1ksim/clock/clockdrv.c @ d2c76160

4.115
Last change on this file since d2c76160 was d2c76160, checked in by Hesham ALMatary <heshamelmatary@…>, on 09/15/14 at 22:33:31

or1ksim: Implement cpu counter functions.

  • Property mode set to 100644
File size: 4.0 KB
Line 
1/**
2 * @file
3 *
4 * @ingroup bsp_clock
5 *
6 * @brief or1ksim clock support.
7 */
8
9/*
10 * or1ksim Clock driver
11 *
12 * COPYRIGHT (c) 2014 Hesham ALMatary <heshamelmatary@gmail.com>
13 *
14 * The license and distribution terms for this file may be
15 * found in the file LICENSE in this distribution or at
16 * http://www.rtems.org/license/LICENSE
17 */
18
19#include <rtems.h>
20#include <bsp.h>
21#include <bsp/irq.h>
22#include <bsp/or1ksim.h>
23#include <rtems/score/cpu.h>
24#include <rtems/score/or1k-utility.h>
25
26/* The number of clock cycles before generating a tick timer interrupt. */
27#define TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT     0x09ED9
28#define OR1KSIM_CLOCK_CYCLE_TIME_NANOSECONDS  10
29
30/* CPU counter */
31static CPU_Counter_ticks cpu_counter_ticks;
32
33/* This prototype is added here to Avoid warnings */
34void Clock_isr(void *arg);
35
36static void or1ksim_clock_at_tick(void)
37{
38  uint32_t TTMR;
39
40 /* For TTMR register,
41  * The least significant 28 bits are the number of clock cycles
42  * before generating a tick timer interrupt. While the most
43  * significant 4 bits are used for mode configuration, tick timer
44  * interrupt enable and pending interrupts status.
45  */
46  TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
47           (TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT & CPU_OR1K_SPR_TTMR_TP_MASK)
48         ) & ~(CPU_OR1K_SPR_TTMR_IP);
49
50  _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
51  _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
52
53  cpu_counter_ticks += TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT;
54}
55
56static void or1ksim_clock_handler_install(proc_ptr new_isr, proc_ptr old_isr)
57{
58  rtems_status_code sc = RTEMS_SUCCESSFUL;
59  old_isr = NULL;
60  _CPU_ISR_install_vector(OR1K_EXCEPTION_TICK_TIMER,
61                          new_isr,
62                          old_isr);
63
64  if (sc != RTEMS_SUCCESSFUL) {
65    rtems_fatal_error_occurred(0xdeadbeef);
66  }
67}
68
69static void or1ksim_clock_initialize(void)
70{
71  uint32_t TTMR;
72
73 /* For TTMR register,
74  * The least significant 28 bits are the number of clock cycles
75  * before generating a tick timer interrupt. While the most
76  * significant 4 bits are used for mode configuration, tick timer
77  * interrupt enable and pending interrupts status.
78  */
79
80  /* FIXME: Long interval should pass since initializing the tick timer
81   * registers fires exceptions dispite interrupts has not been enabled yet.
82   */
83  TTMR = (CPU_OR1K_SPR_TTMR_MODE_RESTART | CPU_OR1K_SPR_TTMR_IE |
84           (0xFFED9 & CPU_OR1K_SPR_TTMR_TP_MASK)
85         ) & ~(CPU_OR1K_SPR_TTMR_IP);
86
87  _OR1K_mtspr(CPU_OR1K_SPR_TTMR, TTMR);
88  _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
89
90  /* Initialize CPU Counter */
91  cpu_counter_ticks = 0;
92}
93
94 static void or1ksim_clock_cleanup(void)
95{
96 uint32_t sr;
97
98  sr = _OR1K_mfspr(CPU_OR1K_SPR_SR);
99
100  /* Disable tick timer exceptions */
101  _OR1K_mtspr(CPU_OR1K_SPR_SR, (sr & ~CPU_OR1K_SPR_SR_IEE)
102  & ~CPU_OR1K_SPR_SR_TEE);
103
104  /* Invalidate tick timer config registers */
105  _OR1K_mtspr(CPU_OR1K_SPR_TTCR, 0);
106  _OR1K_mtspr(CPU_OR1K_SPR_TTMR, 0);
107}
108
109/*
110 *  Return the nanoseconds since last tick
111 */
112static uint32_t or1ksim_clock_nanoseconds_since_last_tick(void)
113{
114  return
115  TTMR_NUM_OF_CLOCK_TICKS_INTERRUPT * OR1KSIM_CLOCK_CYCLE_TIME_NANOSECONDS;
116}
117
118CPU_Counter_ticks _CPU_Counter_read(void)
119{
120  uint32_t ticks_since_last_timer_interrupt;
121
122  ticks_since_last_timer_interrupt = _OR1K_mfspr(CPU_OR1K_SPR_TTCR);
123
124  return cpu_counter_ticks + ticks_since_last_timer_interrupt;
125}
126
127CPU_Counter_ticks _CPU_Counter_difference(
128  CPU_Counter_ticks second,
129  CPU_Counter_ticks first
130)
131{
132  return second - first;
133}
134#define Clock_driver_support_at_tick() or1ksim_clock_at_tick()
135
136#define Clock_driver_support_initialize_hardware() or1ksim_clock_initialize()
137
138#define Clock_driver_support_install_isr(isr, old_isr) \
139  do {                                                 \
140    or1ksim_clock_handler_install(isr, old_isr);               \
141    old_isr = NULL;                                    \
142  } while (0)
143
144#define Clock_driver_support_shutdown_hardware() or1ksim_clock_cleanup()
145
146#define Clock_driver_nanoseconds_since_last_tick \
147  or1ksim_clock_nanoseconds_since_last_tick
148
149#include "../../../shared/clockdrv_shell.h"
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