source: rtems/c/src/lib/libbsp/nios2/nios2_iss/include/bsp.h @ f0f8e4d

4.104.115
Last change on this file since f0f8e4d was f0f8e4d, checked in by Joel Sherrill <joel.sherrill@…>, on Mar 3, 2009 at 12:10:56 AM

2009-03-02 Joel Sherrill <joel.sherrill@…>

  • Makefile.am, preinstall.am, include/bsp.h, startup/setvec.c: Now compiles again but applications do not link.
  • Property mode set to 100644
File size: 4.2 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
5 *  XXX : put yours in here
6 *
7 *  COPYRIGHT (c) 1989-1999.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.com/license/LICENSE.
13 *
14 *  $Id$
15 */
16
17#ifndef _BSP_H
18#define _BSP_H
19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24#include <stdint.h>
25#include <bspopts.h>
26
27#include <rtems.h>
28#include <rtems/console.h>
29#include <rtems/clockdrv.h>
30
31
32/*
33 *  Simple spin delay in microsecond units for device drivers.
34 *  This is very dependent on the clock speed of the target.
35 */
36
37#define rtems_bsp_delay( microseconds ) \
38  { \
39  }
40
41/* ============================================ */
42
43/* SOPC-specific Constants */
44
45#define SYSTEM_BUS_WIDTH 32
46
47#define JTAG_UART_BASE 0x08000000
48#define JTAG_UART_IRQ 2
49
50#define CLOCK_BASE 0x08001000
51#define CLOCK_FREQ 50000000
52#define CLOCK_VECTOR 1
53
54#define TIMER_BASE 0x08002000
55#define TIMER_FREQ 50000000
56#define TIMER_VECTOR 3
57
58/* ============================================ */
59
60#define NIOS2_BYPASS_CACHE ((uint32_t)0x80000000ul)
61#define NIOS2_IO_BASE(x) ( (void*) ((uint32_t)x | NIOS2_BYPASS_CACHE ) )
62#define NIOS2_IENABLE(x) do{ __builtin_wrctl(3,__builtin_rdctl(3)|x);}while(0)
63#define NIOS2_IRQ_ENABLE(x) do {__builtin_wrctl(3,__builtin_rdctl(3)|x);} while(0)
64
65/* ============================================ */
66/* TODO: Put this in an external header file */
67
68#ifndef SYSTEM_BUS_WIDTH
69#error SYSTEM_BUS_WIDTH is undefined
70#endif
71
72#if SYSTEM_BUS_WIDTH != 32
73#error Only SYSTEM_BUS_WIDTH 32 is supported
74#endif
75
76typedef struct
77{
78  volatile uint32_t status;
79  volatile uint32_t control;
80  volatile uint32_t period_lo;
81  volatile uint32_t period_hi;
82  volatile uint32_t snap_lo;
83  volatile uint32_t snap_hi;
84}
85altera_avalon_timer_regs;
86
87#define ALTERA_AVALON_TIMER_STATUS_TO_MSK             (0x1)
88#define ALTERA_AVALON_TIMER_STATUS_TO_OFST            (0)
89#define ALTERA_AVALON_TIMER_STATUS_RUN_MSK            (0x2)
90#define ALTERA_AVALON_TIMER_STATUS_RUN_OFST           (1)
91
92#define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK           (0x1)
93#define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST          (0)
94#define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK          (0x2)
95#define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST         (1)
96#define ALTERA_AVALON_TIMER_CONTROL_START_MSK         (0x4)
97#define ALTERA_AVALON_TIMER_CONTROL_START_OFST        (2)
98#define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK          (0x8)
99#define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST         (3)
100
101typedef struct
102{
103  volatile uint32_t data;
104  volatile uint32_t control;
105}
106altera_avalon_jtag_uart_regs;
107
108#define ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK             (0x000000FFu)
109#define ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST            (0)
110#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK           (0x00008000u)
111#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_OFST          (15)
112#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK           (0xFFFF0000u)
113#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST          (16)
114
115#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK            (0x00000001u)
116#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_OFST           (0)
117#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK            (0x00000002u)
118#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_OFST           (1)
119#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK            (0x00000100u)
120#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_OFST           (8)
121#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK            (0x00000200u)
122#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_OFST           (9)
123#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK            (0x00000400u)
124#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_OFST           (10)
125#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK        (0xFFFF0000u)
126#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST       (16)
127
128/* ============================================ */
129
130/* functions */
131
132rtems_isr_entry set_vector(                     /* returns old vector */
133  rtems_isr_entry     handler,                  /* isr routine        */
134  rtems_vector_number vector,                   /* vector number      */
135  int                 type                      /* RTEMS or RAW intr  */
136);
137
138#ifdef __cplusplus
139}
140#endif
141
142#endif
143/* end of include file */
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