source: rtems/c/src/lib/libbsp/nios2/nios2_iss/include/bsp.h @ 10bf1b81

Last change on this file since 10bf1b81 was 10bf1b81, checked in by Joel Sherrill <joel@…>, on Mar 29, 2016 at 6:10:52 PM

nios2/nios2_iss: Remove include of <rtems/console.h> from <bsp.h> and fix warnings

  • Property mode set to 100644
File size: 4.1 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all board IO definitions.
4 *
5 *  XXX : put yours in here
6 *
7 *  COPYRIGHT (c) 1989-1999.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.rtems.org/license/LICENSE.
13 */
14
15#ifndef LIBBSP_NIOS2_NIOS2_ISS_BSP_H
16#define LIBBSP_NIOS2_NIOS2_ISS_BSP_H
17
18#include <stdint.h>
19#include <bspopts.h>
20#include <bsp/default-initial-extension.h>
21
22#include <rtems.h>
23
24#ifdef __cplusplus
25extern "C" {
26#endif
27
28/* ============================================ */
29
30/* SOPC-specific Constants */
31
32#define SYSTEM_BUS_WIDTH 32
33
34#define JTAG_UART_BASE 0x08000000
35#define JTAG_UART_IRQ 2
36
37#define CLOCK_BASE 0x08001000
38#define CLOCK_FREQ 50000000
39#define CLOCK_VECTOR 1
40
41#define TIMER_BASE 0x08002000
42#define TIMER_FREQ 50000000
43#define TIMER_VECTOR 3
44
45/* ============================================ */
46
47#define NIOS2_BYPASS_CACHE ((uint32_t)0x80000000ul)
48#define NIOS2_IO_BASE(x) ( (void*) ((uint32_t)x | NIOS2_BYPASS_CACHE ) )
49#define NIOS2_IENABLE(x) do{ __builtin_wrctl(3,__builtin_rdctl(3)|x);}while(0)
50#define NIOS2_IRQ_ENABLE(x) do {__builtin_wrctl(3,__builtin_rdctl(3)|x);} while(0)
51
52/* ============================================ */
53/* TODO: Put this in an external header file */
54
55#ifndef SYSTEM_BUS_WIDTH
56#error SYSTEM_BUS_WIDTH is undefined
57#endif
58
59#if SYSTEM_BUS_WIDTH != 32
60#error Only SYSTEM_BUS_WIDTH 32 is supported
61#endif
62
63typedef struct
64{
65  volatile uint32_t status;
66  volatile uint32_t control;
67  volatile uint32_t period_lo;
68  volatile uint32_t period_hi;
69  volatile uint32_t snap_lo;
70  volatile uint32_t snap_hi;
71}
72altera_avalon_timer_regs;
73
74#define ALTERA_AVALON_TIMER_STATUS_TO_MSK             (0x1)
75#define ALTERA_AVALON_TIMER_STATUS_TO_OFST            (0)
76#define ALTERA_AVALON_TIMER_STATUS_RUN_MSK            (0x2)
77#define ALTERA_AVALON_TIMER_STATUS_RUN_OFST           (1)
78
79#define ALTERA_AVALON_TIMER_CONTROL_ITO_MSK           (0x1)
80#define ALTERA_AVALON_TIMER_CONTROL_ITO_OFST          (0)
81#define ALTERA_AVALON_TIMER_CONTROL_CONT_MSK          (0x2)
82#define ALTERA_AVALON_TIMER_CONTROL_CONT_OFST         (1)
83#define ALTERA_AVALON_TIMER_CONTROL_START_MSK         (0x4)
84#define ALTERA_AVALON_TIMER_CONTROL_START_OFST        (2)
85#define ALTERA_AVALON_TIMER_CONTROL_STOP_MSK          (0x8)
86#define ALTERA_AVALON_TIMER_CONTROL_STOP_OFST         (3)
87
88typedef struct
89{
90  volatile uint32_t data;
91  volatile uint32_t control;
92}
93altera_avalon_jtag_uart_regs;
94
95#define ALTERA_AVALON_JTAG_UART_DATA_DATA_MSK             (0x000000FFu)
96#define ALTERA_AVALON_JTAG_UART_DATA_DATA_OFST            (0)
97#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_MSK           (0x00008000u)
98#define ALTERA_AVALON_JTAG_UART_DATA_RVALID_OFST          (15)
99#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_MSK           (0xFFFF0000u)
100#define ALTERA_AVALON_JTAG_UART_DATA_RAVAIL_OFST          (16)
101
102#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_MSK            (0x00000001u)
103#define ALTERA_AVALON_JTAG_UART_CONTROL_RE_OFST           (0)
104#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_MSK            (0x00000002u)
105#define ALTERA_AVALON_JTAG_UART_CONTROL_WE_OFST           (1)
106#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_MSK            (0x00000100u)
107#define ALTERA_AVALON_JTAG_UART_CONTROL_RI_OFST           (8)
108#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_MSK            (0x00000200u)
109#define ALTERA_AVALON_JTAG_UART_CONTROL_WI_OFST           (9)
110#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_MSK            (0x00000400u)
111#define ALTERA_AVALON_JTAG_UART_CONTROL_AC_OFST           (10)
112#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_MSK        (0xFFFF0000u)
113#define ALTERA_AVALON_JTAG_UART_CONTROL_WSPACE_OFST       (16)
114
115/* ============================================ */
116
117/* functions */
118
119rtems_isr_entry set_vector(                     /* returns old vector */
120  rtems_isr_entry     handler,                  /* isr routine        */
121  rtems_vector_number vector,                   /* vector number      */
122  int                 type                      /* RTEMS or RAW intr  */
123);
124
125#ifdef __cplusplus
126}
127#endif
128
129#endif
130/* end of include file */
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