source: rtems/c/src/lib/libbsp/mips/shared/gdbstub/ChangeLog @ a681285

4.104.114.84.95
Last change on this file since a681285 was a681285, checked in by Joel Sherrill <joel.sherrill@…>, on Aug 14, 2002 at 10:58:30 PM

2002-08-14 Greg Menke <gregory.menke@…>

  • mips-stub.c: Re-debugged a breakpoint problem, zbreak target address was a char * which caused the target instruction to not be fully copied, so the zbreak logic corrupted the original instruction and didn't insert a valid break instruction.
  • Property mode set to 100644
File size: 3.9 KB
Line 
12002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
2
3        * mips-stub.c: Re-debugged a breakpoint problem, zbreak target
4        address was a char * which caused the target instruction to not
5        be fully copied, so the zbreak logic corrupted the original
6        instruction and didn't insert a valid break instruction.
7       
82002-03-08      Joel Sherrill <joel@OARcorp.com>
9
10        * mips-stub.c: Removed warnings.
11
122002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
13
14        * mips-stub.c: Debugged & tweaked the gdb command processing,
15        zbreak stuff, breakpoint and step code.  Implemented 'T' command
16        support and debugged remote gdb support w/ the Mongoose bsp.
17        Added the memory segment support.
18        * memlimits.h: Disabled all contents in favor of memory sement
19        support.  This file could probably go away.
20        * rtems-stub-glue.c (rtems_gdb_index_to_stub_id()): New routine.
21        rtems_gdb_stub_get_register_from_context(): Implemented MIPS version.
22        rtems_gdb_stub_get_offsets(): Implemented MIPS version.
23        * README: Updated.
24
252002-03-01      Joel Sherrill <joel@OARcorp.com>
26
27        * ChangeLog: Corrected previous entry.
28
292002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
30
31        * mips-stub.c: Modified isr install routine to
32        capture all exceptions.
33
342001-02-27      Joel Sherrill <joel@OARcorp.com>
35
36        * Significant modifications including adding thread support, the 'X'
37        command, and reorganizing so that target CPU independent routines
38        could be reused.
39        * gdb_if.h: Added numerous prototypes.
40        * mips-stub.c: Added thread support as well as 'X' command.
41        Also noticed that the 'P' command was from the mips protocol.
42        * rtems-stub-glue.c: New file.  This file contains all generic
43        support which should be able to be reused on another target CPU.
44
452002-02-08      Joel Sherrill <joel@OARcorp.com>
46
47        * mips-stub.c (handle_exception): Prototype changed to be an RTEMS
48        entry point.  Added comments about possible need to flush cache.
49        (mips_gdb_stub_install): New routine.
50
512002-02-08      Joel Sherrill <joel@OARcorp.com>
52
53        * Makefile, stubinit.S, r46kstub.ld, ioaddr.h: Removed as unused
54        with RTEMS.
55        * r46kstub.c: Renamed to mips-stub.c.
56        * mips-stub.c: New file -- was r46kstub.c.
57        * memlimits.h: New file was limits.h.
58        * limits.h: Removed.
59        * r4600.h: Eliminated need for this file.
60        * README: Updated.
61        * gdb_if.h: Added CVS Id.
62        * mips-stub.c: Attempt to deal with MIPS1 versus MIPS3.
63
642002-02-08      Joel Sherrill <joel@OARcorp.com>
65
66        * Merged r46kstub.c into RTEMS distribution without modification.
67        I got the code from Franz Fischer <Franz.Fischer@franz-fischer.de>
68        who had used this with an old version of RTEMS with the mips64orion
69        port of RTEMS.  After adding this to the repository, I will tailor
70        this to work with the RTEMS exception processing model and trim
71        no longer needed parts.
72        * ChangeLog, gdb_if.h, ioaddr.h, limits.h, Makefile, mips_opcode.h,
73        r4600.h, r46kstub.c, r46kstub.ld, README, stubinit.S:
74
75Sun Sep 29 16:34:53 1996  C. M. Heard <heard@vvnet.com>
76
77        * Updated snapshot posted.
78
79        * stubinit.S (_reset_exception, _general_exception): Reorder
80        instructions or insert nops as necessary to ensure that the
81        target register of mfc0, mfc1, and cfc1 instructions is not
82        used as a source register in the load delay slot of those
83        instructions and to ensure that the instruction following
84        mtc0 is always something other than mfc0.  Insert .eject
85        directives and reformat some of the comments to make the
86        assembler listing more readable.
87
88        * ioaddr.h:  add comments pointing out implementation-
89        specific address definitions.
90
91        * limits.h:  add comments describing what the implementation-
92        specific macros in this file are supposed to do.
93
94Tue Aug 06 14:43:04 1995  C. M. Heard <heard@vvnet.com>
95
96        * Updated snapshot posted.
97
98        * stubinit.S (_general_exception): Use virtual adresses from
99        kseg0 (cached, unmapped space) instead of kseg1 (uncached,
100        unmapped space) in cache instructions.
101        (_reset_exception): Likewise, and use the right
102        mask to clean the K0 field in the config register.
103
104Fri Jul 26 14:41:49 1995  C. M. Heard <heard@vvnet.com>
105
106        * Initial snapshot posted.
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