source: rtems/c/src/lib/libbsp/mips/shared/gdbstub/ChangeLog @ 0381a8d

4.104.114.84.95
Last change on this file since 0381a8d was 0381a8d, checked in by Joel Sherrill <joel.sherrill@…>, on 10/02/02 at 17:38:36

2002-10-02 Joel Sherrill <joel@…>

  • rtems-stub-glue.c: Removed should only be common copy.
  • Property mode set to 100644
File size: 4.0 KB
Line 
12002-10-02      Joel Sherrill <joel@OARcorp.com>
2
3        * rtems-stub-glue.c: Removed should only be common copy.
4
52002-08-14      Greg Menke <gregory.menke@gsfc.nasa.gov>
6
7        * mips-stub.c: Re-debugged a breakpoint problem, zbreak target
8        address was a char * which caused the target instruction to not
9        be fully copied, so the zbreak logic corrupted the original
10        instruction and didn't insert a valid break instruction.
11       
122002-03-08      Joel Sherrill <joel@OARcorp.com>
13
14        * mips-stub.c: Removed warnings.
15
162002-03-05      Greg Menke <gregory.menke@gsfc.nasa.gov>
17
18        * mips-stub.c: Debugged & tweaked the gdb command processing,
19        zbreak stuff, breakpoint and step code.  Implemented 'T' command
20        support and debugged remote gdb support w/ the Mongoose bsp.
21        Added the memory segment support.
22        * memlimits.h: Disabled all contents in favor of memory sement
23        support.  This file could probably go away.
24        * rtems-stub-glue.c (rtems_gdb_index_to_stub_id()): New routine.
25        rtems_gdb_stub_get_register_from_context(): Implemented MIPS version.
26        rtems_gdb_stub_get_offsets(): Implemented MIPS version.
27        * README: Updated.
28
292002-03-01      Joel Sherrill <joel@OARcorp.com>
30
31        * ChangeLog: Corrected previous entry.
32
332002-02-27      Greg Menke <gregory.menke@gsfc.nasa.gov>
34
35        * mips-stub.c: Modified isr install routine to
36        capture all exceptions.
37
382001-02-27      Joel Sherrill <joel@OARcorp.com>
39
40        * Significant modifications including adding thread support, the 'X'
41        command, and reorganizing so that target CPU independent routines
42        could be reused.
43        * gdb_if.h: Added numerous prototypes.
44        * mips-stub.c: Added thread support as well as 'X' command.
45        Also noticed that the 'P' command was from the mips protocol.
46        * rtems-stub-glue.c: New file.  This file contains all generic
47        support which should be able to be reused on another target CPU.
48
492002-02-08      Joel Sherrill <joel@OARcorp.com>
50
51        * mips-stub.c (handle_exception): Prototype changed to be an RTEMS
52        entry point.  Added comments about possible need to flush cache.
53        (mips_gdb_stub_install): New routine.
54
552002-02-08      Joel Sherrill <joel@OARcorp.com>
56
57        * Makefile, stubinit.S, r46kstub.ld, ioaddr.h: Removed as unused
58        with RTEMS.
59        * r46kstub.c: Renamed to mips-stub.c.
60        * mips-stub.c: New file -- was r46kstub.c.
61        * memlimits.h: New file was limits.h.
62        * limits.h: Removed.
63        * r4600.h: Eliminated need for this file.
64        * README: Updated.
65        * gdb_if.h: Added CVS Id.
66        * mips-stub.c: Attempt to deal with MIPS1 versus MIPS3.
67
682002-02-08      Joel Sherrill <joel@OARcorp.com>
69
70        * Merged r46kstub.c into RTEMS distribution without modification.
71        I got the code from Franz Fischer <Franz.Fischer@franz-fischer.de>
72        who had used this with an old version of RTEMS with the mips64orion
73        port of RTEMS.  After adding this to the repository, I will tailor
74        this to work with the RTEMS exception processing model and trim
75        no longer needed parts.
76        * ChangeLog, gdb_if.h, ioaddr.h, limits.h, Makefile, mips_opcode.h,
77        r4600.h, r46kstub.c, r46kstub.ld, README, stubinit.S:
78
79Sun Sep 29 16:34:53 1996  C. M. Heard <heard@vvnet.com>
80
81        * Updated snapshot posted.
82
83        * stubinit.S (_reset_exception, _general_exception): Reorder
84        instructions or insert nops as necessary to ensure that the
85        target register of mfc0, mfc1, and cfc1 instructions is not
86        used as a source register in the load delay slot of those
87        instructions and to ensure that the instruction following
88        mtc0 is always something other than mfc0.  Insert .eject
89        directives and reformat some of the comments to make the
90        assembler listing more readable.
91
92        * ioaddr.h:  add comments pointing out implementation-
93        specific address definitions.
94
95        * limits.h:  add comments describing what the implementation-
96        specific macros in this file are supposed to do.
97
98Tue Aug 06 14:43:04 1995  C. M. Heard <heard@vvnet.com>
99
100        * Updated snapshot posted.
101
102        * stubinit.S (_general_exception): Use virtual adresses from
103        kseg0 (cached, unmapped space) instead of kseg1 (uncached,
104        unmapped space) in cache instructions.
105        (_reset_exception): Likewise, and use the right
106        mask to clean the K0 field in the config register.
107
108Fri Jul 26 14:41:49 1995  C. M. Heard <heard@vvnet.com>
109
110        * Initial snapshot posted.
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