source: rtems/c/src/lib/libbsp/mips/malta/include/bsp.h @ 6620a8a8

4.115
Last change on this file since 6620a8a8 was 6620a8a8, checked in by Joel Sherrill <joel.sherrill@…>, on May 8, 2012 at 6:28:07 PM

malta - Eliminate any set_vector() remnants

  • Property mode set to 100644
File size: 3.3 KB
Line 
1/**
2 *  @file
3 *
4 *  This include file contains some definitions specific to the
5 *  MIPS Malta Board.
6 */
7
8/*
9 *  COPYRIGHT (c) 1989-2012.
10 *  On-Line Applications Research Corporation (OAR).
11 *
12 *  The license and distribution terms for this file may be
13 *  found in the file LICENSE in this distribution or at
14 *  http://www.rtems.com/license/LICENSE.
15 */
16
17#ifndef _BSP_H
18#define _BSP_H
19
20#ifdef __cplusplus
21extern "C" {
22#endif
23
24#include <bspopts.h>
25
26#include <rtems.h>
27#include <rtems/iosupp.h>
28#include <rtems/console.h>
29#include <rtems/clockdrv.h>
30
31#define BSP_FEATURE_IRQ_EXTENSION
32#define BSP_SHARED_HANDLER_SUPPORT      1
33
34#define REVISION_REGISTER_ADDRESS  0x1fc00010
35#define PRORV_MASK       0x0000000f   /* 4 bit Product Revision */
36#define PROID_MASK       0x000000f0   /* 4 bit Product ID */
37#define CORRV_MASK       0x00000300   /* 2 bit Core Board Revision */
38#define CORID_MASK       0x0000fc00   /* 6 bit Core Board ID */
39#define FPGRV_MASK       0x00ff0000   /* 8 bit CBUS FPGA Revision */
40#define BSP_8259_BASE_ADDRESS    (0x18000000UL | 0xa0000000UL)
41#define BSP_PCI_BASE_ADDRESS     (0x1be00000UL | 0xa0000000UL)
42#define BSP_NIC_IO_BASE          (0x10000000UL | 0xa0000000UL)
43#define PCI0_IO_BASE             (0x18000000UL | 0xa0000000UL)
44#define BSP_NIC_MEM_BASE         (0x00000000UL | 0xa0000000UL)
45
46/* functions */
47#define WRITE_PROTECTED_UINT8( _addr, _value ) \
48        do { \
49          volatile uint8_t *_ptr = _addr | 0x80000000; \
50          *_ptr = _value; \
51        }
52#define WRITE_PROTECTED_UINT16( _addr, _value ) \
53        do { \
54          volatile uint16_t *_ptr = _addr | 0x80000000; \
55          *_ptr = _value; \
56        }
57#define WRITE_PROTECTED_UINT32( _addr, _value ) \
58        do { \
59          volatile uint32_t *_ptr = _addr | 0x80000000; \
60          *_ptr = _value; \
61        }
62#define READ_PROTECTED_UINT8( _addr, _value ) \
63        do { \
64          volatile uint8_t *_ptr = _addr | 0x80000000; \
65         _value = *_ptr; \
66        }
67#define READ_PROTECTED_UINT16( _addr, _value ) \
68        do { \
69          volatile uint16_t *_ptr = _addr | 0x80000000; \
70         _value = *_ptr; \
71        }
72#define READ_PROTECTED_UINT32( _addr, _value ) \
73        do { \
74          volatile uint32_t *_ptr = _addr | 0x80000000; \
75         _value = *_ptr; \
76        }
77
78#define READ_UINT8( _register_, _value_ ) \
79        ((_value_) = *((volatile unsigned char *)(_register_)))
80
81#define WRITE_UINT8( _register_, _value_ ) \
82        (*((volatile unsigned char *)(_register_)) = (_value_))
83
84#define READ_UINT16( _register_, _value_ ) \
85     ((_value_) = *((volatile unsigned short *)(_register_)))
86
87#define WRITE_UINT16( _register_, _value_ ) \
88     (*((volatile unsigned short *)(_register_)) = (_value_))
89
90void simple_out_32(uint32_t base, uint32_t addr, uint32_t val);
91void simple_out_le32(uint32_t base, uint32_t addr, uint32_t val);
92uint8_t simple_in_8( uint32_t base, uint32_t addr );
93void simple_out_8( uint32_t base, uint32_t addr, uint8_t val );
94int16_t simple_in_le16( uint32_t base, uint32_t addr );
95int16_t simple_in_16( uint32_t base, uint32_t addr );
96uint32_t simple_in_le32( uint32_t base, uint32_t addr );
97uint32_t simple_in_32( uint32_t base, uint32_t addr );
98void simple_out_le16( uint32_t base, uint32_t addr, uint16_t val );
99void simple_out_16( uint32_t base, uint32_t addr, uint16_t val );
100
101#ifdef __cplusplus
102}
103#endif
104
105#endif
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