source: rtems/c/src/lib/libbsp/mips/jmr3904/start/start.S @ b335c503

4.104.114.84.95
Last change on this file since b335c503 was b335c503, checked in by Joel Sherrill <joel.sherrill@…>, on 04/20/01 at 13:14:55

2001-04-20 Joel Sherrill <joel@…>

  • include/bsp.h (Clear_tm27_intr): Stop the timer and disable the interrupt. This was not quite right before and we were getting uncontrolled interrupt nesting in tm27.
  • timer/timer.c (Timer_Initialize): Added an extra reset and changed the ITMR register so we will never get an interrupt. (Read_timer): Fixed so the timer actually stops before it is read. Before some times reported were outraguously high.
  • start/start.S: Major clean including using stack in linkcmds, deleting unused code, and zeroing the BSS using the linkcmds information.
  • startup/linkcmds: Put heap in lower memory than workspace and move _clear_end so both are zeroed.
  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 * start.S -- startup file for JMR3904 BSP based upon crt0.S from
3 * newlib-1.8.2/libgloss/mips and adapted for RTEMS.
4 *
5 * crt0.S -- startup file for MIPS.
6 *
7 * Copyright (c) 1995, 1996, 1997 Cygnus Support
8 *
9 * The authors hereby grant permission to use, copy, modify, distribute,
10 * and license this software and its documentation for any purpose, provided
11 * that existing copyright notices are retained in all copies and that this
12 * notice is included verbatim in any distributions. No written agreement,
13 * license, or royalty fee is required for any of the authorized uses.
14 * Modifications to this software may be copyrighted by their authors
15 * and need not follow the licensing terms described here, provided that
16 * the new terms are clearly indicated on the first page of each file where
17 * they apply.
18 */
19
20#include <asm.h>
21#include "regs.S"
22
23#ifdef __mips16
24/* This file contains 32 bit assembly code.  */
25        .set nomips16
26#endif
27
28/* This is for referencing addresses that are not in the .sdata or
29   .sbss section under embedded-pic, or before we've set up gp.  */
30#ifdef __mips_embedded_pic
31# ifdef __mips64
32#  define LA(t,x) la t,x-PICBASE ; daddu t,s0,t
33# else
34#  define LA(t,x) la t,x-PICBASE ; addu t,s0,t
35# endif
36#else /* __mips_embedded_pic */
37# define LA(t,x) la t,x
38#endif /* __mips_embedded_pic */
39
40        .text
41        .align  2
42
43/* Without the following nop, GDB thinks _start is a data variable.
44 * This is probably a bug in GDB in handling a symbol that is at the
45 * start of the .text section.
46 */
47        nop
48
49        .globl  _start
50        .ent    _start
51_start:
52        .set    noreorder
53        # Get the address of start into $5 in a position independent fashion.
54        # This lets us know whether we have been relocated or not.
55       
56        $LF1 = . + 8
57        bal     $LF1
58        nop
59_branch:
60        move    $5, $31                         # $5 == where are we
61        li      $6, 0x8800000c                  # $6 == where we want to be
62        #la      $6,_branch
63        beq     $5, $6, _start_in_ram
64        nop
65        # relocate the code from EEPROM to RAM
66        la      $7, _edata
67relocate:
68        lw      $8, ($5)                        # $8 = *EEPROM
69        addu    $5, $5, 4                       # EEPROM++
70        sw      $8, ($6)                        # *RAM = $8
71        addu    $6, $6, 4                       # RAM++
72        bne     $6, $7, relocate                # copied all the way to edata?
73        nop
74        la      $6, _start_in_ram
75        jr      $6
76        nop
77        .end _start
78
79       
80        .globl  _start_in_ram
81        .ent _start_in_ram
82_start_in_ram:
83        nop
84
85#ifdef __mips_embedded_pic
86        PICBASE = .+8
87        bal     PICBASE
88        nop
89        move    s0,$31
90#endif
91
92        li      v0, SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
93        mtc0    v0, C0_SR
94        mtc0    zero, C0_CAUSE
95
96/* Check for FPU presence */
97#ifndef __mips_soft_float
98/* This doesn't work if there is no FPU.  We get illegal instruction
99   exceptions.  */
100        li      t2,0xAAAA5555
101        mtc1    t2,fp0          /* write to FPR 0 */
102        mtc1    zero,fp1        /* write to FPR 1 */
103        mfc1    t0,fp0
104        mfc1    t1,fp1
105        nop
106        bne     t0,t2,1f        /* check for match */
107        nop
108        bne     t1,zero,1f      /* double check */
109        nop
110#ifndef __mips64  /* Clear the FR bit */
111        li      v0, SR_CU1|SR_PE|SR_KX|SR_SX|SR_UX
112        mtc0    v0, C0_SR
113#endif
114        j       2f
115        nop
116#endif
1171:
118        li      v0, SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
119        mtc0    v0, C0_SR
1202:
121/* Fix high bits, if any, of the PC so that exception handling
122   doesn't get confused.  */
123        LA (v0, 3f)
124        jr      v0
125        nop
1263:
127        LA (gp, _gp)                            # set the global data pointer
128        .end _start
129
130/*
131 * zero out the bss section.
132 */
133        .globl  __memsize
134        .globl  zerobss
135        .ent    zerobss
136zerobss:
137        LA (v0, _fbss)
138        LA (v1, _end)
1393:
140        sw      zero,0(v0)
141        bltu    v0,v1,3b
142        addiu   v0,v0,4                         # executed in delay slot
143
144        la      t0, _stack_init                 # initialize stack so we
145        /* We must subtract 24 bytes for the 3 8 byte arguments to main, in
146           case main wants to write them back to the stack.  The caller is
147           supposed to allocate stack space for parameters in registers in
148           the old MIPS ABIs.  We must do this even though we aren't passing
149           arguments, because main might be declared to have them.
150
151           Some ports need a larger alignment for the stack, so we subtract
152           32, which satisifes the stack for the arguments and keeps the
153           stack pointer better aligned.  */
154        subu    t0,t0,32
155        move    sp,t0                           # set stack pointer
156        .end    zerobss
157
158        .globl  exit .text
159        .globl  init
160        .ent    init
161init:
162
163        move    a0,zero                         # set argc to 0
164        jal     boot_card                       # call the program start function
165        nop
166
167        # fall through to the "exit" routine
168        jal     _sys_exit                       # call libc exit to run the G++
169                                                # destructors
170        move    a0,v0                           # pass through the exit code
171        .end    init
172       
173/*
174 * _sys_exit -- Exit from the application. Normally we cause a user trap
175 *          to return to the ROM monitor for another run. NOTE: This is
176 *          the only other routine we provide in the crt0.o object, since
177 *          it may be tied to the "_start" routine. It also allows
178 *          executables that contain a complete world to be linked with
179 *          just the crt0.o object.
180 */
181        .globl  _sys_exit
182        .ent _sys_exit
183_sys_exit:
1847:
185#ifdef GCRT0
186        jal     _mcleanup
187        nop
188#endif
189        # break instruction can cope with 0xfffff, but GAS limits the range:
190        break   1023
191        nop
192        b       7b                              # but loop back just in-case
193        nop
194        .end _sys_exit
195
196/* EOF crt0.S */
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