1 | /* |
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2 | * start.S -- startup file for JMR3904 BSP based upon crt0.S from |
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3 | * newlib-1.8.2/libgloss/mips and adapted for RTEMS. |
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4 | * |
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5 | * crt0.S -- startup file for MIPS. |
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6 | * |
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7 | * Copyright (c) 1995, 1996, 1997 Cygnus Support |
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8 | * |
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9 | * The authors hereby grant permission to use, copy, modify, distribute, |
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10 | * and license this software and its documentation for any purpose, provided |
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11 | * that existing copyright notices are retained in all copies and that this |
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12 | * notice is included verbatim in any distributions. No written agreement, |
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13 | * license, or royalty fee is required for any of the authorized uses. |
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14 | * Modifications to this software may be copyrighted by their authors |
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15 | * and need not follow the licensing terms described here, provided that |
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16 | * the new terms are clearly indicated on the first page of each file where |
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17 | * they apply. |
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18 | */ |
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19 | |
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20 | #include <rtems/asm.h> |
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21 | #include <bsp/regs.h> |
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22 | |
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23 | #ifdef __mips16 |
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24 | /* This file contains 32 bit assembly code. */ |
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25 | .set nomips16 |
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26 | #endif |
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27 | |
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28 | /* This is for referencing addresses that are not in the .sdata or |
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29 | .sbss section under embedded-pic, or before we've set up gp. */ |
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30 | #ifdef __mips_embedded_pic |
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31 | # ifdef __mips64 |
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32 | # define LA(t,x) la t,x-PICBASE ; daddu t,s0,t |
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33 | # else |
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34 | # define LA(t,x) la t,x-PICBASE ; addu t,s0,t |
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35 | # endif |
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36 | #else /* __mips_embedded_pic */ |
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37 | # define LA(t,x) la t,x |
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38 | #endif /* __mips_embedded_pic */ |
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39 | |
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40 | .text |
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41 | .align 2 |
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42 | |
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43 | /* Without the following nop, GDB thinks _start is a data variable. |
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44 | * This is probably a bug in GDB in handling a symbol that is at the |
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45 | * start of the .text section. |
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46 | */ |
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47 | nop |
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48 | |
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49 | .globl _start |
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50 | .ent _start |
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51 | _start: |
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52 | .set noreorder |
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53 | /* Get the address of start into $5 in a position independent fashion. |
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54 | ** This lets us know whether we have been relocated or not. |
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55 | */ |
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56 | $LF1 = . + 8 |
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57 | bal $LF1 |
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58 | nop |
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59 | _branch: |
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60 | move $5, $31 # $5 == where are we |
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61 | li $6, 0x8800000c # $6 == where we want to be |
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62 | /* #la $6,_branch */ |
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63 | beq $5, $6, _start_in_ram |
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64 | nop |
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65 | /* relocate the code from EEPROM to RAM */ |
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66 | la $7, _edata |
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67 | relocate: |
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68 | lw $8, ($5) # $8 = *EEPROM |
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69 | addu $5, $5, 4 # EEPROM++ |
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70 | sw $8, ($6) # *RAM = $8 |
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71 | addu $6, $6, 4 # RAM++ |
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72 | bne $6, $7, relocate # copied all the way to edata? |
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73 | nop |
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74 | la $6, _start_in_ram |
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75 | jr $6 |
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76 | nop |
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77 | .end _start |
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78 | |
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79 | .globl _start_in_ram |
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80 | .ent _start_in_ram |
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81 | _start_in_ram: |
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82 | nop |
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83 | |
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84 | #ifdef __mips_embedded_pic |
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85 | PICBASE = .+8 |
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86 | bal PICBASE |
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87 | nop |
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88 | move s0,$31 |
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89 | #endif |
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90 | |
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91 | li v0, SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX |
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92 | mtc0 v0, C0_SR |
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93 | mtc0 zero, C0_CAUSE |
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94 | |
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95 | /* Check for FPU presence */ |
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96 | #ifndef __mips_soft_float |
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97 | /* This doesn't work if there is no FPU. We get illegal instruction |
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98 | exceptions. */ |
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99 | li t2,0xAAAA5555 |
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100 | mtc1 t2,fp0 /* write to FPR 0 */ |
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101 | mtc1 zero,fp1 /* write to FPR 1 */ |
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102 | mfc1 t0,fp0 |
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103 | mfc1 t1,fp1 |
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104 | nop |
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105 | bne t0,t2,1f /* check for match */ |
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106 | nop |
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107 | bne t1,zero,1f /* double check */ |
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108 | nop |
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109 | #ifndef __mips64 /* Clear the FR bit */ |
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110 | li v0, SR_CU1|SR_PE|SR_KX|SR_SX|SR_UX |
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111 | mtc0 v0, C0_SR |
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112 | #endif |
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113 | j 2f |
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114 | nop |
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115 | #endif |
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116 | 1: |
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117 | li v0, SR_PE|SR_FR|SR_KX|SR_SX|SR_UX |
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118 | mtc0 v0, C0_SR |
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119 | 2: |
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120 | /* Fix high bits, if any, of the PC so that exception handling |
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121 | doesn't get confused. */ |
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122 | LA (v0, 3f) |
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123 | jr v0 |
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124 | nop |
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125 | 3: |
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126 | LA (gp, _gp) # set the global data pointer |
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127 | .end _start_in_ram |
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128 | |
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129 | /* |
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130 | * zero out the bss section. |
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131 | */ |
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132 | .globl __memsize |
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133 | .globl zerobss |
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134 | .ent zerobss |
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135 | zerobss: |
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136 | LA (v0, _fbss) |
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137 | LA (v1, _end) |
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138 | 3: |
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139 | sw zero,0(v0) |
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140 | bltu v0,v1,3b |
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141 | addiu v0,v0,4 # executed in delay slot |
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142 | |
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143 | la t0, _stack_init # initialize stack so we |
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144 | /* We must subtract 24 bytes for the 3 8 byte arguments to main, in |
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145 | case main wants to write them back to the stack. The caller is |
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146 | supposed to allocate stack space for parameters in registers in |
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147 | the old MIPS ABIs. We must do this even though we aren't passing |
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148 | arguments, because main might be declared to have them. |
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149 | |
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150 | Some ports need a larger alignment for the stack, so we subtract |
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151 | 32, which satisifes the stack for the arguments and keeps the |
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152 | stack pointer better aligned. */ |
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153 | subu t0,t0,32 |
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154 | move sp,t0 # set stack pointer |
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155 | .end zerobss |
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156 | |
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157 | .globl exit .text |
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158 | .globl init |
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159 | .ent init |
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160 | init: |
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161 | |
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162 | move a0,zero # set command line to 0 |
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163 | jal boot_card # call the program start function |
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164 | nop |
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165 | |
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166 | /* fall through to the "exit" routine */ |
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167 | jal _sys_exit /* call libc exit to run the G++ */ |
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168 | /* destructors */ |
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169 | move a0,v0 /* pass through the exit code */ |
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170 | .end init |
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171 | |
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172 | /* |
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173 | * _sys_exit -- Exit from the application. Normally we cause a user trap |
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174 | * to return to the ROM monitor for another run. NOTE: This is |
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175 | * the only other routine we provide in the crt0.o object, since |
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176 | * it may be tied to the "_start" routine. It also allows |
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177 | * executables that contain a complete world to be linked with |
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178 | * just the crt0.o object. |
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179 | */ |
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180 | .globl _sys_exit |
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181 | .ent _sys_exit |
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182 | _sys_exit: |
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183 | 7: |
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184 | #ifdef GCRT0 |
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185 | jal _mcleanup |
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186 | nop |
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187 | #endif |
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188 | /* break instruction can cope with 0xfffff, but GAS limits the range: */ |
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189 | break 1023 |
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190 | nop |
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191 | b 7b # but loop back just in-case |
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192 | nop |
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193 | .end _sys_exit |
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194 | |
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195 | /* EOF crt0.S */ |
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