source: rtems/c/src/lib/libbsp/mips/jmr3904/include/bsp.h @ 3344730a

4.104.114.84.95
Last change on this file since 3344730a was 3344730a, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/21/04 at 16:21:25

2004-04-21 Ralf Corsepius <ralf_corsepius@…>

PR 613/bsps

  • include/bsp.h: Remove MAX_LONG_TEST_DURATION.
  • Property mode set to 100644
File size: 2.4 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains some definitions specific to the
4 *  JMR3904 simulator in gdb.
5 *
6 *  COPYRIGHT (c) 1989-2000.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id$
14 */
15
16#ifndef __JMR3904_h
17#define __JMR3904_h
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#include <bspopts.h>
24
25#include <rtems.h>
26#include <rtems/iosupp.h>
27#include <rtems/console.h>
28#include <rtems/clockdrv.h>
29#include <libcpu/tx3904.h>
30
31/*
32 *  Define the interrupt mechanism for Time Test 27
33 *
34 *  NOTE: Following are for XXX and are board independent
35 *
36 */
37
38#define MUST_WAIT_FOR_INTERRUPT 1
39
40#if 0
41#define Install_tm27_vector( handler ) \
42    (void) set_vector( handler, TX3904_IRQ_SOFTWARE_1, 1 ); \
43
44#define Cause_tm27_intr() \
45    asm volatile ( "syscall 0x01" : : );
46
47#define CLOCK_VECTOR TX3904_IRQ_TMR0
48
49#define Clear_tm27_intr()
50
51#define Lower_tm27_intr()
52#else
53#define Install_tm27_vector( handler ) \
54    (void) set_vector( handler, TX3904_IRQ_TMR0, 1 ); \
55
56#define Cause_tm27_intr() \
57  do { \
58    uint32_t   _clicks = 20; \
59    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
60    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \
61    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \
62    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \
63    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR,   0xC0 ); \
64    *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \
65  } while(0)
66
67#define Clear_tm27_intr() \
68  do { \
69    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \
70    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \
71    TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR,   0x00 ); \
72  } while(0)
73
74#define Lower_tm27_intr() \
75  mips_enable_in_interrupt_mask( 0xff01 );
76
77#endif
78
79/* Constants */
80
81/* miscellaneous stuff assumed to exist */
82
83extern rtems_configuration_table BSP_Configuration;
84
85/*
86 *  Device Driver Table Entries
87 */
88
89/*
90 * NOTE: Use the standard Console driver entry
91 */
92
93/*
94 * NOTE: Use the standard Clock driver entry
95 */
96
97/* functions */
98
99void bsp_cleanup( void );
100
101rtems_isr_entry set_vector(
102  rtems_isr_entry, rtems_vector_number, int );
103
104#ifdef __cplusplus
105}
106#endif
107
108#endif
109/* end of include file */
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