[c8471315] | 1 | /* bsp.h |
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| 2 | * |
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| 3 | * This include file contains some definitions specific to the |
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| 4 | * JMR3904 simulator in gdb. |
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| 5 | * |
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| 6 | * COPYRIGHT (c) 1989-2000. |
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| 7 | * On-Line Applications Research Corporation (OAR). |
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| 8 | * |
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| 9 | * The license and distribution terms for this file may be |
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| 10 | * found in the file LICENSE in this distribution or at |
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[a6f969b3] | 11 | * http://www.rtems.com/license/LICENSE. |
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[c8471315] | 12 | * |
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| 13 | * $Id$ |
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| 14 | */ |
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| 15 | |
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| 16 | #ifndef __JMR3904_h |
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| 17 | #define __JMR3904_h |
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| 18 | |
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| 19 | #ifdef __cplusplus |
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| 20 | extern "C" { |
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| 21 | #endif |
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| 22 | |
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[ffb4ccf] | 23 | #include <bspopts.h> |
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| 24 | |
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[c8471315] | 25 | #include <rtems.h> |
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| 26 | #include <iosupp.h> |
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| 27 | #include <console.h> |
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| 28 | #include <clockdrv.h> |
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[7a677fd7] | 29 | #include <libcpu/tx3904.h> |
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[c8471315] | 30 | |
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| 31 | /* |
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| 32 | * Define the time limits for RTEMS Test Suite test durations. |
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| 33 | * Long test and short test duration limits are provided. These |
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| 34 | * values are in seconds and need to be converted to ticks for the |
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| 35 | * application. |
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| 36 | * |
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| 37 | */ |
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| 38 | |
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| 39 | #define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ |
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| 40 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
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| 41 | |
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| 42 | /* |
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| 43 | * Define the interrupt mechanism for Time Test 27 |
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| 44 | * |
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| 45 | * NOTE: Following are for XXX and are board independent |
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| 46 | * |
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| 47 | */ |
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| 48 | |
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[4d6b3b6] | 49 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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[c8471315] | 50 | |
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[4d6b3b6] | 51 | #if 0 |
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[2ba9d3bd] | 52 | #define Install_tm27_vector( handler ) \ |
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| 53 | (void) set_vector( handler, TX3904_IRQ_SOFTWARE_1, 1 ); \ |
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[c8471315] | 54 | |
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[2ba9d3bd] | 55 | #define Cause_tm27_intr() \ |
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[4d6b3b6] | 56 | asm volatile ( "syscall 0x01" : : ); |
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| 57 | |
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| 58 | #define CLOCK_VECTOR TX3904_IRQ_TMR0 |
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[c8471315] | 59 | |
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| 60 | #define Clear_tm27_intr() |
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| 61 | |
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| 62 | #define Lower_tm27_intr() |
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[4d6b3b6] | 63 | #else |
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| 64 | #define Install_tm27_vector( handler ) \ |
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| 65 | (void) set_vector( handler, TX3904_IRQ_TMR0, 1 ); \ |
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| 66 | |
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| 67 | #define Cause_tm27_intr() \ |
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| 68 | do { \ |
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[d1c60fb] | 69 | uint32_t _clicks = 20; \ |
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[4d6b3b6] | 70 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ |
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| 71 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \ |
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| 72 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ |
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| 73 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \ |
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| 74 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0xC0 ); \ |
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[d1c60fb] | 75 | *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \ |
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[4d6b3b6] | 76 | } while(0) |
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| 77 | |
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| 78 | #define Clear_tm27_intr() \ |
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[b335c503] | 79 | do { \ |
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| 80 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \ |
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| 81 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ |
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| 82 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ |
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| 83 | } while(0) |
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[4d6b3b6] | 84 | |
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| 85 | #define Lower_tm27_intr() \ |
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| 86 | mips_enable_in_interrupt_mask( 0xff01 ); |
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| 87 | |
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| 88 | #endif |
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[c8471315] | 89 | |
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| 90 | /* Constants */ |
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| 91 | |
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| 92 | /* miscellaneous stuff assumed to exist */ |
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| 93 | |
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| 94 | extern rtems_configuration_table BSP_Configuration; |
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| 95 | |
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| 96 | /* |
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| 97 | * Device Driver Table Entries |
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| 98 | */ |
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| 99 | |
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| 100 | /* |
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| 101 | * NOTE: Use the standard Console driver entry |
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| 102 | */ |
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| 103 | |
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| 104 | /* |
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| 105 | * NOTE: Use the standard Clock driver entry |
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| 106 | */ |
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| 107 | |
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| 108 | /* functions */ |
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| 109 | |
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| 110 | void bsp_cleanup( void ); |
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| 111 | |
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[4d6b3b6] | 112 | rtems_isr_entry set_vector( |
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| 113 | rtems_isr_entry, rtems_vector_number, int ); |
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[c8471315] | 114 | |
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| 115 | #ifdef __cplusplus |
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| 116 | } |
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| 117 | #endif |
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| 118 | |
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| 119 | #endif |
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| 120 | /* end of include file */ |
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