1 | /* |
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2 | * This routine starts the application. It includes application, |
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3 | * board, and monitor specific initialization and configuration. |
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4 | * The generic CPU dependent initialization has been performed |
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5 | * before this routine is invoked. |
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6 | * |
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7 | * COPYRIGHT (c) 1989-2001. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.OARcorp.com/rtems/license.html. |
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13 | * |
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14 | * $Id$ |
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15 | * |
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16 | * Modification History: |
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17 | * 12/10/01 A.Ferrer, NASA/GSFC, Code 582 |
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18 | * Set interrupt mask to 0xAF00 (Line 139). |
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19 | */ |
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20 | |
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21 | #include <string.h> |
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22 | |
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23 | #include <bsp.h> |
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24 | #include <rtems/libio.h> |
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25 | #include <rtems/libcsupport.h> |
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26 | #include <libcpu/mongoose-v.h> |
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27 | |
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28 | |
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29 | |
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30 | |
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31 | /* |
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32 | * The original table from the application and our copy of it with |
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33 | * some changes. |
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34 | */ |
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35 | |
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36 | extern rtems_configuration_table Configuration; |
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37 | |
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38 | rtems_configuration_table BSP_Configuration; |
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39 | |
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40 | rtems_cpu_table Cpu_table; |
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41 | |
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42 | char *rtems_progname; |
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43 | |
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44 | /* |
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45 | * Use the shared implementations of the following routines |
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46 | */ |
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47 | |
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48 | void bsp_postdriver_hook(void); |
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49 | void bsp_libc_init( void *, unsigned32, int ); |
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50 | |
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51 | /* |
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52 | * Function: bsp_pretasking_hook |
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53 | * Created: 95/03/10 |
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54 | * |
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55 | * Description: |
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56 | * BSP pretasking hook. Called just before drivers are initialized. |
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57 | * Used to setup libc and install any BSP extensions. |
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58 | * |
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59 | * NOTES: |
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60 | * Must not use libc (to do io) from here, since drivers are |
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61 | * not yet initialized. |
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62 | * |
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63 | */ |
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64 | |
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65 | void bsp_pretasking_hook(void) |
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66 | { |
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67 | extern int HeapBase; |
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68 | extern int HeapSize; |
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69 | void *heapStart = &HeapBase; |
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70 | unsigned long heapSize = (unsigned long)&HeapSize; |
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71 | |
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72 | bsp_libc_init(heapStart, (unsigned32) heapSize, 0); |
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73 | |
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74 | #ifdef RTEMS_DEBUG |
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75 | rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); |
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76 | #endif |
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77 | |
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78 | } |
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79 | |
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80 | |
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81 | |
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82 | /* |
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83 | * bsp_start |
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84 | * |
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85 | * This routine does the bulk of the system initialization. |
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86 | */ |
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87 | |
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88 | void bsp_start( void ) |
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89 | { |
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90 | extern void _sys_exit(int); |
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91 | extern int WorkspaceBase; |
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92 | extern void mips_install_isr_entries(); |
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93 | extern void mips_gdb_stub_install(void); |
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94 | |
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95 | /* Configure Number of Register Caches */ |
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96 | |
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97 | Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ |
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98 | Cpu_table.postdriver_hook = bsp_postdriver_hook; |
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99 | Cpu_table.interrupt_stack_size = 4096; |
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100 | |
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101 | /* HACK -- tied to value linkcmds */ |
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102 | if ( BSP_Configuration.work_space_size > (4096*1024) ) |
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103 | _sys_exit( 1 ); |
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104 | |
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105 | BSP_Configuration.work_space_start = (void *) &WorkspaceBase; |
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106 | |
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107 | /* mask off any interrupts */ |
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108 | MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 ); |
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109 | |
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110 | /* reset the config register & clear any pending peripheral interrupts */ |
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111 | MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 ); |
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112 | MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS ); |
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113 | MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 ); |
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114 | |
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115 | /* reset both timers */ |
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116 | MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff ); |
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117 | MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0); |
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118 | |
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119 | MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff ); |
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120 | MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0); |
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121 | |
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122 | /* clear any pending interrupts */ |
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123 | MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff ); |
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124 | |
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125 | /* clear any writable bits in the cause register */ |
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126 | mips_set_cause( 0 ); |
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127 | |
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128 | /* set interrupt mask, but globally off. */ |
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129 | |
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130 | /* |
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131 | ** Bit 15 | Bit 14 | Bit 13 | Bit 12 | Bit 11 | Bit 10 | Bit 9 | Bit 8 | |
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132 | ** periph | unused | FPU | unused | timer2 | timer1 | swint1 | swint2 | |
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133 | ** extern | | | | | | | | |
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134 | ** |
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135 | ** 1 0 1 0 0 1 0 0 |
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136 | ** |
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137 | ** 0x8C00 Enable only internal Mongoose V timers. |
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138 | ** 0xA400 Enable Peripherial ints, FPU and timer1 |
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139 | ** 0x0400 Timer1 only |
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140 | */ |
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141 | |
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142 | /* mips_set_sr( (SR_CU0 | SR_CU1 | 0xA400) ); */ |
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143 | |
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144 | /* to start up, only enable coprocessor 0 & timer int. per-task |
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145 | ** processor settings will be applied as they are created, this |
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146 | ** is just to configure the processor for startup |
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147 | */ |
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148 | mips_set_sr( (SR_CU0 | 0x400) ); |
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149 | |
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150 | mips_install_isr_entries(); |
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151 | } |
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152 | |
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153 | |
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154 | |
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155 | |
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156 | void clear_cache( void ) |
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157 | { |
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158 | extern void promCopyIcacheFlush(void); /* from start.S */ |
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159 | extern void promCopyDcacheFlush(void); |
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160 | |
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161 | promCopyIcacheFlush(); |
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162 | promCopyDcacheFlush(); |
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163 | } |
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164 | |
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165 | |
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166 | |
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167 | |
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168 | /* |
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169 | |
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170 | //Structure filled in by get_mem_info. |
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171 | |
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172 | |
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173 | struct s_mem |
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174 | { |
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175 | unsigned int size; |
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176 | unsigned int icsize; |
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177 | unsigned int dcsize; |
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178 | }; |
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179 | |
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180 | |
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181 | extern unsigned32 _RamSize; |
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182 | |
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183 | void get_mem_info ( struct s_mem *mem ) |
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184 | { |
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185 | mem->size = (unsigned32)&_RamSize; |
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186 | mem->icsize = MONGOOSEV_IC_SIZE; |
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187 | mem->dcsize = MONGOOSEV_DC_SIZE; |
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188 | } |
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189 | |
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190 | */ |
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191 | |
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