source: rtems/c/src/lib/libbsp/mips/genmongoosev/startup/bspstart.c @ 0ea3293

4.104.114.84.95
Last change on this file since 0ea3293 was 0ea3293, checked in by Joel Sherrill <joel.sherrill@…>, on 03/01/02 at 16:21:52

2002-02-27 Greg Menke <gregory.menke@…>

  • start/start.S: Added kseg1 test to enable cache flush code
  • bsp_specs: Added -qnostartfile to disable including bsp's start.o
  • startup/bspstart.c: Made clear_cache actually work, tweaked cpu init to only turn on whats needed.
  • startup/gdb-support.c: Added calls to uart 2 for gdb stub I/O and a handy init function.
  • Property mode set to 100644
File size: 4.8 KB
Line 
1/*
2 *  This routine starts the application.  It includes application,
3 *  board, and monitor specific initialization and configuration.
4 *  The generic CPU dependent initialization has been performed
5 *  before this routine is invoked.
6 *
7 *  COPYRIGHT (c) 1989-2001.
8 *  On-Line Applications Research Corporation (OAR).
9 *
10 *  The license and distribution terms for this file may be
11 *  found in the file LICENSE in this distribution or at
12 *  http://www.OARcorp.com/rtems/license.html.
13 *
14 *  $Id$
15 *
16 * Modification History:
17 *        12/10/01  A.Ferrer, NASA/GSFC, Code 582
18 *           Set interrupt mask to 0xAF00 (Line 139).
19 */
20
21#include <string.h>
22
23#include <bsp.h>
24#include <rtems/libio.h>
25#include <rtems/libcsupport.h>
26#include <libcpu/mongoose-v.h>
27
28
29
30
31/*
32 *  The original table from the application and our copy of it with
33 *  some changes.
34 */
35
36extern rtems_configuration_table Configuration;
37
38rtems_configuration_table  BSP_Configuration;
39
40rtems_cpu_table Cpu_table;
41
42char *rtems_progname;
43
44/*
45 *  Use the shared implementations of the following routines
46 */
47
48void bsp_postdriver_hook(void);
49void bsp_libc_init( void *, unsigned32, int );
50
51/*
52 *  Function:   bsp_pretasking_hook
53 *  Created:    95/03/10
54 *
55 *  Description:
56 *      BSP pretasking hook.  Called just before drivers are initialized.
57 *      Used to setup libc and install any BSP extensions.
58 *
59 *  NOTES:
60 *      Must not use libc (to do io) from here, since drivers are
61 *      not yet initialized.
62 *
63 */
64
65void bsp_pretasking_hook(void)
66{
67    extern int HeapBase;
68    extern int HeapSize;
69    void         *heapStart = &HeapBase;
70    unsigned long heapSize = (unsigned long)&HeapSize;
71    unsigned long ramSpace;
72
73    bsp_libc_init(heapStart, (unsigned32) heapSize, 0);
74
75#ifdef RTEMS_DEBUG
76    rtems_debug_enable( RTEMS_DEBUG_ALL_MASK );
77#endif
78
79}
80
81
82
83/*
84 *  bsp_start
85 *
86 *  This routine does the bulk of the system initialization.
87 */
88
89void bsp_start( void )
90{
91   extern void _sys_exit(int);
92   extern int WorkspaceBase;
93   extern void mips_install_isr_entries();
94   extern void mips_gdb_stub_install(void);
95   
96   /* Configure Number of Register Caches */
97
98   Cpu_table.pretasking_hook = bsp_pretasking_hook;  /* init libc, etc. */
99   Cpu_table.postdriver_hook = bsp_postdriver_hook;
100   Cpu_table.interrupt_stack_size = 4096;
101
102   /* HACK -- tied to value linkcmds */
103   if ( BSP_Configuration.work_space_size > (4096*1024) )
104      _sys_exit( 1 );
105
106   BSP_Configuration.work_space_start = (void *) &WorkspaceBase;
107
108   /* mask off any interrupts */
109   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_FUNCTION_INTERRUPT_MASK_REGISTER, 0 );
110
111   /* reset the config register & clear any pending peripheral interrupts */
112   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
113   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, MONGOOSEV_UART_CMD_RESET_BOTH_PORTS );
114   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_COMMAND_REGISTER, 0 );
115
116   /* reset both timers */
117   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
118   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER1_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
119
120   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_INITIAL_COUNTER_REGISTER, 0xffffffff );
121   MONGOOSEV_WRITE_REGISTER( MONGOOSEV_TIMER2_BASE, MONGOOSEV_TIMER_CONTROL_REGISTER, 0);
122
123   /* clear any pending interrupts */
124   MONGOOSEV_WRITE( MONGOOSEV_PERIPHERAL_STATUS_REGISTER, 0xffffffff );
125
126   /* clear any writable bits in the cause register */
127   mips_set_cause( 0 );
128
129   /* set interrupt mask, but globally off. */
130
131   /*
132   **  Bit 15 | Bit 14 | Bit 13 | Bit 12 | Bit 11 | Bit 10 | Bit  9 | Bit  8 |
133   **  periph | unused |  FPU   | unused | timer2 | timer1 | swint1 | swint2 |
134   **  extern |        |        |        |        |        |        |        |
135   **
136   **    1        0        1        0        0        1        0        0
137   **
138   **    0x8C00   Enable only internal Mongoose V timers.
139   **    0xA400   Enable Peripherial ints, FPU and timer1
140   **    0x0400   Timer1 only
141   */
142
143   /* mips_set_sr( (SR_CU0 | SR_CU1 | 0xA400) ); */
144
145   /* to start up, only enable coprocessor 0 & timer int. per-task
146   ** processor settings will be applied as they are created, this
147   ** is just to configure the processor for startup
148   */
149   mips_set_sr( (SR_CU0 | 0x400) );
150
151   mips_install_isr_entries();
152}
153
154
155
156
157void clear_cache( void )
158{
159   extern void promCopyIcacheFlush(void);       /* from start.S */
160   extern void promCopyDcacheFlush(void);
161
162   promCopyIcacheFlush();
163   promCopyDcacheFlush();
164}
165
166
167
168
169/*
170 
171//Structure filled in by get_mem_info.
172
173
174struct s_mem
175{
176  unsigned int size;
177  unsigned int icsize;
178  unsigned int dcsize;
179};
180
181
182extern unsigned32 _RamSize;
183
184void get_mem_info ( struct s_mem *mem )
185{
186   mem->size = (unsigned32)&_RamSize;
187   mem->icsize = MONGOOSEV_IC_SIZE;
188   mem->dcsize = MONGOOSEV_DC_SIZE;
189}
190
191*/
192
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