source: rtems/c/src/lib/libbsp/mips/genmongoosev/start/start.S @ 3491e9e

4.104.114.84.9
Last change on this file since 3491e9e was 3491e9e, checked in by Joel Sherrill <joel.sherrill@…>, on Apr 16, 2001 at 7:30:12 PM

2001-04-16 Joel Sherrill <joel@…>

  • start/start.S, startup/bspstart.c, startup/linkcmds: Modifications made with Gregory Menke <gregory.menke@…> as he debugged this BSP using a logic analyzer.
  • Property mode set to 100644
File size: 6.7 KB
Line 
1/*
2 * start.S -- startup file for GENMONGOOSE-V BSP. 
3 * It is based on the JMR3904 BSP which is in turn based upon
4 * support in newlib-1.8.2/libgloss/mips and adapted for RTEMS.
5 *
6 *  COPYRIGHT (c) 2001.
7 *  On-Line Applications Research Corporation (OAR).
8 *  Mongoose-V Modifications
9 *
10 * crt0.S -- startup file for MIPS.
11 *
12 * Copyright (c) 1995, 1996, 1997 Cygnus Support
13 *
14 * The authors hereby grant permission to use, copy, modify, distribute,
15 * and license this software and its documentation for any purpose, provided
16 * that existing copyright notices are retained in all copies and that this
17 * notice is included verbatim in any distributions. No written agreement,
18 * license, or royalty fee is required for any of the authorized uses.
19 * Modifications to this software may be copyrighted by their authors
20 * and need not follow the licensing terms described here, provided that
21 * the new terms are clearly indicated on the first page of each file where
22 * they apply.
23 */
24
25#ifdef __mips16
26/* This file contains 32 bit assembly code.  */
27        .set nomips16
28#endif
29
30#include "regs.S"
31
32/* This is for referencing addresses that are not in the .sdata or
33   .sbss section under embedded-pic, or before we've set up gp.  */
34#ifdef __mips_embedded_pic
35# ifdef __mips64
36#  define LA(t,x) la t,x-PICBASE ; daddu t,s0,t
37# else
38#  define LA(t,x) la t,x-PICBASE ; addu t,s0,t
39# endif
40#else /* __mips_embedded_pic */
41# define LA(t,x) la t,x
42#endif /* __mips_embedded_pic */
43
44#define zero            $0
45#define AT              $1              /* assembler temporaries */
46#define v0              $2              /* value holders */
47#define v1              $3
48#define a0              $4              /* arguments */
49#define a1              $5
50#define a2              $6
51#define a3              $7
52#define t0              $8              /* temporaries */
53#define t1              $9
54#define t2              $10
55#define t3              $11
56#define t4              $12
57#define t5              $13
58#define t6              $14
59#define t7              $15
60#define s0              $16             /* saved registers */
61#define s1              $17
62#define s2              $18
63#define s3              $19
64#define s4              $20
65#define s5              $21
66#define s6              $22
67#define s7              $23
68#define t8              $24             /* temporaries */
69#define t9              $25
70#define k0              $26             /* kernel registers */
71#define k1              $27
72#define gp              $28             /* global pointer */
73#define sp              $29             /* stack pointer */
74#define s8              $30             /* saved register */
75#define fp              $30             /* frame pointer (old usage) */
76#define ra              $31             /* return address */
77
78
79
80       
81        .text
82        .align  2
83
84/* Without the following nop, GDB thinks _start is a data variable.
85 * This is probably a bug in GDB in handling a symbol that is at the
86 * start of the .text section.
87 */
88        nop
89       
90        .globl  _start
91        .ent    _start
92_start:
93        .set    noreorder
94        # Get the address of start into $5 in a position independent fashion.
95        # This lets us know whether we have been relocated or not.
96       
97        $LF1 = . + 8
98        bal     $LF1
99        nop
100_branch:
101        move    $5, $31                         # $5 == where are we
102        li      $6, 0x8002000c                  # $6 == where we want to be
103        beq     $5, $6, _start_in_ram
104        nop
105        # relocate the code from EEPROM to RAM
106        la      $7, _edata
107relocate:
108        lw      $8, ($5)                        # $8 = *EEPROM
109        addu    $5, $5, 4                       # EEPROM++
110        sw      $8, ($6)                        # *RAM = $8
111        addu    $6, $6, 4                       # RAM++
112        bne     $6, $7, relocate                # copied all the way to edata?
113        nop
114
115        la      $6, _start_in_ram
116        jr      $6
117        nop
118        .end _start
119
120       
121        .globl  _start_in_ram
122        .ent _start_in_ram
123_start_in_ram:
124        nop
125
126#ifdef __mips_embedded_pic
127        PICBASE = .+8
128        bal     PICBASE
129        nop
130        move    s0,$31
131#endif
132
133        li      v0, SR_CU1|SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
134        mtc0    v0, C0_SR
135        mtc0    zero, C0_CAUSE
136
137/* Check for FPU presence */
138#ifndef __mips_soft_float
139/* This doesn't work if there is no FPU.  We get illegal instruction
140   exceptions.  */
141        li      t2,0xAAAA5555
142        mtc1    t2,fp0          /* write to FPR 0 */
143        mtc1    zero,fp1        /* write to FPR 1 */
144        mfc1    t0,fp0
145        mfc1    t1,fp1
146        nop
147        bne     t0,t2,1f        /* check for match */
148        nop
149        bne     t1,zero,1f      /* double check */
150        nop
151#ifndef __mips64  /* Clear the FR bit */
152        li      v0, SR_CU1|SR_PE|SR_KX|SR_SX|SR_UX
153        mtc0    v0, C0_SR
154#endif
155        j       2f
156        nop
157#endif
1581:
159        li      v0, SR_PE|SR_FR|SR_KX|SR_SX|SR_UX
160        mtc0    v0, C0_SR
1612:
162/* Fix high bits, if any, of the PC so that exception handling
163   doesn't get confused.  */
164        LA (v0, 3f)
165        jr      v0
166        nop
1673:
168        LA (gp, _gp)                            # set the global data pointer
169        .end _start
170
171/*
172 * zero out the bss section.
173 */
174        .globl  __memsize
175        .globl  zerobss
176        .ent    zerobss
177zerobss:
178        LA (v0, _fbss)
179        LA (v1, _end)
1803:
181        sw      zero,0(v0)
182        bltu    v0,v1,3b
183        addiu   v0,v0,4                         # executed in delay slot
184
185        la      t0, _stack_init                 # initialize stack so we
186        /* We must subtract 24 bytes for the 3 8 byte arguments to main, in
187           case main wants to write them back to the stack.  The caller is
188           supposed to allocate stack space for parameters in registers in
189           the old MIPS ABIs.  We must do this even though we aren't passing
190           arguments, because main might be declared to have them.
191
192           Some ports need a larger alignment for the stack, so we subtract
193           32, which satisifes the stack for the arguments and keeps the
194           stack pointer better aligned.  */
195        subu    t0,t0,32
196        move    sp,t0                           # set stack pointer
197        .end    zerobss
198
199        .globl  exit .text
200        .globl  init
201        .ent    init
202init:
203
204        move    a0,zero                         # set argc to 0
205        jal     boot_card                       # call the program start function
206        nop
207
208        # fall through to the "exit" routine
209        jal     _sys_exit                       # call libc exit to run the G++
210                                                # destructors
211        move    a0,v0                           # pass through the exit code
212        .end    init
213       
214/*
215 * _sys_exit -- Exit from the application. Normally we cause a user trap
216 *          to return to the ROM monitor for another run. NOTE: This is
217 *          the only other routine we provide in the crt0.o object, since
218 *          it may be tied to the "_start" routine. It also allows
219 *          executables that contain a complete world to be linked with
220 *          just the crt0.o object.
221 */
222        .globl  _sys_exit
223        .ent _sys_exit
224_sys_exit:
2257:
226#ifdef GCRT0
227        jal     _mcleanup
228        nop
229#endif
230        # break instruction can cope with 0xfffff, but GAS limits the range:
231        break   1023
232        nop
233        b       7b                              # but loop back just in-case
234        nop
235        .end _sys_exit
236
237#define FRAME(name,frm_reg,offset,ret_reg)      \
238        .globl  name;                           \
239        .ent    name;                           \
240name:;                                          \
241        .frame  frm_reg,offset,ret_reg
242#define ENDFRAME(name)                          \
243        .end name
244
245FRAME(mips_enable_interrupts,sp,0,ra)
246        mfc0 t0,C0_SR           /* get status reg */
247        nop
248        or t0,t0,a0
249        mtc0 t0,C0_SR           /* save updated status reg */
250        j ra
251        nop
252ENDFRAME(mips_enable_interrupts)
253#define SR_IEC          0x00000001      /* cur interrupt enable, 1 => enable */
254#define C0_SR           $12             /* status register */
255
256/*
257FRAME(_CPU_ISR_Set_level,sp,0,ra)
258        nop
259        mfc0 t0,C0_SR
260        andi a0, SR_IEC
261        or   t0, a0
262        mtc0 t0,C0_SR
263        nop
264        j ra
265ENDFRAME(_CPU_ISR_Set_level)
266*/
267
268        .section vectors
269        .align  2
270
271FRAME(__ISR_MAIN,sp,0,ra)
272       
273ENDFRAME(__ISR_MAIN)
274
275/* EOF crt0.S */
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