1 | /** |
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2 | * @file |
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3 | * |
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4 | * This file contains the termios TTY driver for the UART found |
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5 | * on the Synova Mongoose-V. |
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6 | */ |
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7 | |
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8 | /* |
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9 | * COPYRIGHT (c) 1989-2012. |
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10 | * On-Line Applications Research Corporation (OAR). |
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11 | * |
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12 | * The license and distribution terms for this file may be |
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13 | * found in the file LICENSE in this distribution or at |
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14 | * http://www.rtems.org/license/LICENSE. |
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15 | */ |
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16 | |
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17 | #include <rtems.h> |
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18 | #include <rtems/libio.h> |
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19 | #include <rtems/score/sysstate.h> |
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20 | #include <stdlib.h> |
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21 | |
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22 | #include <libchip/serial.h> |
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23 | #include <libchip/sersupp.h> |
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24 | #include <bsp/mg5uart.h> |
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25 | #include <bsp/mongoose-v.h> |
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26 | |
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27 | #include <bsp/irq.h> |
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28 | #include <bsp.h> |
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29 | |
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30 | /* |
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31 | * Indices of registers |
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32 | */ |
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33 | |
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34 | /* |
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35 | * Per chip context control |
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36 | */ |
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37 | |
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38 | typedef struct _mg5uart_context |
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39 | { |
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40 | int mate; |
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41 | } mg5uart_context; |
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42 | |
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43 | /* |
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44 | * Define MG5UART_STATIC to nothing while debugging so the entry points |
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45 | * will show up in the symbol table. |
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46 | */ |
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47 | /* #define MG5UART_STATIC */ |
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48 | #define MG5UART_STATIC static |
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49 | |
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50 | #define MG5UART_SETREG( _base, _register, _value ) \ |
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51 | MONGOOSEV_WRITE_REGISTER( _base, _register, _value ) |
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52 | |
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53 | #define MG5UART_GETREG( _base, _register ) \ |
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54 | MONGOOSEV_READ_REGISTER( _base, _register ) |
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55 | |
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56 | /* |
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57 | * Console Device Driver Support Functions |
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58 | */ |
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59 | |
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60 | MG5UART_STATIC int mg5uart_baud_rate( |
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61 | int minor, |
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62 | uint32_t baud, |
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63 | uint32_t *code |
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64 | ); |
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65 | |
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66 | MG5UART_STATIC void mg5uart_enable_interrupts( |
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67 | int minor, |
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68 | int mask |
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69 | ); |
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70 | |
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71 | /* |
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72 | * mg5uart_isr_XXX |
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73 | * |
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74 | * This is the single interrupt entry point which parcels interrupts |
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75 | * out to the handlers for specific sources and makes sure that the |
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76 | * shared handler gets the right arguments. |
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77 | * |
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78 | * NOTE: Yes .. this is ugly but it provides 5 interrupt source |
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79 | * wrappers which are nearly functionally identical. |
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80 | */ |
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81 | extern void mips_default_isr(int vector); |
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82 | |
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83 | #define __ISR(_TYPE, _OFFSET) \ |
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84 | MG5UART_STATIC void mg5uart_process_isr_ ## _TYPE ( \ |
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85 | int minor \ |
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86 | ); \ |
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87 | \ |
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88 | MG5UART_STATIC rtems_isr mg5uart_isr_ ## _TYPE ( \ |
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89 | void *arg \ |
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90 | ) \ |
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91 | { \ |
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92 | rtems_vector_number vector = (rtems_vector_number) arg; \ |
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93 | int minor; \ |
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94 | \ |
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95 | for(minor=0 ; minor<Console_Port_Count ; minor++) { \ |
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96 | if( Console_Port_Tbl[minor]->deviceType == SERIAL_MG5UART && \ |
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97 | vector == Console_Port_Tbl[minor]->ulIntVector + _OFFSET ) { \ |
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98 | mg5uart_process_isr_ ## _TYPE (minor); \ |
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99 | return; \ |
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100 | } \ |
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101 | } \ |
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102 | mips_default_isr( vector ); \ |
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103 | } |
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104 | |
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105 | __ISR(rx_frame_error, MG5UART_IRQ_RX_FRAME_ERROR) |
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106 | __ISR(rx_overrun_error, MG5UART_IRQ_RX_OVERRUN_ERROR) |
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107 | __ISR(tx_empty, MG5UART_IRQ_TX_EMPTY) |
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108 | __ISR(tx_ready, MG5UART_IRQ_TX_READY) |
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109 | __ISR(rx_ready, MG5UART_IRQ_RX_READY) |
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110 | |
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111 | /* |
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112 | * mg5uart_set_attributes |
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113 | * |
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114 | * This function sets the UART channel to reflect the requested termios |
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115 | * port settings. |
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116 | */ |
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117 | MG5UART_STATIC int mg5uart_set_attributes( |
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118 | int minor, |
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119 | const struct termios *t |
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120 | ) |
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121 | { |
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122 | uint32_t pMG5UART_port; |
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123 | uint32_t pMG5UART; |
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124 | uint32_t cmd, cmdSave; |
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125 | uint32_t baudcmd; |
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126 | uint32_t shift; |
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127 | rtems_interrupt_level Irql; |
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128 | |
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129 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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130 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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131 | |
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132 | /* |
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133 | * Set the baud rate |
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134 | */ |
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135 | |
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136 | if (mg5uart_baud_rate( minor, t->c_cflag, &baudcmd ) == -1) |
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137 | return -1; |
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138 | |
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139 | /* |
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140 | * Base settings |
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141 | */ |
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142 | |
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143 | /* |
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144 | * Base settings |
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145 | */ |
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146 | |
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147 | cmd = MONGOOSEV_UART_CMD_RX_ENABLE | MONGOOSEV_UART_CMD_TX_ENABLE; |
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148 | |
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149 | /* |
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150 | * Parity |
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151 | */ |
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152 | |
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153 | if (t->c_cflag & PARENB) { |
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154 | cmd |= MONGOOSEV_UART_CMD_PARITY_ENABLE; |
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155 | if (t->c_cflag & PARODD) |
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156 | cmd |= MONGOOSEV_UART_CMD_PARITY_ODD; |
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157 | else |
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158 | cmd |= MONGOOSEV_UART_CMD_PARITY_EVEN; |
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159 | } else { |
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160 | cmd |= MONGOOSEV_UART_CMD_PARITY_DISABLE; |
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161 | } |
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162 | |
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163 | /* |
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164 | * Character Size |
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165 | */ |
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166 | |
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167 | if (t->c_cflag & CSIZE) { |
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168 | switch (t->c_cflag & CSIZE) { |
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169 | case CS5: |
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170 | case CS6: |
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171 | case CS7: |
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172 | return -1; |
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173 | break; |
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174 | case CS8: |
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175 | /* Mongoose-V only supports CS8 */ |
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176 | break; |
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177 | |
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178 | } |
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179 | } /* else default to CS8 */ |
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180 | |
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181 | /* |
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182 | * Stop Bits |
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183 | */ |
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184 | |
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185 | #if 0 |
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186 | if (t->c_cflag & CSTOPB) { |
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187 | /* 2 stop bits not supported by Mongoose-V uart */ |
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188 | return -1; |
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189 | } |
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190 | #endif |
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191 | |
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192 | /* |
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193 | * XXX what about CTS/RTS |
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194 | */ |
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195 | |
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196 | /* XXX */ |
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197 | |
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198 | /* |
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199 | * Now write the registers |
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200 | */ |
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201 | |
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202 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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203 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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204 | else |
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205 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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206 | |
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207 | |
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208 | |
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209 | rtems_interrupt_disable(Irql); |
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210 | |
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211 | cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER ); |
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212 | |
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213 | MG5UART_SETREG( pMG5UART, |
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214 | MG5UART_COMMAND_REGISTER, |
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215 | (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) ); |
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216 | |
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217 | MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd ); |
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218 | |
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219 | rtems_interrupt_enable(Irql); |
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220 | return 0; |
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221 | } |
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222 | |
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223 | /* |
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224 | * mg5uart_initialize_context |
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225 | * |
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226 | * This function sets the default values of the per port context structure. |
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227 | */ |
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228 | MG5UART_STATIC void mg5uart_initialize_context( |
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229 | int minor, |
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230 | mg5uart_context *pmg5uartContext |
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231 | ) |
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232 | { |
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233 | int port; |
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234 | unsigned int pMG5UART; |
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235 | unsigned int pMG5UART_port; |
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236 | |
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237 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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238 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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239 | |
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240 | pmg5uartContext->mate = -1; |
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241 | |
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242 | for (port=0 ; port<Console_Port_Count ; port++ ) { |
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243 | if ( Console_Port_Tbl[port]->ulCtrlPort1 == pMG5UART && |
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244 | Console_Port_Tbl[port]->ulCtrlPort2 != pMG5UART_port ) { |
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245 | pmg5uartContext->mate = port; |
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246 | break; |
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247 | } |
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248 | } |
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249 | |
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250 | } |
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251 | |
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252 | /* |
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253 | * mg5uart_init |
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254 | * |
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255 | * This function initializes the DUART to a quiecsent state. |
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256 | */ |
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257 | MG5UART_STATIC void mg5uart_init(int minor) |
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258 | { |
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259 | uint32_t pMG5UART; |
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260 | uint32_t cmdSave; |
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261 | uint32_t shift; |
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262 | |
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263 | mg5uart_context *pmg5uartContext; |
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264 | |
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265 | pmg5uartContext = (mg5uart_context *) malloc(sizeof(mg5uart_context)); |
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266 | |
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267 | Console_Port_Data[minor].pDeviceContext = (void *)pmg5uartContext; |
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268 | |
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269 | mg5uart_initialize_context( minor, pmg5uartContext ); |
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270 | |
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271 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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272 | |
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273 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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274 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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275 | else |
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276 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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277 | |
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278 | /* |
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279 | * Disable the uart and leave this port disabled. |
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280 | */ |
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281 | |
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282 | cmdSave = MG5UART_GETREG(pMG5UART, MG5UART_COMMAND_REGISTER) & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift); |
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283 | |
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284 | MG5UART_SETREG( pMG5UART, MG5UART_COMMAND_REGISTER, cmdSave ); |
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285 | |
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286 | /* |
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287 | * Disable interrupts on RX and TX for this port |
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288 | */ |
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289 | mg5uart_enable_interrupts( minor, MG5UART_DISABLE_ALL ); |
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290 | } |
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291 | |
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292 | /* |
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293 | * mg5uart_open |
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294 | * |
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295 | * This function opens a port for communication. |
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296 | * |
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297 | * Default state is 9600 baud, 8 bits, No parity, and 1 stop bit. |
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298 | */ |
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299 | MG5UART_STATIC int mg5uart_open( |
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300 | int major, |
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301 | int minor, |
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302 | void *arg |
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303 | ) |
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304 | { |
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305 | uint32_t pMG5UART; |
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306 | uint32_t pMG5UART_port; |
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307 | uint32_t cmd, cmdSave; |
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308 | uint32_t baudcmd; |
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309 | uint32_t shift; |
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310 | |
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311 | rtems_interrupt_level Irql; |
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312 | |
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313 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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314 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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315 | |
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316 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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317 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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318 | else |
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319 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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320 | |
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321 | /* XXX default baud rate could be from configuration table */ |
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322 | |
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323 | (void) mg5uart_baud_rate( minor, B19200, &baudcmd ); |
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324 | |
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325 | /* |
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326 | * Set the DUART channel to a default useable state |
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327 | * B19200, 8Nx since there is no stop bit control. |
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328 | */ |
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329 | |
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330 | cmd = MONGOOSEV_UART_CMD_TX_ENABLE | MONGOOSEV_UART_CMD_RX_ENABLE; |
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331 | |
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332 | rtems_interrupt_disable(Irql); |
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333 | |
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334 | cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER ); |
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335 | |
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336 | MG5UART_SETREG( pMG5UART_port, MG5UART_BAUD_RATE, baudcmd ); |
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337 | |
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338 | MG5UART_SETREG( pMG5UART, |
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339 | MG5UART_COMMAND_REGISTER, |
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340 | cmd = (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) ); |
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341 | |
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342 | rtems_interrupt_enable(Irql); |
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343 | |
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344 | return RTEMS_SUCCESSFUL; |
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345 | } |
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346 | |
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347 | /* |
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348 | * mg5uart_close |
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349 | * |
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350 | * This function shuts down the requested port. |
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351 | */ |
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352 | MG5UART_STATIC int mg5uart_close( |
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353 | int major, |
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354 | int minor, |
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355 | void *arg |
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356 | ) |
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357 | { |
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358 | uint32_t pMG5UART; |
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359 | uint32_t cmd, cmdSave; |
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360 | uint32_t shift; |
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361 | rtems_interrupt_level Irql; |
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362 | |
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363 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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364 | |
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365 | /* |
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366 | * Disable interrupts from this channel and then disable it totally. |
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367 | */ |
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368 | |
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369 | /* XXX interrupts */ |
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370 | |
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371 | cmd = MONGOOSEV_UART_CMD_TX_DISABLE | MONGOOSEV_UART_CMD_RX_DISABLE; |
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372 | |
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373 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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374 | shift = MONGOOSEV_UART0_CMD_SHIFT; |
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375 | else |
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376 | shift = MONGOOSEV_UART1_CMD_SHIFT; |
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377 | |
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378 | |
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379 | rtems_interrupt_disable(Irql); |
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380 | cmdSave = MG5UART_GETREG( pMG5UART, MG5UART_COMMAND_REGISTER ); |
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381 | |
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382 | MG5UART_SETREG( pMG5UART, |
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383 | MG5UART_COMMAND_REGISTER, |
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384 | (cmdSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (cmd << shift) ); |
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385 | rtems_interrupt_enable(Irql); |
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386 | |
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387 | return(RTEMS_SUCCESSFUL); |
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388 | } |
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389 | |
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390 | /* |
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391 | * mg5uart_write_polled |
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392 | * |
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393 | * This routine polls out the requested character. |
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394 | */ |
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395 | MG5UART_STATIC void mg5uart_write_polled( |
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396 | int minor, |
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397 | char c |
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398 | ) |
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399 | { |
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400 | uint32_t pMG5UART; |
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401 | uint32_t pMG5UART_port; |
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402 | uint32_t status; |
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403 | int shift; |
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404 | int timeout; |
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405 | |
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406 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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407 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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408 | |
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409 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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410 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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411 | else |
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412 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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413 | |
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414 | /* |
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415 | * wait for transmitter holding register to be empty |
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416 | */ |
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417 | timeout = 2000; |
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418 | |
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419 | while( --timeout ) |
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420 | { |
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421 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
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422 | |
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423 | /* |
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424 | if ( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) == |
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425 | (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY) ) |
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426 | break; |
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427 | */ |
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428 | |
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429 | if( (status & (MONGOOSEV_UART_TX_READY | MONGOOSEV_UART_TX_EMPTY)) ) |
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430 | break; |
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431 | |
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432 | /* |
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433 | * Yield while we wait |
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434 | */ |
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435 | |
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436 | #if 0 |
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437 | if(_System_state_Is_up(_System_state_Get())) |
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438 | { |
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439 | rtems_task_wake_after(RTEMS_YIELD_PROCESSOR); |
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440 | } |
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441 | #endif |
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442 | } |
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443 | |
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444 | /* |
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445 | * transmit character |
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446 | */ |
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447 | |
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448 | MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, c); |
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449 | } |
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450 | |
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451 | MG5UART_STATIC void mg5uart_process_isr_rx_error( |
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452 | int minor, |
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453 | uint32_t mask |
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454 | ) |
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455 | { |
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456 | uint32_t pMG5UART; |
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457 | int shift; |
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458 | |
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459 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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460 | |
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461 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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462 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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463 | else |
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464 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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465 | |
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466 | /* now clear the error */ |
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467 | |
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468 | MG5UART_SETREG( |
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469 | pMG5UART, |
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470 | MG5UART_STATUS_REGISTER, |
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471 | mask << shift ); |
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472 | } |
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473 | |
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474 | MG5UART_STATIC void mg5uart_process_isr_rx_frame_error( |
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475 | int minor |
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476 | ) |
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477 | { |
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478 | mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_FRAME_ERROR ); |
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479 | } |
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480 | |
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481 | MG5UART_STATIC void mg5uart_process_isr_rx_overrun_error( |
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482 | int minor |
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483 | ) |
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484 | { |
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485 | mg5uart_process_isr_rx_error( minor, MONGOOSEV_UART_RX_OVERRUN_ERROR ); |
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486 | } |
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487 | |
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488 | MG5UART_STATIC void mg5uart_process_tx_isr( |
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489 | int minor, |
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490 | uint32_t source |
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491 | ) |
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492 | { |
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493 | uint32_t pMG5UART; |
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494 | int shift; |
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495 | |
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496 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
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497 | |
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498 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); |
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499 | |
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500 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
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501 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
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502 | else |
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503 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
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504 | |
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505 | MG5UART_SETREG( |
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506 | pMG5UART, |
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507 | MG5UART_STATUS_REGISTER, |
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508 | source << shift ); |
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509 | |
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510 | if( rtems_termios_dequeue_characters( Console_Port_Data[minor].termios_data, 1) ) |
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511 | { |
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512 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL); |
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513 | return; |
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514 | } |
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515 | |
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516 | /* |
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517 | * There are no more characters to transmit. The tx interrupts are be cleared |
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518 | * by writing data to the uart, so just disable the tx interrupt sources. |
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519 | */ |
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520 | |
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521 | Console_Port_Data[minor].bActive = FALSE; |
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522 | |
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523 | /* mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); */ |
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524 | } |
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525 | |
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526 | MG5UART_STATIC void mg5uart_process_isr_tx_empty( |
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527 | int minor |
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528 | ) |
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529 | { |
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530 | /* mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_EMPTY ); */ |
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531 | } |
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532 | |
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533 | MG5UART_STATIC void mg5uart_process_isr_tx_ready( |
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534 | int minor |
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535 | ) |
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536 | { |
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537 | mg5uart_process_tx_isr( minor, MONGOOSEV_UART_TX_READY ); |
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538 | } |
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539 | |
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540 | MG5UART_STATIC void mg5uart_process_isr_rx_ready( |
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541 | int minor |
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542 | ) |
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543 | { |
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544 | uint32_t pMG5UART_port; |
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545 | char c; |
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546 | |
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547 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
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548 | |
---|
549 | /* reading the RX buffer automatically resets the interrupt flag */ |
---|
550 | |
---|
551 | c = (char) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER); |
---|
552 | |
---|
553 | rtems_termios_enqueue_raw_characters( |
---|
554 | Console_Port_Data[minor].termios_data, |
---|
555 | &c, |
---|
556 | 1 |
---|
557 | ); |
---|
558 | } |
---|
559 | |
---|
560 | static rtems_irq_connect_data mg5uart_rx_frame_error_cd = { \ |
---|
561 | 0, /* filled in at initialization */ |
---|
562 | mg5uart_isr_rx_frame_error, /* filled in at initialization */ |
---|
563 | NULL, /* (void *) minor */ |
---|
564 | NULL, |
---|
565 | NULL, |
---|
566 | NULL |
---|
567 | }; |
---|
568 | |
---|
569 | static rtems_irq_connect_data mg5uart_rx_overrun_error_cd = { \ |
---|
570 | 0, /* filled in at initialization */ |
---|
571 | mg5uart_isr_rx_overrun_error, /* filled in at initialization */ |
---|
572 | NULL, /* (void *) minor */ |
---|
573 | NULL, |
---|
574 | NULL, |
---|
575 | NULL |
---|
576 | }; |
---|
577 | |
---|
578 | static rtems_irq_connect_data mg5uart_tx_empty_cd = { \ |
---|
579 | 0, /* filled in at initialization */ |
---|
580 | mg5uart_isr_tx_empty, /* filled in at initialization */ |
---|
581 | NULL, /* (void *) minor */ |
---|
582 | NULL, |
---|
583 | NULL, |
---|
584 | NULL |
---|
585 | }; |
---|
586 | |
---|
587 | static rtems_irq_connect_data mg5uart_tx_ready_cd = { \ |
---|
588 | 0, /* filled in at initialization */ |
---|
589 | mg5uart_isr_tx_ready, /* filled in at initialization */ |
---|
590 | NULL, /* (void *) minor */ |
---|
591 | NULL, |
---|
592 | NULL, |
---|
593 | NULL |
---|
594 | }; |
---|
595 | |
---|
596 | static rtems_irq_connect_data mg5uart_rx_ready_cd = { \ |
---|
597 | 0, /* filled in at initialization */ |
---|
598 | mg5uart_isr_rx_ready, /* filled in at initialization */ |
---|
599 | NULL, /* (void *) minor */ |
---|
600 | NULL, |
---|
601 | NULL, |
---|
602 | NULL |
---|
603 | }; |
---|
604 | |
---|
605 | |
---|
606 | /* |
---|
607 | * mg5uart_initialize_interrupts |
---|
608 | * |
---|
609 | * This routine initializes the console's receive and transmit |
---|
610 | * ring buffers and loads the appropriate vectors to handle the interrupts. |
---|
611 | */ |
---|
612 | |
---|
613 | MG5UART_STATIC void mg5uart_initialize_interrupts(int minor) |
---|
614 | { |
---|
615 | unsigned long v; |
---|
616 | mg5uart_init(minor); |
---|
617 | |
---|
618 | Console_Port_Data[minor].bActive = FALSE; |
---|
619 | v = Console_Port_Tbl[minor]->ulIntVector; |
---|
620 | |
---|
621 | mg5uart_rx_frame_error_cd.name = v + MG5UART_IRQ_RX_FRAME_ERROR; |
---|
622 | mg5uart_rx_overrun_error_cd.name = v + MG5UART_IRQ_RX_OVERRUN_ERROR; |
---|
623 | mg5uart_tx_empty_cd.name = v + MG5UART_IRQ_TX_EMPTY; |
---|
624 | mg5uart_tx_ready_cd.name = v + MG5UART_IRQ_TX_READY; |
---|
625 | mg5uart_rx_ready_cd.name = v + MG5UART_IRQ_RX_READY; |
---|
626 | |
---|
627 | mg5uart_rx_frame_error_cd.handle = (void *)mg5uart_rx_frame_error_cd.name; |
---|
628 | mg5uart_rx_overrun_error_cd.handle = (void *)mg5uart_rx_overrun_error_cd.name; |
---|
629 | mg5uart_tx_empty_cd.handle = (void *)mg5uart_tx_empty_cd.name; |
---|
630 | mg5uart_tx_ready_cd.handle = (void *)mg5uart_tx_ready_cd.name; |
---|
631 | mg5uart_rx_ready_cd.handle = (void *)mg5uart_rx_ready_cd.name; |
---|
632 | |
---|
633 | |
---|
634 | BSP_install_rtems_irq_handler( &mg5uart_rx_frame_error_cd ); |
---|
635 | BSP_install_rtems_irq_handler( &mg5uart_rx_overrun_error_cd ); |
---|
636 | BSP_install_rtems_irq_handler( &mg5uart_tx_empty_cd ); |
---|
637 | BSP_install_rtems_irq_handler( &mg5uart_tx_ready_cd ); |
---|
638 | BSP_install_rtems_irq_handler( &mg5uart_rx_ready_cd ); |
---|
639 | |
---|
640 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL_EXCEPT_TX); |
---|
641 | } |
---|
642 | |
---|
643 | /* |
---|
644 | * mg5uart_write_support_int |
---|
645 | * |
---|
646 | * Console Termios output entry point when using interrupt driven output. |
---|
647 | */ |
---|
648 | MG5UART_STATIC int mg5uart_write_support_int( |
---|
649 | int minor, |
---|
650 | const char *buf, |
---|
651 | size_t len |
---|
652 | ) |
---|
653 | { |
---|
654 | uint32_t pMG5UART_port; |
---|
655 | |
---|
656 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
657 | |
---|
658 | /* |
---|
659 | * We are using interrupt driven output and termios only sends us |
---|
660 | * one character at a time. |
---|
661 | */ |
---|
662 | |
---|
663 | if ( !len ) |
---|
664 | return 0; |
---|
665 | |
---|
666 | /* |
---|
667 | * Put the character out and enable interrupts if necessary. |
---|
668 | */ |
---|
669 | |
---|
670 | MG5UART_SETREG(pMG5UART_port, MG5UART_TX_BUFFER, *buf); |
---|
671 | |
---|
672 | if( Console_Port_Data[minor].bActive == FALSE ) |
---|
673 | { |
---|
674 | Console_Port_Data[minor].bActive = TRUE; |
---|
675 | mg5uart_enable_interrupts(minor, MG5UART_ENABLE_ALL); |
---|
676 | } |
---|
677 | |
---|
678 | return 1; |
---|
679 | } |
---|
680 | |
---|
681 | |
---|
682 | |
---|
683 | |
---|
684 | /* |
---|
685 | * mg5uart_write_support_polled |
---|
686 | * |
---|
687 | * Console Termios output entry point when using polled output. |
---|
688 | * |
---|
689 | */ |
---|
690 | |
---|
691 | MG5UART_STATIC ssize_t mg5uart_write_support_polled( |
---|
692 | int minor, |
---|
693 | const char *buf, |
---|
694 | size_t len |
---|
695 | ) |
---|
696 | { |
---|
697 | int nwrite = 0; |
---|
698 | |
---|
699 | /* |
---|
700 | * poll each byte in the string out of the port. |
---|
701 | */ |
---|
702 | while (nwrite < len) |
---|
703 | { |
---|
704 | mg5uart_write_polled(minor, *buf++); |
---|
705 | nwrite++; |
---|
706 | } |
---|
707 | |
---|
708 | /* |
---|
709 | * return the number of bytes written. |
---|
710 | */ |
---|
711 | return nwrite; |
---|
712 | } |
---|
713 | |
---|
714 | /* |
---|
715 | * mg5uart_inbyte_nonblocking_polled |
---|
716 | * |
---|
717 | * Console Termios polling input entry point. |
---|
718 | */ |
---|
719 | |
---|
720 | MG5UART_STATIC int mg5uart_inbyte_nonblocking_polled( |
---|
721 | int minor |
---|
722 | ) |
---|
723 | { |
---|
724 | uint32_t pMG5UART; |
---|
725 | uint32_t pMG5UART_port; |
---|
726 | uint32_t status; |
---|
727 | uint32_t tmp,shift; |
---|
728 | |
---|
729 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
---|
730 | pMG5UART_port = Console_Port_Tbl[minor]->ulCtrlPort2; |
---|
731 | |
---|
732 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
---|
733 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
---|
734 | else |
---|
735 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
---|
736 | |
---|
737 | /* reset overrrun or framing errors */ |
---|
738 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
---|
739 | |
---|
740 | if( (tmp = (status & 0x3)) ) |
---|
741 | { |
---|
742 | MG5UART_SETREG(pMG5UART, MG5UART_STATUS_REGISTER, (tmp << shift) ); |
---|
743 | status = MG5UART_GETREG(pMG5UART, MG5UART_STATUS_REGISTER) >> shift; |
---|
744 | } |
---|
745 | |
---|
746 | if ( status & MONGOOSEV_UART_RX_READY ) |
---|
747 | { |
---|
748 | return (int) MG5UART_GETREG(pMG5UART_port, MG5UART_RX_BUFFER); |
---|
749 | } |
---|
750 | else |
---|
751 | { |
---|
752 | return -1; |
---|
753 | } |
---|
754 | } |
---|
755 | |
---|
756 | /* |
---|
757 | * mg5uart_baud_rate |
---|
758 | */ |
---|
759 | |
---|
760 | MG5UART_STATIC int mg5uart_baud_rate( |
---|
761 | int minor, |
---|
762 | uint32_t baud, |
---|
763 | uint32_t *code |
---|
764 | ) |
---|
765 | { |
---|
766 | uint32_t clock; |
---|
767 | uint32_t tmp_code; |
---|
768 | uint32_t baud_requested; |
---|
769 | |
---|
770 | baud_requested = baud & CBAUD; |
---|
771 | if (!baud_requested) |
---|
772 | baud_requested = B9600; /* default to 9600 baud */ |
---|
773 | |
---|
774 | baud_requested = rtems_termios_baud_to_number( baud_requested ); |
---|
775 | |
---|
776 | clock = (uint32_t) Console_Port_Tbl[minor]->ulClock; |
---|
777 | if (!clock) |
---|
778 | rtems_fatal_error_occurred(RTEMS_INVALID_NUMBER); |
---|
779 | |
---|
780 | /* |
---|
781 | * Formula is Code = round(ClockFrequency / Baud - 1). |
---|
782 | * |
---|
783 | * Since this is integer math, we will divide by twice the baud and |
---|
784 | * check the remaining odd bit. |
---|
785 | */ |
---|
786 | |
---|
787 | tmp_code = (clock / baud_requested) - 1; |
---|
788 | |
---|
789 | /* |
---|
790 | * From section 12.7, "Keep C>100 for best receiver operation." |
---|
791 | * That is 100 cycles which is not a lot of instructions. It is |
---|
792 | * reasonable to think that the Mongoose-V could not keep |
---|
793 | * up with C < 100. |
---|
794 | */ |
---|
795 | |
---|
796 | if ( tmp_code < 100 ) |
---|
797 | return RTEMS_INVALID_NUMBER; |
---|
798 | |
---|
799 | /* |
---|
800 | * upper word is receiver baud and lower word is transmitter baud |
---|
801 | */ |
---|
802 | |
---|
803 | *code = (tmp_code << 16) | tmp_code; |
---|
804 | |
---|
805 | return 0; |
---|
806 | } |
---|
807 | |
---|
808 | |
---|
809 | |
---|
810 | |
---|
811 | /* |
---|
812 | * mg5uart_enable_interrupts |
---|
813 | * |
---|
814 | * This function enables specific interrupt sources on the DUART. |
---|
815 | */ |
---|
816 | |
---|
817 | MG5UART_STATIC void mg5uart_enable_interrupts( |
---|
818 | int minor, |
---|
819 | int mask |
---|
820 | ) |
---|
821 | { |
---|
822 | uint32_t pMG5UART; |
---|
823 | uint32_t maskSave; |
---|
824 | uint32_t shift; |
---|
825 | rtems_interrupt_level Irql; |
---|
826 | |
---|
827 | pMG5UART = Console_Port_Tbl[minor]->ulCtrlPort1; |
---|
828 | |
---|
829 | /* |
---|
830 | * Enable interrupts on RX and TX -- not break |
---|
831 | */ |
---|
832 | |
---|
833 | if ( Console_Port_Tbl[minor]->ulDataPort == MG5UART_UART0 ) |
---|
834 | shift = MONGOOSEV_UART0_IRQ_SHIFT; |
---|
835 | else |
---|
836 | shift = MONGOOSEV_UART1_IRQ_SHIFT; |
---|
837 | |
---|
838 | |
---|
839 | rtems_interrupt_disable(Irql); |
---|
840 | |
---|
841 | maskSave = MG5UART_GETREG( pMG5UART, MG5UART_INTERRUPT_MASK_REGISTER ); |
---|
842 | |
---|
843 | MG5UART_SETREG( |
---|
844 | pMG5UART, |
---|
845 | MG5UART_INTERRUPT_MASK_REGISTER, |
---|
846 | (maskSave & ~(MONGOOSEV_UART_ALL_STATUS_BITS << shift)) | (mask << shift) ); |
---|
847 | |
---|
848 | rtems_interrupt_enable(Irql); |
---|
849 | } |
---|
850 | |
---|
851 | |
---|
852 | |
---|
853 | /* |
---|
854 | * Flow control is only supported when using interrupts |
---|
855 | */ |
---|
856 | |
---|
857 | const console_fns mg5uart_fns = |
---|
858 | { |
---|
859 | libchip_serial_default_probe, /* deviceProbe */ |
---|
860 | mg5uart_open, /* deviceFirstOpen */ |
---|
861 | NULL, /* deviceLastClose */ |
---|
862 | NULL, /* deviceRead */ |
---|
863 | mg5uart_write_support_int, /* deviceWrite */ |
---|
864 | mg5uart_initialize_interrupts, /* deviceInitialize */ |
---|
865 | mg5uart_write_polled, /* deviceWritePolled */ |
---|
866 | mg5uart_set_attributes, /* deviceSetAttributes */ |
---|
867 | TRUE /* deviceOutputUsesInterrupts */ |
---|
868 | }; |
---|
869 | |
---|
870 | const console_fns mg5uart_fns_polled = |
---|
871 | { |
---|
872 | libchip_serial_default_probe, /* deviceProbe */ |
---|
873 | mg5uart_open, /* deviceFirstOpen */ |
---|
874 | mg5uart_close, /* deviceLastClose */ |
---|
875 | mg5uart_inbyte_nonblocking_polled, /* deviceRead */ |
---|
876 | mg5uart_write_support_polled, /* deviceWrite */ |
---|
877 | mg5uart_init, /* deviceInitialize */ |
---|
878 | mg5uart_write_polled, /* deviceWritePolled */ |
---|
879 | mg5uart_set_attributes, /* deviceSetAttributes */ |
---|
880 | FALSE, /* deviceOutputUsesInterrupts */ |
---|
881 | }; |
---|