1 | /* |
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2 | * tm27.h |
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3 | * |
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4 | * The license and distribution terms for this file may be |
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5 | * found in the file LICENSE in this distribution or at |
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6 | * http://www.rtems.com/license/LICENSE. |
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7 | * |
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8 | * $Id$ |
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9 | */ |
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10 | |
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11 | #ifndef _RTEMS_TMTEST27 |
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12 | #error "This is an RTEMS internal file you must not include directly." |
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13 | #endif |
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14 | |
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15 | #ifndef __tm27_h |
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16 | #define __tm27_h |
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17 | |
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18 | /* |
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19 | * Define the interrupt mechanism for Time Test 27 |
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20 | */ |
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21 | |
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22 | #define MUST_WAIT_FOR_INTERRUPT 1 |
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23 | |
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24 | #if 0 |
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25 | #define Install_tm27_vector( handler ) \ |
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26 | (void) set_vector( handler, TX3904_IRQ_SOFTWARE_1, 1 ); \ |
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27 | |
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28 | #define Cause_tm27_intr() \ |
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29 | asm volatile ( "syscall 0x01" : : ); |
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30 | |
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31 | #define CLOCK_VECTOR TX3904_IRQ_TMR0 |
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32 | |
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33 | #define Clear_tm27_intr() /* empty */ |
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34 | |
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35 | #define Lower_tm27_intr() /* empty */ |
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36 | #else |
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37 | #define Install_tm27_vector( handler ) \ |
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38 | (void) set_vector( handler, TX3904_IRQ_TMR0, 1 ); \ |
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39 | |
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40 | #define Cause_tm27_intr() \ |
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41 | do { \ |
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42 | uint32_t _clicks = 20; \ |
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43 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ |
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44 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \ |
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45 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ |
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46 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \ |
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47 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0xC0 ); \ |
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48 | *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \ |
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49 | } while(0) |
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50 | |
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51 | #define Clear_tm27_intr() \ |
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52 | do { \ |
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53 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \ |
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54 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ |
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55 | TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ |
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56 | } while(0) |
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57 | |
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58 | #define Lower_tm27_intr() \ |
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59 | mips_enable_in_interrupt_mask( 0xff01 ); |
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60 | |
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61 | #endif |
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62 | |
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63 | #endif |
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