source: rtems/c/src/lib/libbsp/mips/csb350/clock/clockdrv.c @ c030edd

Last change on this file since c030edd was e026dbc5, checked in by Joel Sherrill <joel@…>, on Mar 9, 2017 at 10:07:55 PM

libbsp/csb350/clock/clockdrv.c: Remove unneeded printk()

  • Property mode set to 100644
File size: 2.9 KB
Line 
1/**
2 *  @file
3 * 
4 *  Instantiate the clock driver shell.
5 *
6 *  This uses the TOY (Time of Year) timer to implement the clock.
7 */
8
9/*
10 *  Copyright (c) 2005 by Cogent Computer Systems
11 *  Written by Jay Monkman <jtm@lopingdog.com>
12 *
13 *  The license and distribution terms for this file may be
14 *  found in the file LICENSE in this distribution or at
15 *  http://www.rtems.org/license/LICENSE.
16 */
17
18#include <rtems.h>
19#include <bsp.h>
20#include <bsp/irq.h>
21#include <rtems/bspIo.h>
22
23uint32_t tick_interval;
24uint32_t last_match;
25
26void au1x00_clock_init(void);
27
28#define CLOCK_VECTOR AU1X00_IRQ_TOY_MATCH2
29
30#define Clock_driver_support_at_tick()                        \
31  do {                                                        \
32    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TM0); \
33    last_match = AU1X00_SYS_TOYREAD(AU1X00_SYS_ADDR); \
34    AU1X00_SYS_TOYMATCH2(AU1X00_SYS_ADDR) = last_match + tick_interval; \
35    au_sync(); \
36  } while(0)
37
38/* Set for rising edge interrupt */
39#define Clock_driver_support_install_isr( _new, _old )  \
40  do {                                                  \
41    rtems_interrupt_handler_install( \
42      CLOCK_VECTOR, \
43      "clock", \
44      0, \
45      _new, \
46      NULL \
47    ); \
48    AU1X00_IC_MASKCLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
49    AU1X00_IC_SRCSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
50    AU1X00_IC_CFG0SET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
51    AU1X00_IC_CFG1CLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
52    AU1X00_IC_CFG2CLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
53    AU1X00_IC_ASSIGNSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
54  } while(0)
55
56void au1x00_clock_init(void)
57{
58    uint32_t wakemask;
59    /* Clear the trim register */
60    AU1X00_SYS_TOYTRIM(AU1X00_SYS_ADDR) = 0;
61
62    /* Clear the TOY counter */
63    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TS);
64    AU1X00_SYS_TOYWRITE(AU1X00_SYS_ADDR) = 0;
65    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TS);
66
67    wakemask = AU1X00_SYS_WAKEMSK(AU1X00_SYS_ADDR);
68    wakemask |= AU1X00_SYS_WAKEMSK_M20;
69    AU1X00_SYS_WAKEMSK(AU1X00_SYS_ADDR) = wakemask;
70    AU1X00_IC_WAKESET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2;
71
72    tick_interval = 32768 * rtems_configuration_get_microseconds_per_tick();
73    tick_interval = tick_interval / 1000000;
74
75    last_match = AU1X00_SYS_TOYREAD(AU1X00_SYS_ADDR);
76    AU1X00_SYS_TOYMATCH2(AU1X00_SYS_ADDR) = last_match + (50*tick_interval);
77    AU1X00_IC_MASKSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2;
78    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TM0);
79}
80
81#define Clock_driver_support_initialize_hardware() \
82  do {                                                  \
83     au1x00_clock_init(); \
84  } while(0)
85
86#define Clock_driver_support_shutdown_hardware()
87
88#define CLOCK_DRIVER_USE_DUMMY_TIMECOUNTER
89
90#include "../../../shared/clockdrv_shell.h"
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