source: rtems/c/src/lib/libbsp/mips/csb350/clock/clockdrv.c @ 86f8ee90

4.115
Last change on this file since 86f8ee90 was 86f8ee90, checked in by Joel Sherrill <joel.sherrill@…>, on 01/28/11 at 20:29:47

2011-01-28 Joel Sherrill <joel.sherrilL@…>

  • csb350/clock/clockdrv.c, csb350/network/network.c, csb350/start/start.S, csb350/timer/timer.c, genmongoosev/clock/clockdrv.c, genmongoosev/timer/timer.c, jmr3904/timer/timer.c, jmr3904/tools/runtest.in: Fix typo where license said found in found in.
  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 *  Instantiate the clock driver shell.
3 *
4 *  This uses the TOY (Time of Year) timer to implement the clock.
5 *
6 *  Copyright (c) 2005 by Cogent Computer Systems
7 *  Written by Jay Monkman <jtm@lopingdog.com>
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 *
13 *  $Id$
14 */
15
16#include <rtems.h>
17#include <bsp.h>
18#include <libcpu/au1x00.h>
19#include <rtems/bspIo.h>
20
21uint32_t tick_interval;
22uint32_t last_match;
23
24#define CLOCK_VECTOR AU1X00_IRQ_TOY_MATCH2
25
26#define Clock_driver_support_at_tick()                        \
27  do {                                                        \
28    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TM0); \
29    last_match = AU1X00_SYS_TOYREAD(AU1X00_SYS_ADDR); \
30    AU1X00_SYS_TOYMATCH2(AU1X00_SYS_ADDR) = last_match + tick_interval; \
31    au_sync(); \
32  } while(0)
33
34/* Set for rising edge interrupt */
35#define Clock_driver_support_install_isr( _new, _old )  \
36  do {                                                  \
37        _old = set_vector( _new, AU1X00_IRQ_TOY_MATCH2, 1 );     \
38        AU1X00_IC_MASKCLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
39        AU1X00_IC_SRCSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
40        AU1X00_IC_CFG0SET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
41        AU1X00_IC_CFG1CLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
42        AU1X00_IC_CFG2CLR(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
43        AU1X00_IC_ASSIGNSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2; \
44  } while(0)
45
46void au1x00_clock_init(void)
47{
48    uint32_t wakemask;
49    /* Clear the trim register */
50    AU1X00_SYS_TOYTRIM(AU1X00_SYS_ADDR) = 0;
51
52    /* Clear the TOY counter */
53    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TS);
54    AU1X00_SYS_TOYWRITE(AU1X00_SYS_ADDR) = 0;
55    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TS);
56
57    wakemask = AU1X00_SYS_WAKEMSK(AU1X00_SYS_ADDR);
58    wakemask |= AU1X00_SYS_WAKEMSK_M20;
59    AU1X00_SYS_WAKEMSK(AU1X00_SYS_ADDR) = wakemask;
60    AU1X00_IC_WAKESET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2;
61
62    tick_interval = 32768 * rtems_configuration_get_microseconds_per_tick();
63    tick_interval = tick_interval / 1000000;
64    printk("tick_interval = %d\n", tick_interval);
65
66    last_match = AU1X00_SYS_TOYREAD(AU1X00_SYS_ADDR);
67    AU1X00_SYS_TOYMATCH2(AU1X00_SYS_ADDR) = last_match + (50*tick_interval);
68    AU1X00_IC_MASKSET(AU1X00_IC0_ADDR) = AU1X00_IC_IRQ_TOY_MATCH2;
69    while (AU1X00_SYS_CNTCTRL(AU1X00_SYS_ADDR) & AU1X00_SYS_CNTCTRL_TM0);
70}
71
72#define Clock_driver_support_initialize_hardware() \
73  do {                                                  \
74     au1x00_clock_init(); \
75  } while(0)
76
77
78
79#define Clock_driver_support_shutdown_hardware()
80
81#include "../../../shared/clockdrv_shell.h"
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