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source: rtems/c/src/lib/libbsp/m68k/uC5282/network/network.c @ 7c7184a

4.104.114.84.95

Last change on this file since 7c7184a was 7c7184a, checked in by Eric Norum <WENorum@…>, on 02/01/05 at 15:12:55
Place FEC buffer descriptors in static RAM. No more cache concerns.
Property mode set to `100644`
File size: 25.5 KB

Line
1	/*
2	* RTEMS/TCPIP driver for MCF5282 Fast Ethernet Controller
3	*
4	* TO DO: MII communications to set speed, full/half duplex, etc.
5	* TO DO: Check network stack code -- force longword alignment of all tx mbufs?
6	*/
7
8	#include <bsp.h>
9	#include <stdio.h>
10	#include <errno.h>
11	#include <stdarg.h>
12	#include <string.h>
13	#include <rtems.h>
14	#include <rtems/error.h>
15	#include <rtems/rtems_bsdnet.h>
16
17	#include <sys/param.h>
18	#include <sys/mbuf.h>
19	#include <sys/socket.h>
20	#include <sys/sockio.h>
21
22	#include <net/ethernet.h>
23	#include <net/if.h>
24
25	#include <netinet/in.h>
26	#include <netinet/if_ether.h>
27
28
29	/*
30	* Number of interfaces supported by this driver
31	*/
32	#define NIFACES 1
33
34	#define FEC_INTC0_TX_VECTOR (64+23)
35	#define FEC_INTC0_RX_VECTOR (64+27)
36
37	/*
38	* Default number of buffer descriptors set aside for this driver.
39	* The number of transmit buffer descriptors has to be quite large
40	* since a single frame often uses three or more buffer descriptors.
41	*/
42	#define RX_BUF_COUNT 32
43	#define TX_BUF_COUNT 20
44	#define TX_BD_PER_BUF 3
45
46	#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
47
48	/*
49	* RTEMS event used by interrupt handler to signal daemons.
50	* This must not be the same event used by the TCP/IP task synchronization.
51	*/
52	#define TX_INTERRUPT_EVENT RTEMS_EVENT_1
53	#define RX_INTERRUPT_EVENT RTEMS_EVENT_1
54
55	/*
56	* RTEMS event used to start transmit daemon.
57	* This must not be the same as INTERRUPT_EVENT.
58	*/
59	#define START_TRANSMIT_EVENT RTEMS_EVENT_2
60
61	/*
62	* Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
63	* Round off to nearest multiple of RBUF_ALIGN.
64	*/
65	#define MAX_MTU_SIZE 1518
66	#define RBUF_ALIGN 4
67	#define RBUF_SIZE ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
68
69	#if (MCLBYTES < RBUF_SIZE)
70	#error "Driver must have MCLBYTES > RBUF_SIZE"
71	#endif
72
73	typedef struct mcf5282BufferDescriptor_ {
74	volatile rtems_unsigned16 status;
75	rtems_unsigned16 length;
76	volatile void *buffer;
77	} mcf5282BufferDescriptor_t;
78
79	/*
80	* Per-device data
81	*/
82	struct mcf5282_enet_struct {
83	struct arpcom arpcom;
84	struct mbuf **rxMbuf;
85	struct mbuf **txMbuf;
86	int acceptBroadcast;
87	int rxBdCount;
88	int txBdCount;
89	int txBdHead;
90	int txBdTail;
91	int txBdActiveCount;
92	mcf5282BufferDescriptor_t *rxBdBase;
93	mcf5282BufferDescriptor_t *txBdBase;
94	rtems_id rxDaemonTid;
95	rtems_id txDaemonTid;
96
97	/*
98	* Statistics
99	*/
100	unsigned long rxInterrupts;
101	unsigned long txInterrupts;
102	unsigned long txRawWait;
103	unsigned long txRealign;
104	};
105	static struct mcf5282_enet_struct enet_driver[NIFACES];
106
107	static rtems_isr
108	mcf5282_fec_rx_interrupt_handler( rtems_vector_number v )
109	{
110	MCF5282_FEC_EIR = MCF5282_FEC_EIR_RXF;
111	MCF5282_FEC_EIMR &= ~MCF5282_FEC_EIMR_RXF;
112	enet_driver[0].rxInterrupts++;
113	rtems_event_send(enet_driver[0].rxDaemonTid, RX_INTERRUPT_EVENT);
114	}
115
116	static rtems_isr
117	mcf5282_fec_tx_interrupt_handler( rtems_vector_number v )
118	{
119	MCF5282_FEC_EIR = MCF5282_FEC_EIR_TXF;
120	MCF5282_FEC_EIMR &= ~MCF5282_FEC_EIMR_TXF;
121	enet_driver[0].txInterrupts++;
122	rtems_event_send(enet_driver[0].txDaemonTid, TX_INTERRUPT_EVENT);
123	}
124
125	/*
126	* Allocate buffer descriptors from (non-cached) on-chip static RAM
127	* Ensure 128-bit (16-byte) alignment
128	*/
129	static mcf5282BufferDescriptor_t *
130	mcf5282_bd_allocate(unsigned int count)
131	{
132	extern char __SRAMBASE[];
133	static mcf5282BufferDescriptor_t bdp = (mcf5282BufferDescriptor_t )__SRAMBASE;
134	mcf5282BufferDescriptor_t *p = bdp;
135
136	bdp += count;
137	if ((int)bdp & 0xF)
138	bdp = (mcf5282BufferDescriptor_t )((char )bdp + (16 - ((int)bdp & 0xF)));
139	return p;
140	}
141
142	/*
143	* Retrieve MAC address from bootloader environment variable area.
144	* Parameter is interface number (0 or 1).
145	*/
146	static unsigned char *
147	gethwaddr(int a)
148	{
149	register long __res __asm__ ("%d2") = 12;
150	register long __a __asm__ ("%d1") = (long)a;
151	__asm__ __volatile__ ("trap #2" \
152	: "=g" (__res) \
153	: "0" (__res), "d" (__a) \
154	: "%d0");
155	return (unsigned char *)(__res);
156	}
157
158	static void
159	mcf5282_fec_initialize_hardware(struct mcf5282_enet_struct *sc)
160	{
161	int i;
162	unsigned char *hwaddr;
163	rtems_status_code status;
164	rtems_isr_entry old_handler;
165	unsigned32 clock_speed = get_CPU_clock_speed();
166
167	/* extern struct rtems_bsdnet_ifconfig netdriver_config; */
168
169
170	/*
171	* Issue reset to FEC
172	*/
173	MCF5282_FEC_ECR = MCF5282_FEC_ECR_RESET;
174	rtems_task_wake_after(1);
175	/*
176	* Configuration of I/O ports is done outside of this function
177	*/
178	#if 0
179	imm->gpio.pbcnt \|= MCF5282_GPIO_PBCNT_SET_FEC; /* Set up port b FEC pins */
180	#endif
181
182	/*
183	* Set our physical address
184	*/
185	hwaddr = sc->arpcom.ac_enaddr;
186	MCF5282_FEC_PALR = (hwaddr[0] << 24) \| (hwaddr[1] << 16) \|
187	(hwaddr[2] << 8) \| (hwaddr[3] << 0);
188	MCF5282_FEC_PAUR = (hwaddr[4] << 24) \| (hwaddr[5] << 16);
189
190
191	/*
192	* Clear the hash table
193	*/
194	MCF5282_FEC_GAUR = 0;
195	MCF5282_FEC_GALR = 0;
196
197	/*
198	* Set up receive buffer size
199	*/
200	MCF5282_FEC_EMRBR = 1520; /* Standard Ethernet */
201
202	/*
203	* Allocate mbuf pointers
204	*/
205	sc->rxMbuf = malloc(sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT);
206	sc->txMbuf = malloc(sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT);
207	if (!sc->rxMbuf \|\| !sc->txMbuf)
208	rtems_panic("No memory for mbuf pointers");
209
210	/*
211	* Set receiver and transmitter buffer descriptor bases
212	*/
213	sc->rxBdBase = mcf5282_bd_allocate(sc->rxBdCount);
214	sc->txBdBase = mcf5282_bd_allocate(sc->txBdCount);
215	MCF5282_FEC_ERDSR = (int)sc->rxBdBase;
216	MCF5282_FEC_ETDSR = (int)sc->txBdBase;
217
218	/*
219	* Set up Receive Control Register:
220	* Not promiscuous
221	* MII mode
222	* Half duplex
223	* No loopback
224	*/
225	MCF5282_FEC_RCR = MCF5282_FEC_RCR_MAX_FL(MAX_MTU_SIZE) \|
226	MCF5282_FEC_RCR_MII_MODE \|
227	MCF5282_FEC_RCR_DRT;
228
229	/*
230	* Set up Transmit Control Register:
231	* Half duplex
232	* No heartbeat
233	*/
234	MCF5282_FEC_TCR = 0;
235
236	/*
237	* Initialize statistic counters
238	*/
239	MCF5282_FEC_MIBC = MCF5282_FEC_MIBC_MIB_DISABLE;
240	{
241	vuint32 *vuip = &MCF5282_FEC_RMON_T_DROP;
242	while (vuip <= &MCF5282_FEC_IEEE_R_OCTETS_OK)
243	*vuip++ = 0;
244	}
245	MCF5282_FEC_MIBC = 0;
246
247	/*
248	* Set MII speed to <2.5 MHz
249	*/
250	if (clock_speed <= 25000000)
251	MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0x5);
252	else if (clock_speed <= 33000000)
253	MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0x7);
254	else if (clock_speed <= 40000000)
255	MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0x8);
256	else if (clock_speed <= 50000000)
257	MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0xA);
258	else if (clock_speed <= 66000000)
259	MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0xD);
260	else
261	MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0xF);
262
263	/*
264	* Set up receive buffer descriptors
265	*/
266	for (i = 0 ; i < sc->rxBdCount ; i++)
267	(sc->rxBdBase + i)->status = 0;
268
269	/*
270	* Set up transmit buffer descriptors
271	*/
272	for (i = 0 ; i < sc->txBdCount ; i++) {
273	sc->txBdBase[i].status = 0;
274	sc->txMbuf[i] = NULL;
275	}
276	sc->txBdHead = sc->txBdTail = 0;
277	sc->txBdActiveCount = 0;
278
279	/*
280	* Set up interrupts
281	*/
282	status = rtems_interrupt_catch( mcf5282_fec_tx_interrupt_handler, FEC_INTC0_TX_VECTOR, &old_handler );
283	if (status != RTEMS_SUCCESSFUL)
284	rtems_panic ("Can't attach MCF5282 FEC TX interrupt handler: %s\n",
285	rtems_status_text(status));
286	status = rtems_interrupt_catch(mcf5282_fec_rx_interrupt_handler, FEC_INTC0_RX_VECTOR, &old_handler);
287	if (status != RTEMS_SUCCESSFUL)
288	rtems_panic ("Can't attach MCF5282 FEC RX interrupt handler: %s\n",
289	rtems_status_text(status));
290	MCF5282_INTC0_ICR23 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) \|
291	MCF5282_INTC_ICR_IP(FEC_IRQ_TX_PRIORITY);
292	MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT23 \| MCF5282_INTC_IMRL_MASKALL);
293	MCF5282_INTC0_ICR27 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) \|
294	MCF5282_INTC_ICR_IP(FEC_IRQ_RX_PRIORITY);
295	MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT27 \| MCF5282_INTC_IMRL_MASKALL);
296	}
297
298	/*
299	* Soak up buffer descriptors that have been sent.
300	*/
301	static void
302	fec_retire_tx_bd(volatile struct mcf5282_enet_struct *sc )
303	{
304	struct mbuf m, n;
305
306	while ((sc->txBdActiveCount != 0)
307	&& ((sc->txBdBase[sc->txBdTail].status & MCF5282_FEC_TxBD_R) == 0)) {
308	m = sc->txMbuf[sc->txBdTail];
309	MFREE(m, n);
310	if (++sc->txBdTail == sc->txBdCount)
311	sc->txBdTail = 0;
312	sc->txBdActiveCount--;
313	}
314	}
315
316	static void
317	fec_rxDaemon (void *arg)
318	{
319	volatile struct mcf5282_enet_struct sc = (volatile struct mcf5282_enet_struct )arg;
320	struct ifnet ifp = (struct ifnet )&sc->arpcom.ac_if;
321	struct mbuf *m;
322	volatile rtems_unsigned16 status;
323	volatile mcf5282BufferDescriptor_t *rxBd;
324	int rxBdIndex;
325
326	/*
327	* Allocate space for incoming packets and start reception
328	*/
329	for (rxBdIndex = 0 ; ;) {
330	rxBd = sc->rxBdBase + rxBdIndex;
331	MGETHDR(m, M_WAIT, MT_DATA);
332	MCLGET(m, M_WAIT);
333	m->m_pkthdr.rcvif = ifp;
334	sc->rxMbuf[rxBdIndex] = m;
335	rxBd->buffer = mtod(m, void *);
336	rxBd->status = MCF5282_FEC_RxBD_E;
337	if (++rxBdIndex == sc->rxBdCount) {
338	rxBd->status \|= MCF5282_FEC_RxBD_W;
339	break;
340	}
341	}
342
343	/*
344	* Input packet handling loop
345	*/
346	/* Indicate we have some ready buffers available */
347	MCF5282_FEC_RDAR = MCF5282_FEC_RDAR_R_DES_ACTIVE;
348
349	rxBdIndex = 0;
350	for (;;) {
351	rxBd = sc->rxBdBase + rxBdIndex;
352
353	/*
354	* Wait for packet if there's not one ready
355	*/
356	if ((status = rxBd->status) & MCF5282_FEC_RxBD_E) {
357	/*
358	* Clear old events.
359	*/
360	MCF5282_FEC_EIR = MCF5282_FEC_EIR_RXF;
361
362	/*
363	* Wait for packet to arrive.
364	* Check the buffer descriptor before waiting for the event.
365	* This catches the case when a packet arrives between the
366	* `if' above, and the clearing of the RXF bit in the EIR.
367	*/
368	while ((status = rxBd->status) & MCF5282_FEC_RxBD_E) {
369	rtems_event_set events;
370	int level;
371
372	rtems_interrupt_disable(level);
373	MCF5282_FEC_EIMR \|= MCF5282_FEC_EIMR_RXF;
374	rtems_interrupt_enable(level);
375	rtems_bsdnet_event_receive (RX_INTERRUPT_EVENT,
376	RTEMS_WAIT\|RTEMS_EVENT_ANY,
377	RTEMS_NO_TIMEOUT,
378	&events);
379	}
380	}
381
382	/*
383	* Check that packet is valid
384	*/
385	if (status & MCF5282_FEC_RxBD_L) {
386	/*
387	* Pass the packet up the chain.
388	* FIXME: Packet filtering hook could be done here.
389	*/
390	struct ether_header *eh;
391	int len = rxBd->length - sizeof(rtems_unsigned32);;
392
393	/*
394	* Invalidate the cache and push the packet up.
395	* The cache is so small that it's more efficient to just
396	* invalidate the whole thing unless the packet is very small.
397	*/
398	m = sc->rxMbuf[rxBdIndex];
399	if (len < 128)
400	rtems_cache_invalidate_multiple_data_lines(m->m_data, len);
401	else
402	rtems_cache_invalidate_entire_data();
403	m->m_len = m->m_pkthdr.len = len - sizeof(struct ether_header);
404	eh = mtod(m, struct ether_header *);
405	m->m_data += sizeof(struct ether_header);
406	ether_input(ifp, eh, m);
407
408	/*
409	* Allocate a new mbuf
410	*/
411	MGETHDR(m, M_WAIT, MT_DATA);
412	MCLGET(m, M_WAIT);
413	m->m_pkthdr.rcvif = ifp;
414	sc->rxMbuf[rxBdIndex] = m;
415	rxBd->buffer = mtod(m, void *);
416	}
417
418	/*
419	* Reenable the buffer descriptor
420	*/
421	rxBd->status = (status & MCF5282_FEC_RxBD_W) \| MCF5282_FEC_RxBD_E;
422	MCF5282_FEC_RDAR = MCF5282_FEC_RDAR_R_DES_ACTIVE;
423
424	/*
425	* Move to next buffer descriptor
426	*/
427	if (++rxBdIndex == sc->rxBdCount)
428	rxBdIndex = 0;
429	}
430	}
431
432	static void
433	fec_sendpacket(struct ifnet ifp, struct mbuf m)
434	{
435	struct mcf5282_enet_struct *sc = ifp->if_softc;
436	volatile mcf5282BufferDescriptor_t firstTxBd, txBd;
437	rtems_unsigned16 status;
438	int nAdded;
439
440	/*
441	* Free up buffer descriptors
442	*/
443	fec_retire_tx_bd(sc);
444
445	/*
446	* Set up the transmit buffer descriptors.
447	* No need to pad out short packets since the
448	* hardware takes care of that automatically.
449	* No need to copy the packet to a contiguous buffer
450	* since the hardware is capable of scatter/gather DMA.
451	*/
452	nAdded = 0;
453	firstTxBd = sc->txBdBase + sc->txBdHead;
454
455	for (;;) {
456	/*
457	* Wait for buffer descriptor to become available
458	*/
459	if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
460	/*
461	* Clear old events.
462	*/
463	MCF5282_FEC_EIR = MCF5282_FEC_EIR_TXF;
464
465	/*
466	* Wait for buffer descriptor to become available.
467	* Check for buffer descriptors before waiting for the event.
468	* This catches the case when a buffer became available between
469	* the `if' above, and the clearing of the TXF bit in the EIR.
470	*/
471	fec_retire_tx_bd(sc);
472	while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
473	rtems_event_set events;
474	int level;
475
476	rtems_interrupt_disable(level);
477	MCF5282_FEC_EIMR \|= MCF5282_FEC_EIMR_TXF;
478	rtems_interrupt_enable(level);
479	sc->txRawWait++;
480	rtems_bsdnet_event_receive(TX_INTERRUPT_EVENT,
481	RTEMS_WAIT\|RTEMS_EVENT_ANY,
482	RTEMS_NO_TIMEOUT,
483	&events);
484	fec_retire_tx_bd(sc);
485	}
486	}
487
488	/*
489	* Don't set the READY flag on the first fragment
490	* until the whole packet has been readied.
491	*/
492	status = nAdded ? MCF5282_FEC_TxBD_R : 0;
493
494	/*
495	* The IP fragmentation routine in ip_output
496	* can produce fragments with zero length.
497	*/
498	txBd = sc->txBdBase + sc->txBdHead;
499	if (m->m_len) {
500	char p = mtod(m, char );
501	/*
502	* Stupid FEC can't handle misaligned data!
503	* Given the way that mbuf's are layed out it should be
504	* safe to shuffle the data down like this.....
505	* Perhaps this code could be improved with a "Duff's Device".
506	*/
507	if ((int)p & 0x3) {
508	int l = m->m_len;
509	char *dest = p - ((int)p & 0x3);
510	unsigned16 o = (unsigned16 )dest, i = (unsigned16 )p;
511	while (l > 0) {
512	o++ = i++;
513	l -= sizeof(unsigned16);
514	}
515	p = dest;
516	sc->txRealign++;
517	}
518	txBd->buffer = p;
519	txBd->length = m->m_len;
520	sc->txMbuf[sc->txBdHead] = m;
521	nAdded++;
522	if (++sc->txBdHead == sc->txBdCount) {
523	status \|= MCF5282_FEC_TxBD_W;
524	sc->txBdHead = 0;
525	}
526	m = m->m_next;
527	}
528	else {
529	/*
530	* Just toss empty mbufs
531	*/
532	struct mbuf *n;
533	MFREE(m, n);
534	m = n;
535	}
536	if (m == NULL) {
537	if (nAdded) {
538	txBd->status = status \| MCF5282_FEC_TxBD_R
539	\| MCF5282_FEC_TxBD_L
540	\| MCF5282_FEC_TxBD_TC;
541	if (nAdded > 1)
542	firstTxBd->status \|= MCF5282_FEC_TxBD_R;
543	MCF5282_FEC_TDAR = MCF5282_FEC_TDAR_X_DES_ACTIVE;
544	sc->txBdActiveCount += nAdded;
545	}
546	break;
547	}
548	txBd->status = status;
549	}
550	}
551
552	void
553	fec_txDaemon(void *arg)
554	{
555	struct mcf5282_enet_struct sc = (struct mcf5282_enet_struct )arg;
556	struct ifnet *ifp = &sc->arpcom.ac_if;
557	struct mbuf *m;
558	rtems_event_set events;
559
560	for (;;) {
561	/*
562	* Wait for packet
563	*/
564	rtems_bsdnet_event_receive(START_TRANSMIT_EVENT,
565	RTEMS_EVENT_ANY \| RTEMS_WAIT,
566	RTEMS_NO_TIMEOUT,
567	&events);
568
569	/*
570	* Send packets till queue is empty
571	*/
572	for (;;) {
573	/*
574	* Get the next mbuf chain to transmit.
575	*/
576	IF_DEQUEUE(&ifp->if_snd, m);
577	if (!m)
578	break;
579	fec_sendpacket(ifp, m);
580	}
581	ifp->if_flags &= ~IFF_OACTIVE;
582	}
583	}
584
585
586	/*
587	* Send packet (caller provides header).
588	*/
589	static void
590	mcf5282_enet_start(struct ifnet *ifp)
591	{
592	struct mcf5282_enet_struct *sc = ifp->if_softc;
593
594	rtems_event_send(sc->txDaemonTid, START_TRANSMIT_EVENT);
595	ifp->if_flags \|= IFF_OACTIVE;
596	}
597
598	static void
599	fec_init(void *arg)
600	{
601	struct mcf5282_enet_struct *sc = arg;
602	struct ifnet *ifp = &sc->arpcom.ac_if;
603
604	if (sc->txDaemonTid == 0) {
605	/*
606	* Set up hardware
607	*/
608	mcf5282_fec_initialize_hardware(sc);
609
610	/*
611	* Start driver tasks
612	*/
613	sc->txDaemonTid = rtems_bsdnet_newproc("FECtx", 4096, fec_txDaemon, sc);
614	sc->rxDaemonTid = rtems_bsdnet_newproc("FECrx", 4096, fec_rxDaemon, sc);
615	}
616
617	/*
618	* Set flags appropriately
619	*/
620	if (ifp->if_flags & IFF_PROMISC)
621	MCF5282_FEC_RCR \|= MCF5282_FEC_RCR_PROM;
622	else
623	MCF5282_FEC_RCR &= ~MCF5282_FEC_RCR_PROM;
624
625	/*
626	* Tell the world that we're running.
627	*/
628	ifp->if_flags \|= IFF_RUNNING;
629
630	/*
631	* Enable receiver and transmitter
632	*/
633	MCF5282_FEC_ECR = MCF5282_FEC_ECR_ETHER_EN;
634	}
635
636
637	static void
638	fec_stop(struct mcf5282_enet_struct *sc)
639	{
640	struct ifnet *ifp = &sc->arpcom.ac_if;
641
642	ifp->if_flags &= ~IFF_RUNNING;
643
644	/*
645	* Shut down receiver and transmitter
646	*/
647	MCF5282_FEC_ECR = 0x0;
648	}
649
650	/*
651	* Show interface statistics
652	*/
653	static void
654	enet_stats(struct mcf5282_enet_struct *sc)
655	{
656	printf(" Rx Interrupts:%-10lu", sc->rxInterrupts);
657	printf("Rx Packet Count:%-10lu", MCF5282_FEC_RMON_R_PACKETS);
658	printf(" Rx Broadcast:%-10lu\n", MCF5282_FEC_RMON_R_BC_PKT);
659	printf(" Rx Multicast:%-10lu", MCF5282_FEC_RMON_R_MC_PKT);
660	printf("CRC/Align error:%-10lu", MCF5282_FEC_RMON_R_CRC_ALIGN);
661	printf(" Rx Undersize:%-10lu\n", MCF5282_FEC_RMON_R_UNDERSIZE);
662	printf(" Rx Oversize:%-10lu", MCF5282_FEC_RMON_R_OVERSIZE);
663	printf(" Rx Fragment:%-10lu", MCF5282_FEC_RMON_R_FRAG);
664	printf(" Rx Jabber:%-10lu\n", MCF5282_FEC_RMON_R_JAB);
665	printf(" Rx 64:%-10lu", MCF5282_FEC_RMON_R_P64);
666	printf(" Rx 65-127:%-10lu", MCF5282_FEC_RMON_R_P65T0127);
667	printf(" Rx 128-255:%-10lu\n", MCF5282_FEC_RMON_R_P128TO255);
668	printf(" Rx 256-511:%-10lu", MCF5282_FEC_RMON_R_P256TO511);
669	printf(" Rx 511-1023:%-10lu", MCF5282_FEC_RMON_R_P512TO1023);
670	printf(" Rx 1024-2047:%-10lu\n", MCF5282_FEC_RMON_R_P1024TO2047);
671	printf(" Rx >=2048:%-10lu", MCF5282_FEC_RMON_R_GTE2048);
672	printf(" Rx Octets:%-10lu", MCF5282_FEC_RMON_R_OCTETS);
673	printf(" Rx Dropped:%-10lu\n", MCF5282_FEC_IEEE_R_DROP);
674	printf(" Rx frame OK:%-10lu", MCF5282_FEC_IEEE_R_FRAME_OK);
675	printf(" Rx CRC error:%-10lu", MCF5282_FEC_IEEE_R_CRC);
676	printf(" Rx Align error:%-10lu\n", MCF5282_FEC_IEEE_R_ALIGN);
677	printf(" FIFO Overflow:%-10lu", MCF5282_FEC_IEEE_R_MACERR);
678	printf("Rx Pause Frames:%-10lu", MCF5282_FEC_IEEE_R_FDXFC);
679	printf(" Rx Octets OK:%-10lu\n", MCF5282_FEC_IEEE_R_OCTETS_OK);
680	printf(" Tx Interrupts:%-10lu", sc->txInterrupts);
681	printf("Tx Output Waits:%-10lu", sc->txRawWait);
682	printf("Tx Realignments:%-10lu\n", sc->txRealign);
683	printf(" Tx Unaccounted:%-10lu", MCF5282_FEC_RMON_T_DROP);
684	printf("Tx Packet Count:%-10lu", MCF5282_FEC_RMON_T_PACKETS);
685	printf(" Tx Broadcast:%-10lu\n", MCF5282_FEC_RMON_T_BC_PKT);
686	printf(" Tx Multicast:%-10lu", MCF5282_FEC_RMON_T_MC_PKT);
687	printf("CRC/Align error:%-10lu", MCF5282_FEC_RMON_T_CRC_ALIGN);
688	printf(" Tx Undersize:%-10lu\n", MCF5282_FEC_RMON_T_UNDERSIZE);
689	printf(" Tx Oversize:%-10lu", MCF5282_FEC_RMON_T_OVERSIZE);
690	printf(" Tx Fragment:%-10lu", MCF5282_FEC_RMON_T_FRAG);
691	printf(" Tx Jabber:%-10lu\n", MCF5282_FEC_RMON_T_JAB);
692	printf(" Tx Collisions:%-10lu", MCF5282_FEC_RMON_T_COL);
693	printf(" Tx 64:%-10lu", MCF5282_FEC_RMON_T_P64);
694	printf(" Tx 65-127:%-10lu\n", MCF5282_FEC_RMON_T_P65TO127);
695	printf(" Tx 128-255:%-10lu", MCF5282_FEC_RMON_T_P128TO255);
696	printf(" Tx 256-511:%-10lu", MCF5282_FEC_RMON_T_P256TO511);
697	printf(" Tx 511-1023:%-10lu\n", MCF5282_FEC_RMON_T_P512TO1023);
698	printf(" Tx 1024-2047:%-10lu", MCF5282_FEC_RMON_T_P1024TO2047);
699	printf(" Tx >=2048:%-10lu", MCF5282_FEC_RMON_T_P_GTE2048);
700	printf(" Tx Octets:%-10lu\n", MCF5282_FEC_RMON_T_OCTETS);
701	printf(" Tx Dropped:%-10lu", MCF5282_FEC_IEEE_T_DROP);
702	printf(" Tx Frame OK:%-10lu", MCF5282_FEC_IEEE_T_FRAME_OK);
703	printf(" Tx 1 Collision:%-10lu\n", MCF5282_FEC_IEEE_T_1COL);
704	printf("Tx >1 Collision:%-10lu", MCF5282_FEC_IEEE_T_MCOL);
705	printf(" Tx Deferred:%-10lu", MCF5282_FEC_IEEE_T_DEF);
706	printf(" Late Collision:%-10lu\n", MCF5282_FEC_IEEE_T_LCOL);
707	printf(" Excessive Coll:%-10lu", MCF5282_FEC_IEEE_T_EXCOL);
708	printf(" FIFO Underrun:%-10lu", MCF5282_FEC_IEEE_T_MACERR);
709	printf(" Carrier Error:%-10lu\n", MCF5282_FEC_IEEE_T_CSERR);
710	printf(" Tx SQE Error:%-10lu", MCF5282_FEC_IEEE_T_SQE);
711	printf("Tx Pause Frames:%-10lu", MCF5282_FEC_IEEE_T_FDXFC);
712	printf(" Tx Octets OK:%-10lu\n", MCF5282_FEC_IEEE_T_OCTETS_OK);
713	}
714
715	static int
716	fec_ioctl(struct ifnet *ifp, int command, caddr_t data)
717	{
718	struct mcf5282_enet_struct *sc = ifp->if_softc;
719	int error = 0;
720
721	switch (command) {
722	case SIOCGIFADDR:
723	case SIOCSIFADDR:
724	ether_ioctl(ifp, command, data);
725	break;
726
727	case SIOCSIFFLAGS:
728	switch (ifp->if_flags & (IFF_UP \| IFF_RUNNING)) {
729	case IFF_RUNNING:
730	fec_stop(sc);
731	break;
732
733	case IFF_UP:
734	fec_init(sc);
735	break;
736
737	case IFF_UP \| IFF_RUNNING:
738	fec_stop(sc);
739	fec_init(sc);
740	break;
741
742	default:
743	break;
744	}
745	break;
746
747	case SIO_RTEMS_SHOW_STATS:
748	enet_stats(sc);
749	break;
750
751	/*
752	* FIXME: All sorts of multicast commands need to be added here!
753	*/
754	default:
755	error = EINVAL;
756	break;
757	}
758	return error;
759	}
760
761	int
762	rtems_fec_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching )
763	{
764	struct mcf5282_enet_struct *sc;
765	struct ifnet *ifp;
766	int mtu;
767	int unitNumber;
768	char *unitName;
769	unsigned char *hwaddr;
770
771	/*
772	* Parse driver name
773	*/
774	if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0)
775	return 0;
776
777	/*
778	* Is driver free?
779	*/
780	if ((unitNumber <= 0) \|\| (unitNumber > NIFACES)) {
781	printf("Bad FEC unit number.\n");
782	return 0;
783	}
784	sc = &enet_driver[unitNumber - 1];
785	ifp = &sc->arpcom.ac_if;
786	if (ifp->if_softc != NULL) {
787	printf("Driver already in use.\n");
788	return 0;
789	}
790
791	/*
792	* Process options
793	*/
794	if (config->hardware_address)
795	hwaddr = config->hardware_address;
796	else
797	hwaddr = gethwaddr(unitNumber - 1);
798	printf("%s%d: Ethernet address: %02x:%02x:%02x:%02x:%02x:%02x\n",
799	unitName, unitNumber,
800	hwaddr[0], hwaddr[1], hwaddr[2],
801	hwaddr[3], hwaddr[4], hwaddr[5]);
802	memcpy(sc->arpcom.ac_enaddr, hwaddr, ETHER_ADDR_LEN);
803
804	if (config->mtu)
805	mtu = config->mtu;
806	else
807	mtu = ETHERMTU;
808	if (config->rbuf_count)
809	sc->rxBdCount = config->rbuf_count;
810	else
811	sc->rxBdCount = RX_BUF_COUNT;
812	if (config->xbuf_count)
813	sc->txBdCount = config->xbuf_count;
814	else
815	sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
816
817	sc->acceptBroadcast = !config->ignore_broadcast;
818
819	/*
820	* Set up network interface values
821	*/
822	ifp->if_softc = sc;
823	ifp->if_unit = unitNumber;
824	ifp->if_name = unitName;
825	ifp->if_mtu = mtu;
826	ifp->if_init = fec_init;
827	ifp->if_ioctl = fec_ioctl;
828	ifp->if_start = mcf5282_enet_start;
829	ifp->if_output = ether_output;
830	ifp->if_flags = IFF_BROADCAST \| IFF_SIMPLEX;
831	if (ifp->if_snd.ifq_maxlen == 0)
832	ifp->if_snd.ifq_maxlen = ifqmaxlen;
833
834	/*
835	* Attach the interface
836	*/
837	if_attach(ifp);
838	ether_ifattach(ifp);
839	return 1;
840	};
841

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