[572484f] | 1 | /* |
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| 2 | * RTEMS/TCPIP driver for MCF5282 Fast Ethernet Controller |
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| 3 | * |
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| 4 | * TO DO: MII communications to set speed, full/half duplex, etc. |
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| 5 | * TO DO: Check network stack code -- force longword alignment of all tx mbufs? |
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| 6 | */ |
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| 7 | |
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| 8 | #include <bsp.h> |
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| 9 | #include <stdio.h> |
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| 10 | #include <errno.h> |
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| 11 | #include <stdarg.h> |
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| 12 | #include <string.h> |
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[518edef] | 13 | #include <rtems.h> |
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[572484f] | 14 | #include <rtems/error.h> |
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| 15 | #include <rtems/rtems_bsdnet.h> |
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| 16 | |
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| 17 | #include <sys/param.h> |
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| 18 | #include <sys/mbuf.h> |
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| 19 | #include <sys/socket.h> |
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| 20 | #include <sys/sockio.h> |
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| 21 | |
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| 22 | #include <net/ethernet.h> |
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| 23 | #include <net/if.h> |
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| 24 | |
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| 25 | #include <netinet/in.h> |
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| 26 | #include <netinet/if_ether.h> |
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| 27 | |
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| 28 | |
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| 29 | /* |
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| 30 | * Number of interfaces supported by this driver |
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| 31 | */ |
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| 32 | #define NIFACES 1 |
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| 33 | |
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| 34 | #define FEC_INTC0_TX_VECTOR (64+23) |
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| 35 | #define FEC_INTC0_RX_VECTOR (64+27) |
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| 36 | |
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| 37 | /* |
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| 38 | * Default number of buffer descriptors set aside for this driver. |
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| 39 | * The number of transmit buffer descriptors has to be quite large |
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| 40 | * since a single frame often uses three or more buffer descriptors. |
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| 41 | */ |
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| 42 | #define RX_BUF_COUNT 32 |
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| 43 | #define TX_BUF_COUNT 20 |
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| 44 | #define TX_BD_PER_BUF 3 |
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| 45 | |
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| 46 | #define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255") |
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| 47 | |
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| 48 | /* |
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| 49 | * RTEMS event used by interrupt handler to signal daemons. |
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| 50 | * This must *not* be the same event used by the TCP/IP task synchronization. |
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| 51 | */ |
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| 52 | #define TX_INTERRUPT_EVENT RTEMS_EVENT_1 |
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| 53 | #define RX_INTERRUPT_EVENT RTEMS_EVENT_1 |
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| 54 | |
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| 55 | /* |
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| 56 | * RTEMS event used to start transmit daemon. |
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| 57 | * This must not be the same as INTERRUPT_EVENT. |
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| 58 | */ |
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| 59 | #define START_TRANSMIT_EVENT RTEMS_EVENT_2 |
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| 60 | |
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| 61 | /* |
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| 62 | * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518). |
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| 63 | * Round off to nearest multiple of RBUF_ALIGN. |
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| 64 | */ |
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| 65 | #define MAX_MTU_SIZE 1518 |
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| 66 | #define RBUF_ALIGN 4 |
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| 67 | #define RBUF_SIZE ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN) |
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| 68 | |
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| 69 | #if (MCLBYTES < RBUF_SIZE) |
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| 70 | #error "Driver must have MCLBYTES > RBUF_SIZE" |
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| 71 | #endif |
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| 72 | |
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| 73 | typedef struct mcf5282BufferDescriptor_ { |
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| 74 | volatile rtems_unsigned16 status; |
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| 75 | rtems_unsigned16 length; |
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| 76 | volatile void *buffer; |
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| 77 | } mcf5282BufferDescriptor_t; |
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| 78 | |
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| 79 | /* |
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| 80 | * Per-device data |
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| 81 | */ |
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| 82 | struct mcf5282_enet_struct { |
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| 83 | struct arpcom arpcom; |
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| 84 | struct mbuf **rxMbuf; |
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| 85 | struct mbuf **txMbuf; |
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| 86 | int acceptBroadcast; |
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| 87 | int rxBdCount; |
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| 88 | int txBdCount; |
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| 89 | int txBdHead; |
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| 90 | int txBdTail; |
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| 91 | int txBdActiveCount; |
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| 92 | mcf5282BufferDescriptor_t *rxBdBase; |
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| 93 | mcf5282BufferDescriptor_t *txBdBase; |
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| 94 | rtems_id rxDaemonTid; |
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| 95 | rtems_id txDaemonTid; |
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| 96 | |
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| 97 | /* |
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| 98 | * Statistics |
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| 99 | */ |
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| 100 | unsigned long rxInterrupts; |
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| 101 | unsigned long txInterrupts; |
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| 102 | unsigned long txRawWait; |
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| 103 | unsigned long txRealign; |
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| 104 | }; |
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| 105 | static struct mcf5282_enet_struct enet_driver[NIFACES]; |
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| 106 | |
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| 107 | static rtems_isr |
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| 108 | mcf5282_fec_rx_interrupt_handler( rtems_vector_number v ) |
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| 109 | { |
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| 110 | MCF5282_FEC_EIR = MCF5282_FEC_EIR_RXF; |
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| 111 | MCF5282_FEC_EIMR &= ~MCF5282_FEC_EIMR_RXF; |
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| 112 | enet_driver[0].rxInterrupts++; |
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| 113 | rtems_event_send(enet_driver[0].rxDaemonTid, RX_INTERRUPT_EVENT); |
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| 114 | } |
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| 115 | |
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| 116 | static rtems_isr |
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| 117 | mcf5282_fec_tx_interrupt_handler( rtems_vector_number v ) |
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| 118 | { |
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| 119 | MCF5282_FEC_EIR = MCF5282_FEC_EIR_TXF; |
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| 120 | MCF5282_FEC_EIMR &= ~MCF5282_FEC_EIMR_TXF; |
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| 121 | enet_driver[0].txInterrupts++; |
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| 122 | rtems_event_send(enet_driver[0].txDaemonTid, TX_INTERRUPT_EVENT); |
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| 123 | } |
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| 124 | |
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| 125 | /* |
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[7c7184a] | 126 | * Allocate buffer descriptors from (non-cached) on-chip static RAM |
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[518edef] | 127 | * Ensure 128-bit (16-byte) alignment |
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[572484f] | 128 | */ |
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[518edef] | 129 | static mcf5282BufferDescriptor_t * |
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[572484f] | 130 | mcf5282_bd_allocate(unsigned int count) |
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| 131 | { |
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[7c7184a] | 132 | extern char __SRAMBASE[]; |
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| 133 | static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)__SRAMBASE; |
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| 134 | mcf5282BufferDescriptor_t *p = bdp; |
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[518edef] | 135 | |
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[7c7184a] | 136 | bdp += count; |
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| 137 | if ((int)bdp & 0xF) |
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| 138 | bdp = (mcf5282BufferDescriptor_t *)((char *)bdp + (16 - ((int)bdp & 0xF))); |
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[572484f] | 139 | return p; |
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| 140 | } |
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| 141 | |
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| 142 | static void |
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| 143 | mcf5282_fec_initialize_hardware(struct mcf5282_enet_struct *sc) |
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| 144 | { |
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| 145 | int i; |
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| 146 | unsigned char *hwaddr; |
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| 147 | rtems_status_code status; |
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| 148 | rtems_isr_entry old_handler; |
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| 149 | unsigned32 clock_speed = get_CPU_clock_speed(); |
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| 150 | |
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| 151 | /* extern struct rtems_bsdnet_ifconfig netdriver_config; */ |
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| 152 | |
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| 153 | |
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| 154 | /* |
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| 155 | * Issue reset to FEC |
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| 156 | */ |
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| 157 | MCF5282_FEC_ECR = MCF5282_FEC_ECR_RESET; |
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[518edef] | 158 | rtems_task_wake_after(1); |
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[572484f] | 159 | /* |
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| 160 | * Configuration of I/O ports is done outside of this function |
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| 161 | */ |
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| 162 | #if 0 |
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| 163 | imm->gpio.pbcnt |= MCF5282_GPIO_PBCNT_SET_FEC; /* Set up port b FEC pins */ |
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| 164 | #endif |
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| 165 | |
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| 166 | /* |
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| 167 | * Set our physical address |
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| 168 | */ |
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| 169 | hwaddr = sc->arpcom.ac_enaddr; |
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| 170 | MCF5282_FEC_PALR = (hwaddr[0] << 24) | (hwaddr[1] << 16) | |
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| 171 | (hwaddr[2] << 8) | (hwaddr[3] << 0); |
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| 172 | MCF5282_FEC_PAUR = (hwaddr[4] << 24) | (hwaddr[5] << 16); |
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| 173 | |
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| 174 | |
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| 175 | /* |
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| 176 | * Clear the hash table |
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| 177 | */ |
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| 178 | MCF5282_FEC_GAUR = 0; |
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| 179 | MCF5282_FEC_GALR = 0; |
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| 180 | |
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| 181 | /* |
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| 182 | * Set up receive buffer size |
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| 183 | */ |
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| 184 | MCF5282_FEC_EMRBR = 1520; /* Standard Ethernet */ |
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| 185 | |
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| 186 | /* |
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| 187 | * Allocate mbuf pointers |
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| 188 | */ |
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| 189 | sc->rxMbuf = malloc(sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); |
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| 190 | sc->txMbuf = malloc(sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); |
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| 191 | if (!sc->rxMbuf || !sc->txMbuf) |
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| 192 | rtems_panic("No memory for mbuf pointers"); |
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| 193 | |
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| 194 | /* |
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| 195 | * Set receiver and transmitter buffer descriptor bases |
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| 196 | */ |
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| 197 | sc->rxBdBase = mcf5282_bd_allocate(sc->rxBdCount); |
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| 198 | sc->txBdBase = mcf5282_bd_allocate(sc->txBdCount); |
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| 199 | MCF5282_FEC_ERDSR = (int)sc->rxBdBase; |
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| 200 | MCF5282_FEC_ETDSR = (int)sc->txBdBase; |
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| 201 | |
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| 202 | /* |
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| 203 | * Set up Receive Control Register: |
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| 204 | * Not promiscuous |
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| 205 | * MII mode |
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| 206 | * Half duplex |
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| 207 | * No loopback |
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| 208 | */ |
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| 209 | MCF5282_FEC_RCR = MCF5282_FEC_RCR_MAX_FL(MAX_MTU_SIZE) | |
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| 210 | MCF5282_FEC_RCR_MII_MODE | |
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| 211 | MCF5282_FEC_RCR_DRT; |
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| 212 | |
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| 213 | /* |
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| 214 | * Set up Transmit Control Register: |
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| 215 | * Half duplex |
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| 216 | * No heartbeat |
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| 217 | */ |
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| 218 | MCF5282_FEC_TCR = 0; |
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| 219 | |
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| 220 | /* |
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| 221 | * Initialize statistic counters |
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| 222 | */ |
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| 223 | MCF5282_FEC_MIBC = MCF5282_FEC_MIBC_MIB_DISABLE; |
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| 224 | { |
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| 225 | vuint32 *vuip = &MCF5282_FEC_RMON_T_DROP; |
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| 226 | while (vuip <= &MCF5282_FEC_IEEE_R_OCTETS_OK) |
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| 227 | *vuip++ = 0; |
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| 228 | } |
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| 229 | MCF5282_FEC_MIBC = 0; |
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| 230 | |
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| 231 | /* |
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| 232 | * Set MII speed to <2.5 MHz |
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| 233 | */ |
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| 234 | if (clock_speed <= 25000000) |
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| 235 | MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0x5); |
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| 236 | else if (clock_speed <= 33000000) |
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| 237 | MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0x7); |
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| 238 | else if (clock_speed <= 40000000) |
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| 239 | MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0x8); |
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| 240 | else if (clock_speed <= 50000000) |
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| 241 | MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0xA); |
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| 242 | else if (clock_speed <= 66000000) |
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| 243 | MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0xD); |
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| 244 | else |
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| 245 | MCF5282_FEC_MSCR = MCF5282_FEC_MSCR_MII_SPEED(0xF); |
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| 246 | |
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| 247 | /* |
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| 248 | * Set up receive buffer descriptors |
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| 249 | */ |
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| 250 | for (i = 0 ; i < sc->rxBdCount ; i++) |
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| 251 | (sc->rxBdBase + i)->status = 0; |
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| 252 | |
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| 253 | /* |
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| 254 | * Set up transmit buffer descriptors |
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| 255 | */ |
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| 256 | for (i = 0 ; i < sc->txBdCount ; i++) { |
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| 257 | sc->txBdBase[i].status = 0; |
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| 258 | sc->txMbuf[i] = NULL; |
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| 259 | } |
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| 260 | sc->txBdHead = sc->txBdTail = 0; |
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| 261 | sc->txBdActiveCount = 0; |
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| 262 | |
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| 263 | /* |
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| 264 | * Set up interrupts |
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| 265 | */ |
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| 266 | status = rtems_interrupt_catch( mcf5282_fec_tx_interrupt_handler, FEC_INTC0_TX_VECTOR, &old_handler ); |
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| 267 | if (status != RTEMS_SUCCESSFUL) |
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| 268 | rtems_panic ("Can't attach MCF5282 FEC TX interrupt handler: %s\n", |
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| 269 | rtems_status_text(status)); |
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| 270 | status = rtems_interrupt_catch(mcf5282_fec_rx_interrupt_handler, FEC_INTC0_RX_VECTOR, &old_handler); |
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| 271 | if (status != RTEMS_SUCCESSFUL) |
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| 272 | rtems_panic ("Can't attach MCF5282 FEC RX interrupt handler: %s\n", |
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| 273 | rtems_status_text(status)); |
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| 274 | MCF5282_INTC0_ICR23 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) | |
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| 275 | MCF5282_INTC_ICR_IP(FEC_IRQ_TX_PRIORITY); |
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| 276 | MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT23 | MCF5282_INTC_IMRL_MASKALL); |
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| 277 | MCF5282_INTC0_ICR27 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) | |
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| 278 | MCF5282_INTC_ICR_IP(FEC_IRQ_RX_PRIORITY); |
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| 279 | MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT27 | MCF5282_INTC_IMRL_MASKALL); |
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| 280 | } |
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| 281 | |
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| 282 | /* |
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| 283 | * Soak up buffer descriptors that have been sent. |
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| 284 | */ |
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| 285 | static void |
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| 286 | fec_retire_tx_bd(volatile struct mcf5282_enet_struct *sc ) |
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| 287 | { |
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| 288 | struct mbuf *m, *n; |
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| 289 | |
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[7c7184a] | 290 | while ((sc->txBdActiveCount != 0) |
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| 291 | && ((sc->txBdBase[sc->txBdTail].status & MCF5282_FEC_TxBD_R) == 0)) { |
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[572484f] | 292 | m = sc->txMbuf[sc->txBdTail]; |
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| 293 | MFREE(m, n); |
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| 294 | if (++sc->txBdTail == sc->txBdCount) |
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| 295 | sc->txBdTail = 0; |
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| 296 | sc->txBdActiveCount--; |
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| 297 | } |
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| 298 | } |
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| 299 | |
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| 300 | static void |
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| 301 | fec_rxDaemon (void *arg) |
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| 302 | { |
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| 303 | volatile struct mcf5282_enet_struct *sc = (volatile struct mcf5282_enet_struct *)arg; |
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| 304 | struct ifnet *ifp = (struct ifnet* )&sc->arpcom.ac_if; |
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| 305 | struct mbuf *m; |
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| 306 | volatile rtems_unsigned16 status; |
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| 307 | volatile mcf5282BufferDescriptor_t *rxBd; |
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| 308 | int rxBdIndex; |
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| 309 | |
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| 310 | /* |
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| 311 | * Allocate space for incoming packets and start reception |
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| 312 | */ |
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| 313 | for (rxBdIndex = 0 ; ;) { |
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| 314 | rxBd = sc->rxBdBase + rxBdIndex; |
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| 315 | MGETHDR(m, M_WAIT, MT_DATA); |
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| 316 | MCLGET(m, M_WAIT); |
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| 317 | m->m_pkthdr.rcvif = ifp; |
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| 318 | sc->rxMbuf[rxBdIndex] = m; |
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| 319 | rxBd->buffer = mtod(m, void *); |
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| 320 | rxBd->status = MCF5282_FEC_RxBD_E; |
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| 321 | if (++rxBdIndex == sc->rxBdCount) { |
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| 322 | rxBd->status |= MCF5282_FEC_RxBD_W; |
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| 323 | break; |
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| 324 | } |
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| 325 | } |
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| 326 | |
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| 327 | /* |
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| 328 | * Input packet handling loop |
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| 329 | */ |
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| 330 | /* Indicate we have some ready buffers available */ |
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| 331 | MCF5282_FEC_RDAR = MCF5282_FEC_RDAR_R_DES_ACTIVE; |
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| 332 | |
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| 333 | rxBdIndex = 0; |
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| 334 | for (;;) { |
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| 335 | rxBd = sc->rxBdBase + rxBdIndex; |
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| 336 | |
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| 337 | /* |
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| 338 | * Wait for packet if there's not one ready |
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| 339 | */ |
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| 340 | if ((status = rxBd->status) & MCF5282_FEC_RxBD_E) { |
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| 341 | /* |
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| 342 | * Clear old events. |
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| 343 | */ |
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| 344 | MCF5282_FEC_EIR = MCF5282_FEC_EIR_RXF; |
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| 345 | |
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| 346 | /* |
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| 347 | * Wait for packet to arrive. |
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| 348 | * Check the buffer descriptor before waiting for the event. |
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| 349 | * This catches the case when a packet arrives between the |
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| 350 | * `if' above, and the clearing of the RXF bit in the EIR. |
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| 351 | */ |
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[7c7184a] | 352 | while ((status = rxBd->status) & MCF5282_FEC_RxBD_E) { |
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[572484f] | 353 | rtems_event_set events; |
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| 354 | int level; |
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| 355 | |
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| 356 | rtems_interrupt_disable(level); |
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| 357 | MCF5282_FEC_EIMR |= MCF5282_FEC_EIMR_RXF; |
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| 358 | rtems_interrupt_enable(level); |
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| 359 | rtems_bsdnet_event_receive (RX_INTERRUPT_EVENT, |
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| 360 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
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| 361 | RTEMS_NO_TIMEOUT, |
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| 362 | &events); |
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| 363 | } |
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| 364 | } |
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| 365 | |
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| 366 | /* |
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| 367 | * Check that packet is valid |
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| 368 | */ |
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| 369 | if (status & MCF5282_FEC_RxBD_L) { |
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| 370 | /* |
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| 371 | * Pass the packet up the chain. |
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| 372 | * FIXME: Packet filtering hook could be done here. |
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| 373 | */ |
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| 374 | struct ether_header *eh; |
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[518edef] | 375 | int len = rxBd->length - sizeof(rtems_unsigned32);; |
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[572484f] | 376 | |
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| 377 | /* |
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[7c7184a] | 378 | * Invalidate the cache and push the packet up. |
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[518edef] | 379 | * The cache is so small that it's more efficient to just |
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| 380 | * invalidate the whole thing unless the packet is very small. |
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[572484f] | 381 | */ |
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| 382 | m = sc->rxMbuf[rxBdIndex]; |
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[518edef] | 383 | if (len < 128) |
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| 384 | rtems_cache_invalidate_multiple_data_lines(m->m_data, len); |
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| 385 | else |
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| 386 | rtems_cache_invalidate_entire_data(); |
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| 387 | m->m_len = m->m_pkthdr.len = len - sizeof(struct ether_header); |
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[572484f] | 388 | eh = mtod(m, struct ether_header *); |
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| 389 | m->m_data += sizeof(struct ether_header); |
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| 390 | ether_input(ifp, eh, m); |
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| 391 | |
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| 392 | /* |
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| 393 | * Allocate a new mbuf |
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| 394 | */ |
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| 395 | MGETHDR(m, M_WAIT, MT_DATA); |
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| 396 | MCLGET(m, M_WAIT); |
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| 397 | m->m_pkthdr.rcvif = ifp; |
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| 398 | sc->rxMbuf[rxBdIndex] = m; |
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| 399 | rxBd->buffer = mtod(m, void *); |
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| 400 | } |
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| 401 | |
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| 402 | /* |
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| 403 | * Reenable the buffer descriptor |
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| 404 | */ |
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| 405 | rxBd->status = (status & MCF5282_FEC_RxBD_W) | MCF5282_FEC_RxBD_E; |
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| 406 | MCF5282_FEC_RDAR = MCF5282_FEC_RDAR_R_DES_ACTIVE; |
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| 407 | |
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| 408 | /* |
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| 409 | * Move to next buffer descriptor |
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| 410 | */ |
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| 411 | if (++rxBdIndex == sc->rxBdCount) |
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| 412 | rxBdIndex = 0; |
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| 413 | } |
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| 414 | } |
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| 415 | |
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| 416 | static void |
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| 417 | fec_sendpacket(struct ifnet *ifp, struct mbuf *m) |
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| 418 | { |
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| 419 | struct mcf5282_enet_struct *sc = ifp->if_softc; |
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| 420 | volatile mcf5282BufferDescriptor_t *firstTxBd, *txBd; |
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| 421 | rtems_unsigned16 status; |
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| 422 | int nAdded; |
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| 423 | |
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| 424 | /* |
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| 425 | * Free up buffer descriptors |
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| 426 | */ |
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| 427 | fec_retire_tx_bd(sc); |
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| 428 | |
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| 429 | /* |
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| 430 | * Set up the transmit buffer descriptors. |
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| 431 | * No need to pad out short packets since the |
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| 432 | * hardware takes care of that automatically. |
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| 433 | * No need to copy the packet to a contiguous buffer |
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| 434 | * since the hardware is capable of scatter/gather DMA. |
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| 435 | */ |
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| 436 | nAdded = 0; |
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| 437 | firstTxBd = sc->txBdBase + sc->txBdHead; |
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| 438 | |
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| 439 | for (;;) { |
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| 440 | /* |
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| 441 | * Wait for buffer descriptor to become available |
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| 442 | */ |
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| 443 | if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { |
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| 444 | /* |
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| 445 | * Clear old events. |
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| 446 | */ |
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| 447 | MCF5282_FEC_EIR = MCF5282_FEC_EIR_TXF; |
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| 448 | |
---|
| 449 | /* |
---|
| 450 | * Wait for buffer descriptor to become available. |
---|
| 451 | * Check for buffer descriptors before waiting for the event. |
---|
| 452 | * This catches the case when a buffer became available between |
---|
| 453 | * the `if' above, and the clearing of the TXF bit in the EIR. |
---|
| 454 | */ |
---|
| 455 | fec_retire_tx_bd(sc); |
---|
| 456 | while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { |
---|
| 457 | rtems_event_set events; |
---|
| 458 | int level; |
---|
| 459 | |
---|
| 460 | rtems_interrupt_disable(level); |
---|
| 461 | MCF5282_FEC_EIMR |= MCF5282_FEC_EIMR_TXF; |
---|
| 462 | rtems_interrupt_enable(level); |
---|
| 463 | sc->txRawWait++; |
---|
| 464 | rtems_bsdnet_event_receive(TX_INTERRUPT_EVENT, |
---|
| 465 | RTEMS_WAIT|RTEMS_EVENT_ANY, |
---|
| 466 | RTEMS_NO_TIMEOUT, |
---|
| 467 | &events); |
---|
| 468 | fec_retire_tx_bd(sc); |
---|
| 469 | } |
---|
| 470 | } |
---|
| 471 | |
---|
| 472 | /* |
---|
| 473 | * Don't set the READY flag on the first fragment |
---|
| 474 | * until the whole packet has been readied. |
---|
| 475 | */ |
---|
| 476 | status = nAdded ? MCF5282_FEC_TxBD_R : 0; |
---|
| 477 | |
---|
| 478 | /* |
---|
| 479 | * The IP fragmentation routine in ip_output |
---|
| 480 | * can produce fragments with zero length. |
---|
| 481 | */ |
---|
| 482 | txBd = sc->txBdBase + sc->txBdHead; |
---|
| 483 | if (m->m_len) { |
---|
| 484 | char *p = mtod(m, char *); |
---|
| 485 | /* |
---|
| 486 | * Stupid FEC can't handle misaligned data! |
---|
| 487 | * Given the way that mbuf's are layed out it should be |
---|
| 488 | * safe to shuffle the data down like this..... |
---|
| 489 | * Perhaps this code could be improved with a "Duff's Device". |
---|
| 490 | */ |
---|
| 491 | if ((int)p & 0x3) { |
---|
| 492 | int l = m->m_len; |
---|
| 493 | char *dest = p - ((int)p & 0x3); |
---|
| 494 | unsigned16 *o = (unsigned16 *)dest, *i = (unsigned16 *)p; |
---|
| 495 | while (l > 0) { |
---|
| 496 | *o++ = *i++; |
---|
| 497 | l -= sizeof(unsigned16); |
---|
| 498 | } |
---|
| 499 | p = dest; |
---|
| 500 | sc->txRealign++; |
---|
| 501 | } |
---|
| 502 | txBd->buffer = p; |
---|
| 503 | txBd->length = m->m_len; |
---|
| 504 | sc->txMbuf[sc->txBdHead] = m; |
---|
| 505 | nAdded++; |
---|
| 506 | if (++sc->txBdHead == sc->txBdCount) { |
---|
| 507 | status |= MCF5282_FEC_TxBD_W; |
---|
| 508 | sc->txBdHead = 0; |
---|
| 509 | } |
---|
| 510 | m = m->m_next; |
---|
| 511 | } |
---|
| 512 | else { |
---|
| 513 | /* |
---|
| 514 | * Just toss empty mbufs |
---|
| 515 | */ |
---|
| 516 | struct mbuf *n; |
---|
| 517 | MFREE(m, n); |
---|
| 518 | m = n; |
---|
| 519 | } |
---|
| 520 | if (m == NULL) { |
---|
| 521 | if (nAdded) { |
---|
| 522 | txBd->status = status | MCF5282_FEC_TxBD_R |
---|
| 523 | | MCF5282_FEC_TxBD_L |
---|
| 524 | | MCF5282_FEC_TxBD_TC; |
---|
| 525 | if (nAdded > 1) |
---|
| 526 | firstTxBd->status |= MCF5282_FEC_TxBD_R; |
---|
| 527 | MCF5282_FEC_TDAR = MCF5282_FEC_TDAR_X_DES_ACTIVE; |
---|
| 528 | sc->txBdActiveCount += nAdded; |
---|
| 529 | } |
---|
| 530 | break; |
---|
| 531 | } |
---|
| 532 | txBd->status = status; |
---|
| 533 | } |
---|
| 534 | } |
---|
| 535 | |
---|
| 536 | void |
---|
| 537 | fec_txDaemon(void *arg) |
---|
| 538 | { |
---|
| 539 | struct mcf5282_enet_struct *sc = (struct mcf5282_enet_struct *)arg; |
---|
| 540 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
| 541 | struct mbuf *m; |
---|
| 542 | rtems_event_set events; |
---|
| 543 | |
---|
| 544 | for (;;) { |
---|
| 545 | /* |
---|
| 546 | * Wait for packet |
---|
| 547 | */ |
---|
| 548 | rtems_bsdnet_event_receive(START_TRANSMIT_EVENT, |
---|
| 549 | RTEMS_EVENT_ANY | RTEMS_WAIT, |
---|
| 550 | RTEMS_NO_TIMEOUT, |
---|
| 551 | &events); |
---|
| 552 | |
---|
| 553 | /* |
---|
| 554 | * Send packets till queue is empty |
---|
| 555 | */ |
---|
| 556 | for (;;) { |
---|
| 557 | /* |
---|
| 558 | * Get the next mbuf chain to transmit. |
---|
| 559 | */ |
---|
| 560 | IF_DEQUEUE(&ifp->if_snd, m); |
---|
| 561 | if (!m) |
---|
| 562 | break; |
---|
| 563 | fec_sendpacket(ifp, m); |
---|
| 564 | } |
---|
| 565 | ifp->if_flags &= ~IFF_OACTIVE; |
---|
| 566 | } |
---|
| 567 | } |
---|
| 568 | |
---|
| 569 | |
---|
| 570 | /* |
---|
| 571 | * Send packet (caller provides header). |
---|
| 572 | */ |
---|
| 573 | static void |
---|
| 574 | mcf5282_enet_start(struct ifnet *ifp) |
---|
| 575 | { |
---|
| 576 | struct mcf5282_enet_struct *sc = ifp->if_softc; |
---|
| 577 | |
---|
| 578 | rtems_event_send(sc->txDaemonTid, START_TRANSMIT_EVENT); |
---|
| 579 | ifp->if_flags |= IFF_OACTIVE; |
---|
| 580 | } |
---|
| 581 | |
---|
| 582 | static void |
---|
| 583 | fec_init(void *arg) |
---|
| 584 | { |
---|
| 585 | struct mcf5282_enet_struct *sc = arg; |
---|
| 586 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
| 587 | |
---|
| 588 | if (sc->txDaemonTid == 0) { |
---|
| 589 | /* |
---|
| 590 | * Set up hardware |
---|
| 591 | */ |
---|
| 592 | mcf5282_fec_initialize_hardware(sc); |
---|
| 593 | |
---|
| 594 | /* |
---|
| 595 | * Start driver tasks |
---|
| 596 | */ |
---|
| 597 | sc->txDaemonTid = rtems_bsdnet_newproc("FECtx", 4096, fec_txDaemon, sc); |
---|
| 598 | sc->rxDaemonTid = rtems_bsdnet_newproc("FECrx", 4096, fec_rxDaemon, sc); |
---|
| 599 | } |
---|
| 600 | |
---|
| 601 | /* |
---|
| 602 | * Set flags appropriately |
---|
| 603 | */ |
---|
| 604 | if (ifp->if_flags & IFF_PROMISC) |
---|
| 605 | MCF5282_FEC_RCR |= MCF5282_FEC_RCR_PROM; |
---|
| 606 | else |
---|
| 607 | MCF5282_FEC_RCR &= ~MCF5282_FEC_RCR_PROM; |
---|
| 608 | |
---|
| 609 | /* |
---|
| 610 | * Tell the world that we're running. |
---|
| 611 | */ |
---|
| 612 | ifp->if_flags |= IFF_RUNNING; |
---|
| 613 | |
---|
| 614 | /* |
---|
| 615 | * Enable receiver and transmitter |
---|
| 616 | */ |
---|
| 617 | MCF5282_FEC_ECR = MCF5282_FEC_ECR_ETHER_EN; |
---|
| 618 | } |
---|
| 619 | |
---|
| 620 | |
---|
| 621 | static void |
---|
| 622 | fec_stop(struct mcf5282_enet_struct *sc) |
---|
| 623 | { |
---|
| 624 | struct ifnet *ifp = &sc->arpcom.ac_if; |
---|
| 625 | |
---|
| 626 | ifp->if_flags &= ~IFF_RUNNING; |
---|
| 627 | |
---|
| 628 | /* |
---|
| 629 | * Shut down receiver and transmitter |
---|
| 630 | */ |
---|
| 631 | MCF5282_FEC_ECR = 0x0; |
---|
| 632 | } |
---|
| 633 | |
---|
| 634 | /* |
---|
| 635 | * Show interface statistics |
---|
| 636 | */ |
---|
| 637 | static void |
---|
| 638 | enet_stats(struct mcf5282_enet_struct *sc) |
---|
| 639 | { |
---|
| 640 | printf(" Rx Interrupts:%-10lu", sc->rxInterrupts); |
---|
| 641 | printf("Rx Packet Count:%-10lu", MCF5282_FEC_RMON_R_PACKETS); |
---|
| 642 | printf(" Rx Broadcast:%-10lu\n", MCF5282_FEC_RMON_R_BC_PKT); |
---|
| 643 | printf(" Rx Multicast:%-10lu", MCF5282_FEC_RMON_R_MC_PKT); |
---|
| 644 | printf("CRC/Align error:%-10lu", MCF5282_FEC_RMON_R_CRC_ALIGN); |
---|
| 645 | printf(" Rx Undersize:%-10lu\n", MCF5282_FEC_RMON_R_UNDERSIZE); |
---|
| 646 | printf(" Rx Oversize:%-10lu", MCF5282_FEC_RMON_R_OVERSIZE); |
---|
| 647 | printf(" Rx Fragment:%-10lu", MCF5282_FEC_RMON_R_FRAG); |
---|
| 648 | printf(" Rx Jabber:%-10lu\n", MCF5282_FEC_RMON_R_JAB); |
---|
| 649 | printf(" Rx 64:%-10lu", MCF5282_FEC_RMON_R_P64); |
---|
| 650 | printf(" Rx 65-127:%-10lu", MCF5282_FEC_RMON_R_P65T0127); |
---|
| 651 | printf(" Rx 128-255:%-10lu\n", MCF5282_FEC_RMON_R_P128TO255); |
---|
| 652 | printf(" Rx 256-511:%-10lu", MCF5282_FEC_RMON_R_P256TO511); |
---|
| 653 | printf(" Rx 511-1023:%-10lu", MCF5282_FEC_RMON_R_P512TO1023); |
---|
| 654 | printf(" Rx 1024-2047:%-10lu\n", MCF5282_FEC_RMON_R_P1024TO2047); |
---|
| 655 | printf(" Rx >=2048:%-10lu", MCF5282_FEC_RMON_R_GTE2048); |
---|
| 656 | printf(" Rx Octets:%-10lu", MCF5282_FEC_RMON_R_OCTETS); |
---|
| 657 | printf(" Rx Dropped:%-10lu\n", MCF5282_FEC_IEEE_R_DROP); |
---|
| 658 | printf(" Rx frame OK:%-10lu", MCF5282_FEC_IEEE_R_FRAME_OK); |
---|
| 659 | printf(" Rx CRC error:%-10lu", MCF5282_FEC_IEEE_R_CRC); |
---|
| 660 | printf(" Rx Align error:%-10lu\n", MCF5282_FEC_IEEE_R_ALIGN); |
---|
| 661 | printf(" FIFO Overflow:%-10lu", MCF5282_FEC_IEEE_R_MACERR); |
---|
| 662 | printf("Rx Pause Frames:%-10lu", MCF5282_FEC_IEEE_R_FDXFC); |
---|
| 663 | printf(" Rx Octets OK:%-10lu\n", MCF5282_FEC_IEEE_R_OCTETS_OK); |
---|
| 664 | printf(" Tx Interrupts:%-10lu", sc->txInterrupts); |
---|
| 665 | printf("Tx Output Waits:%-10lu", sc->txRawWait); |
---|
| 666 | printf("Tx Realignments:%-10lu\n", sc->txRealign); |
---|
| 667 | printf(" Tx Unaccounted:%-10lu", MCF5282_FEC_RMON_T_DROP); |
---|
| 668 | printf("Tx Packet Count:%-10lu", MCF5282_FEC_RMON_T_PACKETS); |
---|
| 669 | printf(" Tx Broadcast:%-10lu\n", MCF5282_FEC_RMON_T_BC_PKT); |
---|
| 670 | printf(" Tx Multicast:%-10lu", MCF5282_FEC_RMON_T_MC_PKT); |
---|
| 671 | printf("CRC/Align error:%-10lu", MCF5282_FEC_RMON_T_CRC_ALIGN); |
---|
| 672 | printf(" Tx Undersize:%-10lu\n", MCF5282_FEC_RMON_T_UNDERSIZE); |
---|
| 673 | printf(" Tx Oversize:%-10lu", MCF5282_FEC_RMON_T_OVERSIZE); |
---|
| 674 | printf(" Tx Fragment:%-10lu", MCF5282_FEC_RMON_T_FRAG); |
---|
| 675 | printf(" Tx Jabber:%-10lu\n", MCF5282_FEC_RMON_T_JAB); |
---|
| 676 | printf(" Tx Collisions:%-10lu", MCF5282_FEC_RMON_T_COL); |
---|
| 677 | printf(" Tx 64:%-10lu", MCF5282_FEC_RMON_T_P64); |
---|
| 678 | printf(" Tx 65-127:%-10lu\n", MCF5282_FEC_RMON_T_P65TO127); |
---|
| 679 | printf(" Tx 128-255:%-10lu", MCF5282_FEC_RMON_T_P128TO255); |
---|
| 680 | printf(" Tx 256-511:%-10lu", MCF5282_FEC_RMON_T_P256TO511); |
---|
| 681 | printf(" Tx 511-1023:%-10lu\n", MCF5282_FEC_RMON_T_P512TO1023); |
---|
| 682 | printf(" Tx 1024-2047:%-10lu", MCF5282_FEC_RMON_T_P1024TO2047); |
---|
| 683 | printf(" Tx >=2048:%-10lu", MCF5282_FEC_RMON_T_P_GTE2048); |
---|
| 684 | printf(" Tx Octets:%-10lu\n", MCF5282_FEC_RMON_T_OCTETS); |
---|
| 685 | printf(" Tx Dropped:%-10lu", MCF5282_FEC_IEEE_T_DROP); |
---|
| 686 | printf(" Tx Frame OK:%-10lu", MCF5282_FEC_IEEE_T_FRAME_OK); |
---|
| 687 | printf(" Tx 1 Collision:%-10lu\n", MCF5282_FEC_IEEE_T_1COL); |
---|
| 688 | printf("Tx >1 Collision:%-10lu", MCF5282_FEC_IEEE_T_MCOL); |
---|
| 689 | printf(" Tx Deferred:%-10lu", MCF5282_FEC_IEEE_T_DEF); |
---|
| 690 | printf(" Late Collision:%-10lu\n", MCF5282_FEC_IEEE_T_LCOL); |
---|
| 691 | printf(" Excessive Coll:%-10lu", MCF5282_FEC_IEEE_T_EXCOL); |
---|
| 692 | printf(" FIFO Underrun:%-10lu", MCF5282_FEC_IEEE_T_MACERR); |
---|
| 693 | printf(" Carrier Error:%-10lu\n", MCF5282_FEC_IEEE_T_CSERR); |
---|
| 694 | printf(" Tx SQE Error:%-10lu", MCF5282_FEC_IEEE_T_SQE); |
---|
| 695 | printf("Tx Pause Frames:%-10lu", MCF5282_FEC_IEEE_T_FDXFC); |
---|
| 696 | printf(" Tx Octets OK:%-10lu\n", MCF5282_FEC_IEEE_T_OCTETS_OK); |
---|
| 697 | } |
---|
| 698 | |
---|
| 699 | static int |
---|
| 700 | fec_ioctl(struct ifnet *ifp, int command, caddr_t data) |
---|
| 701 | { |
---|
| 702 | struct mcf5282_enet_struct *sc = ifp->if_softc; |
---|
| 703 | int error = 0; |
---|
| 704 | |
---|
| 705 | switch (command) { |
---|
| 706 | case SIOCGIFADDR: |
---|
| 707 | case SIOCSIFADDR: |
---|
| 708 | ether_ioctl(ifp, command, data); |
---|
| 709 | break; |
---|
| 710 | |
---|
| 711 | case SIOCSIFFLAGS: |
---|
| 712 | switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { |
---|
| 713 | case IFF_RUNNING: |
---|
| 714 | fec_stop(sc); |
---|
| 715 | break; |
---|
| 716 | |
---|
| 717 | case IFF_UP: |
---|
| 718 | fec_init(sc); |
---|
| 719 | break; |
---|
| 720 | |
---|
| 721 | case IFF_UP | IFF_RUNNING: |
---|
| 722 | fec_stop(sc); |
---|
| 723 | fec_init(sc); |
---|
| 724 | break; |
---|
| 725 | |
---|
| 726 | default: |
---|
| 727 | break; |
---|
| 728 | } |
---|
| 729 | break; |
---|
| 730 | |
---|
| 731 | case SIO_RTEMS_SHOW_STATS: |
---|
| 732 | enet_stats(sc); |
---|
| 733 | break; |
---|
| 734 | |
---|
| 735 | /* |
---|
| 736 | * FIXME: All sorts of multicast commands need to be added here! |
---|
| 737 | */ |
---|
| 738 | default: |
---|
| 739 | error = EINVAL; |
---|
| 740 | break; |
---|
| 741 | } |
---|
| 742 | return error; |
---|
| 743 | } |
---|
| 744 | |
---|
| 745 | int |
---|
| 746 | rtems_fec_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching ) |
---|
| 747 | { |
---|
| 748 | struct mcf5282_enet_struct *sc; |
---|
| 749 | struct ifnet *ifp; |
---|
| 750 | int mtu; |
---|
| 751 | int unitNumber; |
---|
| 752 | char *unitName; |
---|
| 753 | unsigned char *hwaddr; |
---|
| 754 | |
---|
| 755 | /* |
---|
| 756 | * Parse driver name |
---|
| 757 | */ |
---|
| 758 | if ((unitNumber = rtems_bsdnet_parse_driver_name (config, &unitName)) < 0) |
---|
| 759 | return 0; |
---|
| 760 | |
---|
| 761 | /* |
---|
| 762 | * Is driver free? |
---|
| 763 | */ |
---|
| 764 | if ((unitNumber <= 0) || (unitNumber > NIFACES)) { |
---|
[fa5dfe8] | 765 | printf("Bad FEC unit number.\n"); |
---|
[572484f] | 766 | return 0; |
---|
| 767 | } |
---|
| 768 | sc = &enet_driver[unitNumber - 1]; |
---|
| 769 | ifp = &sc->arpcom.ac_if; |
---|
| 770 | if (ifp->if_softc != NULL) { |
---|
| 771 | printf("Driver already in use.\n"); |
---|
| 772 | return 0; |
---|
| 773 | } |
---|
| 774 | |
---|
| 775 | /* |
---|
| 776 | * Process options |
---|
| 777 | */ |
---|
[dd2f891] | 778 | if (config->hardware_address) { |
---|
[572484f] | 779 | hwaddr = config->hardware_address; |
---|
[dd2f891] | 780 | } |
---|
| 781 | else if ((hwaddr = uC5282_gethwaddr(unitNumber - 1)) == NULL) { |
---|
| 782 | /* Locally-administered address */ |
---|
| 783 | static const char defaultAddress[ETHER_ADDR_LEN] = { |
---|
| 784 | 0x06, 'R', 'T', 'E', 'M', 'S'}; |
---|
| 785 | printf ("WARNING -- No %s%d Ethernet address specified -- Using default address.\n", |
---|
| 786 | unitName, unitNumber); |
---|
| 787 | hwaddr = defaultAddress; |
---|
| 788 | } |
---|
[572484f] | 789 | printf("%s%d: Ethernet address: %02x:%02x:%02x:%02x:%02x:%02x\n", |
---|
| 790 | unitName, unitNumber, |
---|
| 791 | hwaddr[0], hwaddr[1], hwaddr[2], |
---|
| 792 | hwaddr[3], hwaddr[4], hwaddr[5]); |
---|
| 793 | memcpy(sc->arpcom.ac_enaddr, hwaddr, ETHER_ADDR_LEN); |
---|
| 794 | |
---|
| 795 | if (config->mtu) |
---|
| 796 | mtu = config->mtu; |
---|
| 797 | else |
---|
| 798 | mtu = ETHERMTU; |
---|
| 799 | if (config->rbuf_count) |
---|
| 800 | sc->rxBdCount = config->rbuf_count; |
---|
| 801 | else |
---|
| 802 | sc->rxBdCount = RX_BUF_COUNT; |
---|
| 803 | if (config->xbuf_count) |
---|
| 804 | sc->txBdCount = config->xbuf_count; |
---|
| 805 | else |
---|
| 806 | sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; |
---|
| 807 | |
---|
| 808 | sc->acceptBroadcast = !config->ignore_broadcast; |
---|
| 809 | |
---|
| 810 | /* |
---|
| 811 | * Set up network interface values |
---|
| 812 | */ |
---|
| 813 | ifp->if_softc = sc; |
---|
| 814 | ifp->if_unit = unitNumber; |
---|
| 815 | ifp->if_name = unitName; |
---|
| 816 | ifp->if_mtu = mtu; |
---|
| 817 | ifp->if_init = fec_init; |
---|
| 818 | ifp->if_ioctl = fec_ioctl; |
---|
| 819 | ifp->if_start = mcf5282_enet_start; |
---|
| 820 | ifp->if_output = ether_output; |
---|
| 821 | ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; |
---|
| 822 | if (ifp->if_snd.ifq_maxlen == 0) |
---|
| 823 | ifp->if_snd.ifq_maxlen = ifqmaxlen; |
---|
| 824 | |
---|
| 825 | /* |
---|
| 826 | * Attach the interface |
---|
| 827 | */ |
---|
| 828 | if_attach(ifp); |
---|
| 829 | ether_ifattach(ifp); |
---|
| 830 | return 1; |
---|
| 831 | }; |
---|
| 832 | |
---|