source: rtems/c/src/lib/libbsp/m68k/uC5282/include/bsp.h @ 1fec9e0

4.11
Last change on this file since 1fec9e0 was 1fec9e0, checked in by Gedare Bloom <gedare@…>, on Apr 16, 2012 at 2:22:36 AM

m68k: replace m68k_isr with rtems_isr

  • Property mode set to 100644
File size: 5.1 KB
Line 
1/*
2 *  uC5282 BSP header file
3 *
4 *  Author: W. Eric Norum <norume@aps.anl.gov>
5 *
6 *  COPYRIGHT (c) 2005.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.rtems.com/license/LICENSE.
12 */
13
14#ifndef _BSP_H
15#define _BSP_H
16
17#ifdef __cplusplus
18extern "C" {
19#endif
20
21#include <rtems.h>
22#include <rtems/iosupp.h>
23#include <rtems/console.h>
24#include <rtems/clockdrv.h>
25#include <rtems/iosupp.h>
26#include <rtems/bspIo.h>
27
28/***************************************************************************/
29/**  BSP Configuration                                                    **/
30/*
31 * Uncomment to use instruction/data cache
32 * Leave commented to use instruction-only cache
33 */
34#define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE
35
36/***************************************************************************/
37/**  Hardware data structure headers                                      **/
38#include <mcf5282/mcf5282.h>   /* internal MCF5282 modules */
39
40/***************************************************************************/
41/**  Network driver configuration                                         **/
42struct rtems_bsdnet_ifconfig;
43extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );
44#define RTEMS_BSP_NETWORK_DRIVER_NAME     "fs1"
45#define RTEMS_BSP_NETWORK_DRIVER_ATTACH   rtems_fec_driver_attach
46
47/***************************************************************************/
48/**  User Definable configuration                                         **/
49
50/* define which port the console should use - all other ports are then defined as general purpose */
51#define CONSOLE_PORT        0
52
53/* functions */
54
55typedef struct {
56    unsigned int l;
57    void        *v;
58} bsp_mnode_t;
59
60#define RTEMS_BSP_PGM_ERASE_FIRST   0x1
61#define RTEMS_BSP_PGM_RESET_AFTER   0x2
62#define RTEMS_BSP_PGM_EXEC_AFTER    0x4
63#define RTEMS_BSP_PGM_HALT_AFTER    0x8
64
65uint32_t bsp_get_CPU_clock_speed(void);
66rtems_status_code bsp_allocate_interrupt(int level, int priority);
67int bsp_sysReset(int flags);
68int bsp_program(bsp_mnode_t *chain, int flags);
69unsigned const char *bsp_gethwaddr(int a);
70const char *bsp_getbenv(const char *a);
71int bsp_flash_erase_range(volatile unsigned short *flashptr, int start, int end);
72int bsp_flash_write_range(volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset);
73
74rtems_isr_entry set_vector(
75  rtems_isr_entry     handler,
76  rtems_vector_number vector,
77  int                 type
78);
79
80/*
81 * Interrupt assignments
82 *  Highest-priority listed first
83 */
84#define FEC_IRQ_LEVEL       4
85#define FEC_IRQ_RX_PRIORITY 7
86#define FEC_IRQ_TX_PRIORITY 6
87
88#define PIT3_IRQ_LEVEL      4
89#define PIT3_IRQ_PRIORITY   0
90
91#define UART0_IRQ_LEVEL     3
92#define UART0_IRQ_PRIORITY  7
93#define UART1_IRQ_LEVEL     3
94#define UART1_IRQ_PRIORITY  6
95#define UART2_IRQ_LEVEL     3
96#define UART2_IRQ_PRIORITY  5
97
98/*
99 * Fake VME support
100 * This makes it easier to use EPICS driver support on this BSP.
101 */
102#define VME_AM_STD_SUP_ASCENDING   0x3f
103#define VME_AM_STD_SUP_PGM         0x3e
104#define VME_AM_STD_USR_ASCENDING   0x3b
105#define VME_AM_STD_USR_PGM         0x3a
106#define VME_AM_STD_SUP_DATA        0x3d
107#define VME_AM_STD_USR_DATA        0x39
108#define VME_AM_EXT_SUP_ASCENDING   0x0f
109#define VME_AM_EXT_SUP_PGM         0x0e
110#define VME_AM_EXT_USR_ASCENDING   0x0b
111#define VME_AM_EXT_USR_PGM         0x0a
112#define VME_AM_EXT_SUP_DATA        0x0d
113#define VME_AM_EXT_USR_DATA        0x09
114#define VME_AM_SUP_SHORT_IO        0x2d
115#define VME_AM_USR_SHORT_IO        0x29
116
117/*
118 * 'Extended' BSP support
119 */
120rtems_status_code bspExtInit(void);
121typedef void (*BSP_VME_ISR_t)(void *usrArg, unsigned long vector);
122BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg);
123int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
124int BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
125int BSP_enableVME_int_lvl(unsigned int level);
126int BSP_disableVME_int_lvl(unsigned int level);
127int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr);
128
129/*
130 *  This BSP provides its own IDLE task to override the RTEMS one.
131 *  So we prototype it and define the constant confdefs.h expects
132 *  to configure a BSP specific one.
133 */
134void *bsp_idle_thread( uintptr_t ignored );
135#define BSP_IDLE_TASK_BODY bsp_idle_thread
136
137/*
138 * SRAM. The BSP uses SRAM for maintaining some clock-driver data
139 *       and for ethernet descriptors (and the initial stack during
140 *       early boot).
141 */
142
143typedef struct mcf5282BufferDescriptor_ {
144    volatile uint16_t   status;
145    uint16_t                    length;
146    volatile void      *buffer;
147} mcf5282BufferDescriptor_t;
148
149extern struct {
150        uint32_t                  idle_counter;
151        uint32_t                  filtered_idle;
152        uint32_t                  max_idle_count;
153        uint32_t                  pitc_per_tick;
154        uint32_t                  nsec_per_pitc;
155        uint32_t                  pad[3]; /* align to 16-bytes for descriptors */
156        mcf5282BufferDescriptor_t fec_descriptors[];
157        /* buffer descriptors are allocated from here */
158
159    /* initial stack is at top of SRAM (start.S)  */
160} __SRAMBASE;
161
162#ifdef __cplusplus
163}
164#endif
165
166#endif
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