[572484f] | 1 | /* |
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| 2 | * uC5282 BSP header file |
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[12b36efe] | 3 | * |
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| 4 | * Author: W. Eric Norum <norume@aps.anl.gov> |
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| 5 | * |
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| 6 | * COPYRIGHT (c) 2005. |
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| 7 | * On-Line Applications Research Corporation (OAR). |
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| 8 | * |
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| 9 | * The license and distribution terms for this file may be |
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| 10 | * found in the file LICENSE in this distribution or at |
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[688696e4] | 11 | * http://www.rtems.com/license/LICENSE. |
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[572484f] | 12 | */ |
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[d4b4664b] | 13 | |
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[34c4852] | 14 | #ifndef _BSP_H |
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| 15 | #define _BSP_H |
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[572484f] | 16 | |
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| 17 | #ifdef __cplusplus |
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| 18 | extern "C" { |
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| 19 | #endif |
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| 20 | |
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[12007d0] | 21 | #include <bspopts.h> |
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| 22 | |
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[572484f] | 23 | #include <rtems.h> |
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| 24 | #include <rtems/iosupp.h> |
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| 25 | #include <rtems/console.h> |
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| 26 | #include <rtems/clockdrv.h> |
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| 27 | #include <rtems/iosupp.h> |
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| 28 | #include <rtems/bspIo.h> |
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| 29 | |
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[ac9bbe7] | 30 | /***************************************************************************/ |
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| 31 | /** BSP Configuration **/ |
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| 32 | /* |
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| 33 | * Uncomment to use instruction/data cache |
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| 34 | * Leave commented to use instruction-only cache |
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| 35 | */ |
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[4ac7e272] | 36 | #define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE |
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[ac9bbe7] | 37 | |
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[572484f] | 38 | /***************************************************************************/ |
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| 39 | /** Hardware data structure headers **/ |
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| 40 | #include <mcf5282/mcf5282.h> /* internal MCF5282 modules */ |
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| 41 | |
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| 42 | /***************************************************************************/ |
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| 43 | /** Network driver configuration **/ |
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| 44 | struct rtems_bsdnet_ifconfig; |
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| 45 | extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching ); |
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| 46 | #define RTEMS_BSP_NETWORK_DRIVER_NAME "fs1" |
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| 47 | #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_fec_driver_attach |
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| 48 | |
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| 49 | /***************************************************************************/ |
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| 50 | /** User Definable configuration **/ |
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| 51 | |
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| 52 | /* define which port the console should use - all other ports are then defined as general purpose */ |
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| 53 | #define CONSOLE_PORT 0 |
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| 54 | |
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| 55 | /* functions */ |
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| 56 | |
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[16ae480] | 57 | typedef struct { |
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| 58 | unsigned int l; |
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| 59 | void *v; |
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| 60 | } bsp_mnode_t; |
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| 61 | |
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| 62 | #define RTEMS_BSP_PGM_ERASE_FIRST 0x1 |
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| 63 | #define RTEMS_BSP_PGM_RESET_AFTER 0x2 |
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| 64 | #define RTEMS_BSP_PGM_EXEC_AFTER 0x4 |
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| 65 | #define RTEMS_BSP_PGM_HALT_AFTER 0x8 |
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| 66 | |
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[0b2c943] | 67 | uint32_t bsp_get_CPU_clock_speed(void); |
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[d75023e] | 68 | rtems_status_code bsp_allocate_interrupt(int level, int priority); |
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[3e2f58a1] | 69 | int bsp_sysReset(int flags); |
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[16ae480] | 70 | int bsp_program(bsp_mnode_t *chain, int flags); |
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| 71 | unsigned const char *bsp_gethwaddr(int a); |
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| 72 | const char *bsp_getbenv(const char *a); |
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[8af3643] | 73 | int bsp_flash_erase_range(volatile unsigned short *flashptr, int start, int end); |
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| 74 | int bsp_flash_write_range(volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset); |
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[7eab0f78] | 75 | |
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[1fec9e0] | 76 | rtems_isr_entry set_vector( |
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[572484f] | 77 | rtems_isr_entry handler, |
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| 78 | rtems_vector_number vector, |
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| 79 | int type |
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| 80 | ); |
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| 81 | |
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| 82 | /* |
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| 83 | * Interrupt assignments |
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| 84 | * Highest-priority listed first |
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| 85 | */ |
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| 86 | #define FEC_IRQ_LEVEL 4 |
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| 87 | #define FEC_IRQ_RX_PRIORITY 7 |
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| 88 | #define FEC_IRQ_TX_PRIORITY 6 |
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| 89 | |
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| 90 | #define PIT3_IRQ_LEVEL 4 |
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| 91 | #define PIT3_IRQ_PRIORITY 0 |
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| 92 | |
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| 93 | #define UART0_IRQ_LEVEL 3 |
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| 94 | #define UART0_IRQ_PRIORITY 7 |
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| 95 | #define UART1_IRQ_LEVEL 3 |
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| 96 | #define UART1_IRQ_PRIORITY 6 |
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| 97 | #define UART2_IRQ_LEVEL 3 |
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| 98 | #define UART2_IRQ_PRIORITY 5 |
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| 99 | |
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[d75023e] | 100 | /* |
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| 101 | * Fake VME support |
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| 102 | * This makes it easier to use EPICS driver support on this BSP. |
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| 103 | */ |
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| 104 | #define VME_AM_STD_SUP_ASCENDING 0x3f |
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| 105 | #define VME_AM_STD_SUP_PGM 0x3e |
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| 106 | #define VME_AM_STD_USR_ASCENDING 0x3b |
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| 107 | #define VME_AM_STD_USR_PGM 0x3a |
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| 108 | #define VME_AM_STD_SUP_DATA 0x3d |
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| 109 | #define VME_AM_STD_USR_DATA 0x39 |
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| 110 | #define VME_AM_EXT_SUP_ASCENDING 0x0f |
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| 111 | #define VME_AM_EXT_SUP_PGM 0x0e |
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| 112 | #define VME_AM_EXT_USR_ASCENDING 0x0b |
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| 113 | #define VME_AM_EXT_USR_PGM 0x0a |
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| 114 | #define VME_AM_EXT_SUP_DATA 0x0d |
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| 115 | #define VME_AM_EXT_USR_DATA 0x09 |
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| 116 | #define VME_AM_SUP_SHORT_IO 0x2d |
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| 117 | #define VME_AM_USR_SHORT_IO 0x29 |
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| 118 | |
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| 119 | /* |
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| 120 | * 'Extended' BSP support |
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| 121 | */ |
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| 122 | rtems_status_code bspExtInit(void); |
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| 123 | typedef void (*BSP_VME_ISR_t)(void *usrArg, unsigned long vector); |
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| 124 | BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg); |
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| 125 | int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg); |
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| 126 | int BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg); |
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| 127 | int BSP_enableVME_int_lvl(unsigned int level); |
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| 128 | int BSP_disableVME_int_lvl(unsigned int level); |
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| 129 | int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr); |
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| 130 | |
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[92659697] | 131 | /* |
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| 132 | * This BSP provides its own IDLE task to override the RTEMS one. |
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| 133 | * So we prototype it and define the constant confdefs.h expects |
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| 134 | * to configure a BSP specific one. |
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| 135 | */ |
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[758daa4] | 136 | void *bsp_idle_thread( uintptr_t ignored ); |
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| 137 | #define BSP_IDLE_TASK_BODY bsp_idle_thread |
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[d75023e] | 138 | |
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[3f60fb4f] | 139 | /* |
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| 140 | * SRAM. The BSP uses SRAM for maintaining some clock-driver data |
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| 141 | * and for ethernet descriptors (and the initial stack during |
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| 142 | * early boot). |
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| 143 | */ |
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| 144 | |
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| 145 | typedef struct mcf5282BufferDescriptor_ { |
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| 146 | volatile uint16_t status; |
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| 147 | uint16_t length; |
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| 148 | volatile void *buffer; |
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| 149 | } mcf5282BufferDescriptor_t; |
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| 150 | |
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| 151 | extern struct { |
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| 152 | uint32_t idle_counter; |
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| 153 | uint32_t filtered_idle; |
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| 154 | uint32_t max_idle_count; |
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| 155 | uint32_t pitc_per_tick; |
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| 156 | uint32_t nsec_per_pitc; |
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| 157 | uint32_t pad[3]; /* align to 16-bytes for descriptors */ |
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| 158 | mcf5282BufferDescriptor_t fec_descriptors[]; |
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| 159 | /* buffer descriptors are allocated from here */ |
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| 160 | |
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| 161 | /* initial stack is at top of SRAM (start.S) */ |
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| 162 | } __SRAMBASE; |
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| 163 | |
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[572484f] | 164 | #ifdef __cplusplus |
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| 165 | } |
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| 166 | #endif |
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| 167 | |
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| 168 | #endif |
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