source: rtems/c/src/lib/libbsp/m68k/uC5282/include/bsp.h @ 12007d0

4.115
Last change on this file since 12007d0 was 12007d0, checked in by Sebastian Huber <sebastian.huber@…>, on 11/14/12 at 13:21:26

bsps: Include <bspopts.h> in <bsp.h>

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File size: 5.2 KB
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[572484f]1/*
2 *  uC5282 BSP header file
[12b36efe]3 *
4 *  Author: W. Eric Norum <norume@aps.anl.gov>
5 *
6 *  COPYRIGHT (c) 2005.
7 *  On-Line Applications Research Corporation (OAR).
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
[688696e4]11 *  http://www.rtems.com/license/LICENSE.
[572484f]12 */
[d4b4664b]13
[34c4852]14#ifndef _BSP_H
15#define _BSP_H
[572484f]16
17#ifdef __cplusplus
18extern "C" {
19#endif
20
[12007d0]21#include <bspopts.h>
22
[572484f]23#include <rtems.h>
24#include <rtems/iosupp.h>
25#include <rtems/console.h>
26#include <rtems/clockdrv.h>
27#include <rtems/iosupp.h>
28#include <rtems/bspIo.h>
29
[ac9bbe7]30/***************************************************************************/
31/**  BSP Configuration                                                    **/
32/*
33 * Uncomment to use instruction/data cache
34 * Leave commented to use instruction-only cache
35 */
[4ac7e272]36#define RTEMS_MCF5282_BSP_ENABLE_DATA_CACHE
[ac9bbe7]37
[572484f]38/***************************************************************************/
39/**  Hardware data structure headers                                      **/
40#include <mcf5282/mcf5282.h>   /* internal MCF5282 modules */
41
42/***************************************************************************/
43/**  Network driver configuration                                         **/
44struct rtems_bsdnet_ifconfig;
45extern int rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config, int attaching );
46#define RTEMS_BSP_NETWORK_DRIVER_NAME     "fs1"
47#define RTEMS_BSP_NETWORK_DRIVER_ATTACH   rtems_fec_driver_attach
48
49/***************************************************************************/
50/**  User Definable configuration                                         **/
51
52/* define which port the console should use - all other ports are then defined as general purpose */
53#define CONSOLE_PORT        0
54
55/* functions */
56
[16ae480]57typedef struct {
58    unsigned int l;
59    void        *v;
60} bsp_mnode_t;
61
62#define RTEMS_BSP_PGM_ERASE_FIRST   0x1
63#define RTEMS_BSP_PGM_RESET_AFTER   0x2
64#define RTEMS_BSP_PGM_EXEC_AFTER    0x4
65#define RTEMS_BSP_PGM_HALT_AFTER    0x8
66
[0b2c943]67uint32_t bsp_get_CPU_clock_speed(void);
[d75023e]68rtems_status_code bsp_allocate_interrupt(int level, int priority);
[3e2f58a1]69int bsp_sysReset(int flags);
[16ae480]70int bsp_program(bsp_mnode_t *chain, int flags);
71unsigned const char *bsp_gethwaddr(int a);
72const char *bsp_getbenv(const char *a);
[8af3643]73int bsp_flash_erase_range(volatile unsigned short *flashptr, int start, int end);
74int bsp_flash_write_range(volatile unsigned short *flashptr, bsp_mnode_t *chain, int offset);
[7eab0f78]75
[1fec9e0]76rtems_isr_entry set_vector(
[572484f]77  rtems_isr_entry     handler,
78  rtems_vector_number vector,
79  int                 type
80);
81
82/*
83 * Interrupt assignments
84 *  Highest-priority listed first
85 */
86#define FEC_IRQ_LEVEL       4
87#define FEC_IRQ_RX_PRIORITY 7
88#define FEC_IRQ_TX_PRIORITY 6
89
90#define PIT3_IRQ_LEVEL      4
91#define PIT3_IRQ_PRIORITY   0
92
93#define UART0_IRQ_LEVEL     3
94#define UART0_IRQ_PRIORITY  7
95#define UART1_IRQ_LEVEL     3
96#define UART1_IRQ_PRIORITY  6
97#define UART2_IRQ_LEVEL     3
98#define UART2_IRQ_PRIORITY  5
99
[d75023e]100/*
101 * Fake VME support
102 * This makes it easier to use EPICS driver support on this BSP.
103 */
104#define VME_AM_STD_SUP_ASCENDING   0x3f
105#define VME_AM_STD_SUP_PGM         0x3e
106#define VME_AM_STD_USR_ASCENDING   0x3b
107#define VME_AM_STD_USR_PGM         0x3a
108#define VME_AM_STD_SUP_DATA        0x3d
109#define VME_AM_STD_USR_DATA        0x39
110#define VME_AM_EXT_SUP_ASCENDING   0x0f
111#define VME_AM_EXT_SUP_PGM         0x0e
112#define VME_AM_EXT_USR_ASCENDING   0x0b
113#define VME_AM_EXT_USR_PGM         0x0a
114#define VME_AM_EXT_SUP_DATA        0x0d
115#define VME_AM_EXT_USR_DATA        0x09
116#define VME_AM_SUP_SHORT_IO        0x2d
117#define VME_AM_USR_SHORT_IO        0x29
118
119/*
120 * 'Extended' BSP support
121 */
122rtems_status_code bspExtInit(void);
123typedef void (*BSP_VME_ISR_t)(void *usrArg, unsigned long vector);
124BSP_VME_ISR_t BSP_getVME_isr(unsigned long vector, void **parg);
125int BSP_installVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
126int BSP_removeVME_isr(unsigned long vector, BSP_VME_ISR_t handler, void *usrArg);
127int BSP_enableVME_int_lvl(unsigned int level);
128int BSP_disableVME_int_lvl(unsigned int level);
129int BSP_vme2local_adrs(unsigned am, unsigned long vmeaddr, unsigned long *plocaladdr);
130
[92659697]131/*
132 *  This BSP provides its own IDLE task to override the RTEMS one.
133 *  So we prototype it and define the constant confdefs.h expects
134 *  to configure a BSP specific one.
135 */
[758daa4]136void *bsp_idle_thread( uintptr_t ignored );
137#define BSP_IDLE_TASK_BODY bsp_idle_thread
[d75023e]138
[3f60fb4f]139/*
140 * SRAM. The BSP uses SRAM for maintaining some clock-driver data
141 *       and for ethernet descriptors (and the initial stack during
142 *       early boot).
143 */
144
145typedef struct mcf5282BufferDescriptor_ {
146    volatile uint16_t   status;
147    uint16_t                    length;
148    volatile void      *buffer;
149} mcf5282BufferDescriptor_t;
150
151extern struct {
152        uint32_t                  idle_counter;
153        uint32_t                  filtered_idle;
154        uint32_t                  max_idle_count;
155        uint32_t                  pitc_per_tick;
156        uint32_t                  nsec_per_pitc;
157        uint32_t                  pad[3]; /* align to 16-bytes for descriptors */
158        mcf5282BufferDescriptor_t fec_descriptors[];
159        /* buffer descriptors are allocated from here */
160
161    /* initial stack is at top of SRAM (start.S)  */
162} __SRAMBASE;
163
[572484f]164#ifdef __cplusplus
165}
166#endif
167
168#endif
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