1 | /* |
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2 | * Use the last periodic interval timer (PIT3) as the system clock. |
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3 | * |
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4 | * $Id$ |
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5 | */ |
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6 | |
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7 | #include <rtems.h> |
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8 | #include <bsp.h> |
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9 | #include <mcf5282/mcf5282.h> |
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10 | |
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11 | /* |
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12 | * Use INTC0 base |
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13 | */ |
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14 | #define CLOCK_VECTOR (64+58) |
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15 | |
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16 | /* |
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17 | * Periodic interval timer interrupt handler |
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18 | */ |
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19 | #define Clock_driver_support_at_tick() \ |
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20 | do { \ |
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21 | MCF5282_PIT3_PCSR |= MCF5282_PIT_PCSR_PIF; \ |
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22 | } while (0) \ |
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23 | |
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24 | /* |
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25 | * Attach clock interrupt handler |
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26 | */ |
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27 | #define Clock_driver_support_install_isr( _new, _old ) \ |
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28 | do { \ |
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29 | _old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \ |
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30 | } while(0) |
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31 | |
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32 | /* |
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33 | * Turn off the clock |
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34 | */ |
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35 | #define Clock_driver_support_shutdown_hardware() \ |
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36 | do { \ |
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37 | MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \ |
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38 | } while(0) |
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39 | |
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40 | /* |
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41 | * Set up the clock hardware |
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42 | * |
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43 | * Prescale so that it counts in microseconds |
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44 | * System clock frequency better be 2**n (1<=n<=16) MHz! |
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45 | */ |
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46 | #define Clock_driver_support_initialize_hardware() \ |
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47 | do { \ |
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48 | int level; \ |
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49 | int preScaleCode = -2; \ |
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50 | int preScaleDivisor = get_CPU_clock_speed() / 1000000; \ |
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51 | while (preScaleDivisor) { \ |
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52 | preScaleDivisor >>= 1; \ |
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53 | preScaleCode++; \ |
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54 | } \ |
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55 | MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) | \ |
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56 | MCF5282_INTC_ICR_IP(PIT3_IRQ_PRIORITY); \ |
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57 | rtems_interrupt_disable( level ); \ |
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58 | MCF5282_INTC0_IMRH &= ~MCF5282_INTC_IMRH_INT58; \ |
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59 | MCF5282_PIT3_PCSR &= ~MCF5282_PIT_PCSR_EN; \ |
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60 | rtems_interrupt_enable( level ); \ |
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61 | MCF5282_PIT3_PMR = BSP_Configuration.microseconds_per_tick - 1; \ |
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62 | MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \ |
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63 | MCF5282_PIT_PCSR_PIE | \ |
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64 | MCF5282_PIT_PCSR_RLD | \ |
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65 | MCF5282_PIT_PCSR_EN; \ |
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66 | } while (0) |
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67 | |
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68 | #include "../../../shared/clockdrv_shell.c" |
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