source: rtems/c/src/lib/libbsp/m68k/ods68302/include/bare.h @ e1d8abb

4.104.114.84.95
Last change on this file since e1d8abb was 0074691, checked in by Joel Sherrill <joel.sherrill@…>, on Jul 31, 1997 at 10:13:29 PM

Merged very large and much appreciated patch from Chris Johns
<cjohns@…>. This patch includes the ods68302 bsp,
the RTEMS++ class library, and the rtems++ test.

  • Property mode set to 100644
File size: 8.3 KB
Line 
1/*****************************************************************************/
2/*
3  $Id$
4
5  Card Definition for a bare board.
6
7  This is an example file which actually builds a BSP for a 68302 card
8  called an MVF (Multi-Voice-Frequency). The card is one of a range
9  which run in a 100Mbit voice/video/data switch used for high end
10  applications such as Air Traffic Control. The transport is
11  FDDI-2. Yes it alive and well and working in real systems.
12
13  Chip selects are programmed as required. Three are controlled in the
14  boot code. They are RAM, ROM, and peripherals. You can optionally
15  configure the other two chip selects.
16 
17  SYSTEM_CLOCK - You must defined this. It is used for setting the
18  baud rate.
19
20  CSEL_ROM, CSEL_RAM - Must be defined, and made to be a single number
21  with brackets.
22
23  ROM_WAIT_STATES, RAM_WAIT_STATES - Must be defined. This sets the
24  speed for the ROM and RAM.
25
26  ROM and RAM size is passed on the command line. The makefile holds
27  them. This allows a single place to defined it. The makefile allows
28  them to be passed to the linker.
29
30  CSEL_1, CSEL_2 - If defined the other macros needed to define the
31  chip select must be defined. If not defined they are not programmed
32  and registers are left in the reset state.
33 
34  Card Specific Devices - The MVF card uses a chip select to address a
35  range of peripherials (CSEL_2). These include front panel leds, and
36  4 digit diagnostic display device. Put what ever you need.
37
38  LED_CONTROL - If defined the boot code will set leds as it goes.
39
40  UPDATE_DISPLAY - A four digit display device will also be updated to
41  show the boot state.
42
43  CARD_PA, CARD_PB - The default configuration, data direction and
44  data must be specified.
45
46  This file allows a range of common parameters which vary from one
47  variant of card to another to placed in a central file.
48 
49*/
50/*****************************************************************************/
51
52#ifndef _BARE_H_
53#define _BARE_H_
54
55#if __cplusplus
56extern "C" 
57{
58#endif
59
60/* name of the card */
61#define CARD_ID "m68302-odsbare"
62
63/* speed of the processor */
64#define SYSTEM_CLOCK (15360000)
65
66#define SCR_DEFAULT  (RBIT_SCR_IPA | RBIT_SCR_HWT | RBIT_SCR_WPV | RBIT_SCR_ADC | \
67                      RBIT_SCR_HWDEN | RBIT_SCR_HWDCN1 | RBIT_SCR_EMWS)
68
69/* define the chip selects */
70#define CSEL_ROM           0            /* token pasted so no brackets */
71#define ROM_WAIT_STATES    (OR_DTACK_1) /* 100nsec at 16MHz */
72#define CSEL_RAM           3
73#define RAM_WAIT_STATES    (OR_DTACK_0) /* 70nsec at 16MHz */
74
75/* The remaining chip selects are called 1 and 2 */
76/*
77#define CSEL_1             1
78#define CSEL_1_BASE        (0x00?00000)
79#define CSEL_1_SIZE        (0x00?00000)
80#define CSEL_1_WAIT_STATES (OR_DTACK_1)
81*/
82#define CSEL_2             2
83#define CSEL_2_BASE        (0x00800000)
84#define CSEL_2_SIZE        (0x00040000)
85#define CSEL_2_WAIT_STATES (OR_DTACK_EXT)
86
87/*
88 * Need to define a watchdog period 
89 */
90#define WATCHDOG_TIMEOUT_PERIOD (3000 * 2)
91
92/*
93 * Console and debug port allocation, 0=SCC1, 2=SCC3
94 */
95
96#define CONSOLE_PORT  1
97#define CONSOLE_BAUD  SCC_9600
98#define DEBUG_PORT    2
99#define DEBUG_BAUD    SCC_57600
100
101/* ----
102   Parallel Port Configuration, and default data directions
103
104   PORT  BITS - NAME                 , WHO       , DEFAULT WHAT
105   ------------------------------------------------------------
106   PPA:: 1: 0 - Serial               , PERIPHERAL, -
107   PPA:: 7: 2 - MVF_PPA:7:2          , IO        , INPUTS
108   PPA:: 9: 8 - Serial               , PERIPHERAL, -
109   PPA::15:10 - MVF_PPB:15:10        , IO        , INPUTS
110
111   PPB:: 1: 0 - Setup                , IO        , INPUTS
112   PPB:: 3: 2 - SYNC_HIGHWAY_1:2     , IO        , INPUTS
113              - SYNC_HIGHWAY_2:3     , IO        , INPUTS
114   PPB:: 4: 4 - HARDWARE_RESET:4     , IO        , OUTPUT
115   PPB:: 6: 5 - SOFTWARE_OVERRIDE_1:6, IO        , OUTPUT
116              - SOFTWARE_OVERRIDE_2:5, IO        , OUTPUT
117   PPB:: 7: 7 - Watchdog             , PERIPHERAL, -
118   PPB::11: 8 - Interrupt            , PERIPHERAL, -
119   PPB::15:12 - Not implemented on the 68302
120
121         15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0
122   ------------------------------------------------------
123   PACNT  0  0  0  0  0  0  1  1  0  0  0  0  0  0  1  1 = 0x0303
124   PBCNT  -  -  -  -  -  -  -  -  1  0  0  0  0  0  0  0 = 0x0080
125
126   PADDR  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0 = 0x0000
127   PBDDR  0  0  0  0  0  0  0  0  0  1  1  1  0  0  0  0 = 0x0070
128
129   PADAT  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0  0 = 0x0000
130
131 */
132#define CARD_PA_CONFIGURATION       0x0303
133#define CARD_PB_CONFIGURATION       0x0080
134
135#define CARD_PA_DEFAULT_DIRECTIONS  0x0000
136#define CARD_PB_DEFAULT_DIRECTIONS  0x0070
137
138#define CARD_PA_DEFAULT_DATA        0x0000
139#define CARD_PB_DEFAULT_DATA        (HARDWARE_RESET_DISABLE | \
140                                     SOFTWARE_OVERRIDE_1_DISABLE | \
141                                     SOFTWARE_OVERRIDE_2_DISABLE)
142
143/* these are specific to the card and are not required */
144#define HARDWARE_RESET_ENABLE       0x0000
145#define HARDWARE_RESET_DISABLE      0x0010
146
147#define SOFTWARE_OVERRIDE_1_ENABLE  0x0000
148#define SOFTWARE_OVERRIDE_1_DISABLE 0x0040
149#define SOFTWARE_OVERRIDE_2_ENABLE  0x0000
150#define SOFTWARE_OVERRIDE_2_DISABLE 0x0020
151
152/*
153 * Card Specific Devices, these are not required. Add what ever you
154 * like here.
155 */
156
157/* Write */
158#define WRITE_REGISTER_8(address, data) \
159                 *((rtems_unsigned8 *) (address)) = ((rtems_unsigned8) (data))
160#define WRITE_REGISTER_16(address, data) \
161                 *((rtems_unsigned16 *) (address)) = ((rtems_unsigned16) (data))
162#define WRITE_REGISTER_32(address, data) \
163                 *((rtems_unsigned32 *) (address)) = ((rtems_unsigned32) (data))
164/* Read */
165#define READ_REGISTER_8(address, data) data = *((rtems_unsigned8 *) (address))
166#define READ_REGISTER_16(address, data) data = *((rtems_unsigned16 *) (address))
167#define READ_REGISTER_32(address, data) data = *((rtems_unsigned32 *) (address))
168
169/* CS2 : Peripherials */
170#define PERIPHERIALS_BASE         (CSEL_2_BASE)
171
172#define STATUS_REGISTER_BASE      (PERIPHERIALS_BASE + 0x00000000)
173
174#define PERIPHERIALS_SIZE         (0x00040000)
175
176#define LEDS_BASE                 (PERIPHERIALS_BASE + 0x00004000)
177#define MSC_BASE                  (PERIPHERIALS_BASE + 0x00008000)
178#define SPARE_1_BASE              (PERIPHERIALS_BASE + 0x0000C000)
179#define DISPLAY_BASE              (PERIPHERIALS_BASE + 0x00010000)
180#define PIO_INT_BASE              (PERIPHERIALS_BASE + 0x00014000)
181#define UART_BASE                 (PERIPHERIALS_BASE + 0x00018000)
182#define PIA_BASE                  (PERIPHERIALS_BASE + 0x0001C000)
183
184#define LED_1         0x0002
185#define LED_1_GREEN   0xFFFD                 
186#define LED_1_RED     0xFFFF
187#define LED_1_OFF     0xFFFC       
188
189#define LED_2         0x0001
190#define LED_2_GREEN   0xFFFE   
191#define LED_2_RED     0xFFFF
192#define LED_2_OFF     0xFFFC
193
194#define LED_3         0x0000
195#define LED_3_GREEN   0xFFFC   
196#define LED_3_RED     0xFFFC
197#define LED_3_OFF     0xFFFC
198
199#define LED_4         0x0000
200#define LED_4_GREEN   0xFFFC   
201#define LED_4_RED     0xFFFC
202#define LED_4_OFF     0xFFFC
203
204#define LED_5         0x0000
205#define LED_5_GREEN   0xFFFC   
206#define LED_5_RED     0xFFFC
207#define LED_5_OFF     0xFFFC
208
209#define LED_6         0x0000
210#define LED_6_GREEN   0xFFFC   
211#define LED_6_RED     0xFFFC
212#define LED_6_OFF     0xFFFC
213
214#define LED_7         0x0000
215#define LED_7_GREEN   0xFFFC   
216#define LED_7_RED     0xFFFC
217#define LED_7_OFF     0xFFFC
218
219#define LED_8         0x0000
220#define LED_8_GREEN   0xFFFC   
221#define LED_8_RED     0xFFFC
222#define LED_8_OFF     0xFFFC
223
224#define MAKE_LED(L1, L2, L3, L4) ((L1 & LED_1) | (L2 & LED_2) | (L3 & LED_3) | (L4 & LED_4))
225
226#define LED_CONTROL(L1, L2, L3, L4, L5, L6, L7, L8) \
227            WRITE_REGISTER_16(LEDS_BASE, MAKE_LED(L1, L2, L3, L4))
228
229 /* update the display, needs a long word */
230#define UPDATE_DISPLAY(LongWordPtr) \
231         ( WRITE_REGISTER_16(DISPLAY_BASE, *(((rtems_unsigned8 *) LongWordPtr) + 3)), \
232           WRITE_REGISTER_16(DISPLAY_BASE + 2, *(((rtems_unsigned8 *) LongWordPtr) + 2)), \
233           WRITE_REGISTER_16(DISPLAY_BASE + 4, *(((rtems_unsigned8 *) LongWordPtr) + 1)), \
234           WRITE_REGISTER_16(DISPLAY_BASE + 6, *((rtems_unsigned8 *) LongWordPtr)) )
235
236/* make a better test, say switches */
237#if defined(GDB_MONITOR_ACTIVE)
238#define GDB_RUN_MONITOR() (1 == 1)
239#else
240#define GDB_RUN_MONITOR() (1 == 0)
241#endif
242                   
243#if __cplusplus
244}
245#endif
246#endif
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