[0074691a] | 1 | /* Clock_init() |
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| 2 | * |
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| 3 | * This routine initializes Timer 1 for an MC68302. |
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| 4 | * The tick frequency is 1 millisecond. |
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| 5 | * |
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| 6 | * Input parameters: NONE |
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| 7 | * |
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| 8 | * Output parameters: NONE |
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| 9 | * |
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[08311cc3] | 10 | * COPYRIGHT (c) 1989-1999. |
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[0074691a] | 11 | * On-Line Applications Research Corporation (OAR). |
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| 12 | * |
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[98e4ebf5] | 13 | * The license and distribution terms for this file may be |
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| 14 | * found in the file LICENSE in this distribution or at |
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[0074691a] | 15 | * http://www.OARcorp.com/rtems/license.html. |
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| 16 | * |
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| 17 | * $Id$ |
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| 18 | */ |
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| 19 | |
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| 20 | #include <stdlib.h> /* for atexit() */ |
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| 21 | |
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| 22 | #include <bsp.h> |
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| 23 | #include <rtems/libio.h> |
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| 24 | |
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| 25 | #include "m68302.h" |
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| 26 | |
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| 27 | #define CLOCK_VECTOR 137 |
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| 28 | |
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| 29 | #define TMR1_VAL ( RBIT_TMR_RST /* software reset the timer */\ |
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| 30 | | RBIT_TMR_ICLK_MASTER16 /* master clock divided by 16 */\ |
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| 31 | | RBIT_TMR_FRR /* restart timer after ref reached */\ |
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| 32 | | RBIT_TMR_ORI) /* enable interrupt when ref reached */ |
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| 33 | #define TRR1_VAL 1000 /* 1000 ticks @ 16MHz/16 |
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| 34 | * = 1 millisecond tick. |
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| 35 | */ |
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| 36 | |
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| 37 | /* |
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| 38 | * Clock_driver_ticks is a monotonically increasing counter of the |
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| 39 | * number of clock ticks since the driver was initialized. |
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| 40 | */ |
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| 41 | volatile rtems_unsigned32 Clock_driver_ticks; |
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| 42 | |
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| 43 | /* |
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| 44 | * Clock_isrs is the number of clock ISRs until the next invocation of |
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| 45 | * the RTEMS clock tick routine. The clock tick device driver |
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| 46 | * gets an interrupt once a millisecond and counts down until the |
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| 47 | * length of time between the user configured microseconds per tick |
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| 48 | * has passed. |
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| 49 | */ |
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| 50 | rtems_unsigned32 Clock_isrs; |
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| 51 | |
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| 52 | void Clock_exit( void ); |
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| 53 | |
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| 54 | /* |
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| 55 | * These are set by clock driver during its init |
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| 56 | */ |
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| 57 | |
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| 58 | rtems_device_major_number rtems_clock_major = ~0; |
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| 59 | rtems_device_minor_number rtems_clock_minor; |
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| 60 | |
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| 61 | /* |
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| 62 | * ISR Handler |
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| 63 | */ |
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| 64 | |
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| 65 | rtems_isr Clock_isr( |
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| 66 | rtems_vector_number vector |
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| 67 | ) |
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| 68 | { |
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| 69 | Clock_driver_ticks += 1; |
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| 70 | |
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| 71 | m302.reg.isr = RBIT_ISR_TIMER1; /* clear in-service bit */ |
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| 72 | m302.reg.ter1 = (RBIT_TER_REF | RBIT_TER_CAP); /* clear timer intr request */ |
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| 73 | |
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| 74 | if ( Clock_isrs == 1 ) { |
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| 75 | rtems_clock_tick(); |
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| 76 | Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; |
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| 77 | } |
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| 78 | else |
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| 79 | Clock_isrs -= 1; |
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| 80 | } |
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| 81 | |
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| 82 | void Install_clock( |
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| 83 | rtems_isr_entry clock_isr |
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| 84 | ) |
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| 85 | { |
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| 86 | |
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| 87 | Clock_driver_ticks = 0; |
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| 88 | Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; |
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| 89 | |
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| 90 | if ( BSP_Configuration.ticks_per_timeslice ) { |
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| 91 | set_vector( clock_isr, CLOCK_VECTOR, 1 ); |
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| 92 | |
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| 93 | m302.reg.trr1 = TRR1_VAL; /* set timer reference register */ |
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| 94 | m302.reg.tmr1 = TMR1_VAL; /* set timer mode register & enable */ |
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| 95 | /* |
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| 96 | * Enable TIMER1 interrupts only. |
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| 97 | */ |
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| 98 | m302.reg.imr = RBIT_IMR_TIMER1; /* set 68302 int-mask to allow ints */ |
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| 99 | |
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| 100 | atexit( Clock_exit ); |
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| 101 | } |
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| 102 | } |
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| 103 | |
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| 104 | void Clock_exit( void ) |
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| 105 | { |
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| 106 | if ( BSP_Configuration.ticks_per_timeslice ) { |
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| 107 | /* TODO: figure out what to do here */ |
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| 108 | /* do not restore old vector */ |
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| 109 | } |
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| 110 | } |
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| 111 | |
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| 112 | rtems_device_driver Clock_initialize( |
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| 113 | rtems_device_major_number major, |
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| 114 | rtems_device_minor_number minor, |
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| 115 | void *pargp |
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| 116 | ) |
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| 117 | { |
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| 118 | Install_clock( Clock_isr ); |
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| 119 | |
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| 120 | /* |
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| 121 | * make major/minor avail to others such as shared memory driver |
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| 122 | */ |
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| 123 | |
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| 124 | rtems_clock_major = major; |
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| 125 | rtems_clock_minor = minor; |
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| 126 | |
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| 127 | return RTEMS_SUCCESSFUL; |
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| 128 | } |
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| 129 | |
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| 130 | rtems_device_driver Clock_control( |
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| 131 | rtems_device_major_number major, |
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| 132 | rtems_device_minor_number minor, |
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| 133 | void *pargp |
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| 134 | ) |
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| 135 | { |
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| 136 | rtems_unsigned32 isrlevel; |
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| 137 | rtems_libio_ioctl_args_t *args = pargp; |
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| 138 | |
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| 139 | if (args == 0) |
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| 140 | goto done; |
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| 141 | |
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| 142 | /* |
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| 143 | * This is hokey, but until we get a defined interface |
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| 144 | * to do this, it will just be this simple... |
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| 145 | */ |
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| 146 | |
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| 147 | if (args->command == rtems_build_name('I', 'S', 'R', ' ')) |
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| 148 | { |
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| 149 | Clock_isr( CLOCK_VECTOR); |
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| 150 | } |
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| 151 | else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) |
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| 152 | { |
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| 153 | rtems_interrupt_disable( isrlevel ); |
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| 154 | (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); |
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| 155 | rtems_interrupt_enable( isrlevel ); |
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| 156 | } |
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| 157 | |
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| 158 | done: |
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| 159 | return RTEMS_SUCCESSFUL; |
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| 160 | } |
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| 161 | |
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