source: rtems/c/src/lib/libbsp/m68k/mvme162/include/bsp.h @ e4c07444

4.104.114.84.95
Last change on this file since e4c07444 was 08311cc3, checked in by Joel Sherrill <joel.sherrill@…>, on Nov 17, 1999 at 5:51:34 PM

Updated copyright notice.

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1/*  bsp.h
2 *
3 *  This include file contains all MVME162fx board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
13 *  EISCAT Scientific Association. M.Savitski
14 *
15 *  This material is a part of the MVME162 Board Support Package
16 *  for the RTEMS executive. Its licensing policies are those of the
17 *  RTEMS above.
18 *
19 *  $Id$
20 */
21
22#ifndef __MVME162_h
23#define __MVME162_h
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#include <rtems.h>
30#include <clockdrv.h>
31#include <console.h>
32#include <iosupp.h>
33
34/*
35 * Following defines must reflect the setup of the particular MVME162
36 */
37
38#define GROUP_BASE_ADDRESS    0x0000F200
39#define BOARD_BASE_ADDRESS    0xFFFF0000
40
41/* Base for local interrupters' vectors (with enable bit set) */
42
43#define MASK_INT              0x00800000
44#define VBR0                  0x6
45#define VBR1                  0x7
46
47/* RAM limits */
48
49#define RAM_START             0x00100000
50#define RAM_END               0x00200000
51
52/*
53 * ----------------------------------
54 */
55
56typedef volatile struct {
57  unsigned long     slave_adr[2];
58  unsigned long     slave_trn[2];
59  unsigned long     slave_ctl;
60  unsigned long     mastr_adr[4];
61  unsigned long     mastr_trn;
62  unsigned long     mastr_att;
63  unsigned long     mastr_ctl;
64  unsigned long     dma_ctl_1;
65  unsigned long     dma_ctl_2;
66  unsigned long     dma_loc_cnt;
67  unsigned long     dma_vme_cnt;
68  unsigned long     dma_byte_cnt;
69  unsigned long     dma_adr_cnt;
70  unsigned long     dma_status;
71  unsigned long     to_ctl;
72  unsigned long     timer_cmp_1;
73  unsigned long     timer_cnt_1;
74  unsigned long     timer_cmp_2;
75  unsigned long     timer_cnt_2;
76  unsigned long     board_ctl;
77  unsigned long     prescaler_cnt;
78  unsigned long     intr_stat;
79  unsigned long     intr_ena;
80  unsigned long     intr_soft_set;
81  unsigned long     intr_clear;
82  unsigned long     intr_level[4];
83  unsigned long     vector_base;
84} lcsr_regs;
85
86#define lcsr      ((lcsr_regs * const) 0xFFF40000)
87
88typedef volatile struct {
89
90  unsigned char     chipID;
91  unsigned char     chipREV;
92  unsigned char     gen_control;
93  unsigned char     vector_base;
94 
95  unsigned long     timer_cmp_1;
96  unsigned long     timer_cnt_1;
97  unsigned long     timer_cmp_2;
98  unsigned long     timer_cnt_2;
99 
100  unsigned char     LSB_prescaler_count;
101  unsigned char     prescaler_clock_adjust;
102  unsigned char     time_ctl_2;
103  unsigned char     time_ctl_1;
104 
105  unsigned char     time_int_ctl_4;
106  unsigned char     time_int_ctl_3;
107  unsigned char     time_int_ctl_2;
108  unsigned char     time_int_ctl_1;
109 
110  unsigned char     dram_err_int_ctl;
111  unsigned char     SCC_int_ctl;
112  unsigned char     time_ctl_4;
113  unsigned char     time_ctl_3;
114 
115  unsigned short    DRAM_space_base;
116  unsigned short    SRAM_space_base;
117 
118  unsigned char     DRAM_size;
119  unsigned char     DRAM_SRAM_opt;
120  unsigned char     SRAM_size;
121  unsigned char     reserved;
122
123  unsigned char     LANC_error;
124  unsigned char     reserved1;
125  unsigned char     LANC_int_ctl;
126  unsigned char     LANC_berr_ctl;
127
128  unsigned char     SCSI_error;
129  unsigned char     general_inputs;
130  unsigned char     MVME_162_version;
131  unsigned char     SCSI_int_ctl;
132
133  unsigned long     timer_cmp_3;
134  unsigned long     timer_cnt_3;
135  unsigned long     timer_cmp_4;
136  unsigned long     timer_cnt_4;
137 
138  unsigned char     bus_clk;
139  unsigned char     PROM_acc_time_ctl;
140  unsigned char     FLASH_acc_time_ctl;
141  unsigned char     ABORT_int_ctl;
142 
143  unsigned char     RESET_ctl;
144  unsigned char     watchdog_timer_ctl;
145  unsigned char     acc_watchdog_time_base_sel;
146  unsigned char     reserved2;
147 
148  unsigned char     DRAM_ctl;
149  unsigned char     reserved4;
150  unsigned char     MPU_status;
151  unsigned char     reserved3;
152 
153  unsigned long     prescaler_count;
154 
155} mcchip_regs;
156
157#define mcchip      ((mcchip_regs * const) 0xFFF42000)
158
159/*----------------------------------------------------------------*/
160
161/*
162 * SCC Z8523(0) defines and macros
163 * -------------------------------
164 * Prototypes for the low-level serial io are also included here,
165 * because such stuff is bsp-specific (yet). The function bodies
166 * are in console.c
167 *
168 * NOTE from Eric Vaitl <evaitl@viasat.com>:
169 *
170 * I dropped RTEMS into a 162FX today (the MVME162-513). The 162FX has a
171 * bug in the MC2 chip (revision 1) such that the SCC data register is
172 * not accessible, it has to be accessed indirectly through the SCC
173 * control register.
174 */
175
176enum {portB, portA};
177
178rtems_boolean char_ready(int port, char *ch);
179char char_wait(int port);
180void char_put(int port, char ch);
181
182#define TX_BUFFER_EMPTY   0x04
183#define RX_DATA_AVAILABLE 0x01
184#define SCC_VECTOR        0x40
185
186typedef volatile struct {
187  unsigned char pad1;
188  volatile unsigned char          csr;
189  unsigned char pad2;
190  volatile unsigned char          buf;
191} scc_regs;
192
193#define scc       ((scc_regs * const) 0xFFF45000)
194
195#define ZWRITE0(port, v)  (scc[port].csr = (unsigned char)(v))
196#define ZREAD0(port)  (scc[port].csr)
197
198#define ZREAD(port, n)  (ZWRITE0(port, n), (scc[port].csr))
199#define ZREADD(port)  (scc[port].csr=0x08, scc[port].csr )
200
201#define ZWRITE(port, n, v) (ZWRITE0(port, n), ZWRITE0(port, v))
202#define ZWRITED(port, v)  (scc[port].csr = 0x08, \
203                           scc[port].csr = (unsigned char)(v))
204/*----------------------------------------------------------------*/
205
206/*
207 * The following registers are located in the VMEbus short
208 * IO space and respond to address modifier codes $29 and $2D.
209 * On FORCE CPU use address gcsr_vme and device /dev/vme16d32.
210*/
211typedef volatile struct {
212  unsigned char       chip_revision;
213  unsigned char       chip_id;
214  unsigned char       lmsig;
215  unsigned char       board_scr;
216  unsigned short      gpr[6];
217} gcsr_regs;
218
219#define gcsr_vme ((gcsr_regs * const) (GROUP_BASE_ADDRESS + BOARD_BASE_ADDRESS))
220#define gcsr     ((gcsr_regs * const) 0xFFF40100)
221
222/*
223 *  Define the time limits for RTEMS Test Suite test durations.
224 *  Long test and short test duration limits are provided.  These
225 *  values are in seconds and need to be converted to ticks for the
226 *  application.
227 *
228 */
229
230#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
231#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
232
233/*
234 *  Define the interrupt mechanism for Time Test 27
235 *
236 *  NOTE: We use software interrupt 0
237 */
238
239#define MUST_WAIT_FOR_INTERRUPT 0
240
241#define Install_tm27_vector( handler ) \
242            set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \
243            lcsr->intr_level[2] |= 3; \
244            lcsr->intr_ena |= 0x100;
245
246#define Cause_tm27_intr()  lcsr->intr_soft_set |= 0x100
247
248#define Clear_tm27_intr()  lcsr->intr_clear |= 0x100
249
250#define Lower_tm27_intr()
251
252#ifdef M162_INIT
253#undef EXTERN
254#define EXTERN
255#else
256#undef EXTERN
257#define EXTERN extern
258#endif
259
260/*
261 *  Device Driver Table Entries
262 */
263
264/*
265 * NOTE: Use the standard Console driver entry
266 */
267 
268/*
269 * NOTE: Use the standard Clock driver entry
270 */
271
272/* miscellaneous stuff assumed to exist */
273
274extern rtems_configuration_table BSP_Configuration;
275
276extern m68k_isr_entry M68Kvec[];   /* vector table address */
277
278/* functions */
279
280void bsp_cleanup( void );
281
282m68k_isr_entry set_vector(
283  rtems_isr_entry     handler,
284  rtems_vector_number vector,
285  int                 type
286);
287
288#ifdef __cplusplus
289}
290#endif
291
292#endif
293/* end of include file */
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