source: rtems/c/src/lib/libbsp/m68k/mvme162/include/bsp.h @ 553aa5f

4.104.114.84.95
Last change on this file since 553aa5f was f4fe0092, checked in by Joel Sherrill <joel.sherrill@…>, on 09/04/03 at 18:52:04

2003-09-04 Joel Sherrill <joel@…>

  • clock/ckinit.c, console/console.c, consolex/cTest.c, consolex/consolex.c, consolex/consolex.h, include/bsp.h, include/coverhd.h, include/tod.h, startup/bspclean.c, startup/bspstart.c, startup/linkcmds, timer/timer.c, timer/timerisr.S, tod/tod.c: URL for license changed.
  • Property mode set to 100644
File size: 5.8 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all MVME162fx board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
13 *  EISCAT Scientific Association. M.Savitski
14 *
15 *  This material is a part of the MVME162 Board Support Package
16 *  for the RTEMS executive. Its licensing policies are those of the
17 *  RTEMS above.
18 *
19 *  $Id$
20 */
21
22#ifndef __MVME162_h
23#define __MVME162_h
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#include <bspopts.h>
30
31#include <rtems.h>
32#include <clockdrv.h>
33#include <console.h>
34#include <iosupp.h>
35
36/*
37 *  confdefs.h overrides for this BSP:
38 *   - number of termios serial ports (defaults to 1)
39 *   - Interrupt stack space is not minimum if defined.
40 */
41
42/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
43#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
44
45#include <mvme16x_hw.h>
46
47
48/*----------------------------------------------------------------*/
49
50typedef volatile struct {
51
52  unsigned char     chipID;
53  unsigned char     chipREV;
54  unsigned char     gen_control;
55  unsigned char     vector_base;
56 
57  unsigned long     timer_cmp_1;
58  unsigned long     timer_cnt_1;
59  unsigned long     timer_cmp_2;
60  unsigned long     timer_cnt_2;
61 
62  unsigned char     LSB_prescaler_count;
63  unsigned char     prescaler_clock_adjust;
64  unsigned char     time_ctl_2;
65  unsigned char     time_ctl_1;
66 
67  unsigned char     time_int_ctl_4;
68  unsigned char     time_int_ctl_3;
69  unsigned char     time_int_ctl_2;
70  unsigned char     time_int_ctl_1;
71 
72  unsigned char     dram_err_int_ctl;
73  unsigned char     SCC_int_ctl;
74  unsigned char     time_ctl_4;
75  unsigned char     time_ctl_3;
76 
77  unsigned short    DRAM_space_base;
78  unsigned short    SRAM_space_base;
79 
80  unsigned char     DRAM_size;
81  unsigned char     DRAM_SRAM_opt;
82  unsigned char     SRAM_size;
83  unsigned char     reserved;
84
85  unsigned char     LANC_error;
86  unsigned char     reserved1;
87  unsigned char     LANC_int_ctl;
88  unsigned char     LANC_berr_ctl;
89
90  unsigned char     SCSI_error;
91  unsigned char     general_inputs;
92  unsigned char     MVME_162_version;
93  unsigned char     SCSI_int_ctl;
94
95  unsigned long     timer_cmp_3;
96  unsigned long     timer_cnt_3;
97  unsigned long     timer_cmp_4;
98  unsigned long     timer_cnt_4;
99 
100  unsigned char     bus_clk;
101  unsigned char     PROM_acc_time_ctl;
102  unsigned char     FLASH_acc_time_ctl;
103  unsigned char     ABORT_int_ctl;
104 
105  unsigned char     RESET_ctl;
106  unsigned char     watchdog_timer_ctl;
107  unsigned char     acc_watchdog_time_base_sel;
108  unsigned char     reserved2;
109 
110  unsigned char     DRAM_ctl;
111  unsigned char     reserved4;
112  unsigned char     MPU_status;
113  unsigned char     reserved3;
114 
115  unsigned long     prescaler_count;
116 
117} mcchip_regs;
118 
119#define mcchip      ((mcchip_regs * const) 0xFFF42000)
120
121/*----------------------------------------------------------------*/
122
123/*
124 * SCC Z8523(0) defines and macros
125 * -------------------------------
126 * Prototypes for the low-level serial io are also included here,
127 * because such stuff is bsp-specific (yet). The function bodies
128 * are in console.c
129 *
130 * NOTE from Eric Vaitl <evaitl@viasat.com>:
131 *
132 * I dropped RTEMS into a 162FX today (the MVME162-513). The 162FX has a
133 * bug in the MC2 chip (revision 1) such that the SCC data register is
134 * not accessible, it has to be accessed indirectly through the SCC
135 * control register.
136 */
137
138enum {portB, portA};
139
140rtems_boolean char_ready(int port, char *ch);
141char char_wait(int port);
142void char_put(int port, char ch);
143
144#define TX_BUFFER_EMPTY   0x04
145#define RX_DATA_AVAILABLE 0x01
146#define SCC_VECTOR        0x40
147
148typedef volatile struct {
149  unsigned char pad1;
150  volatile unsigned char          csr;
151  unsigned char pad2;
152  volatile unsigned char          buf;
153} scc_regs;
154
155#define scc       ((scc_regs * const) 0xFFF45000)
156
157#define ZWRITE0(port, v)  (scc[port].csr = (unsigned char)(v))
158#define ZREAD0(port)  (scc[port].csr)
159
160#define ZREAD(port, n)  (ZWRITE0(port, n), (scc[port].csr))
161#define ZREADD(port)  (scc[port].csr=0x08, scc[port].csr )
162
163#define ZWRITE(port, n, v) (ZWRITE0(port, n), ZWRITE0(port, v))
164#define ZWRITED(port, v)  (scc[port].csr = 0x08, \
165                           scc[port].csr = (unsigned char)(v))
166/*----------------------------------------------------------------*/
167
168/*
169 *  Define the time limits for RTEMS Test Suite test durations.
170 *  Long test and short test duration limits are provided.  These
171 *  values are in seconds and need to be converted to ticks for the
172 *  application.
173 *
174 */
175
176#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
177#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
178
179/*
180 *  Define the interrupt mechanism for Time Test 27
181 *
182 *  NOTE: We use software interrupt 0
183 */
184
185#define MUST_WAIT_FOR_INTERRUPT 0
186
187#define Install_tm27_vector( handler ) \
188            set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \
189            lcsr->intr_level[2] |= 3; \
190            lcsr->intr_ena |= 0x100;
191
192#define Cause_tm27_intr()  lcsr->intr_soft_set |= 0x100
193
194#define Clear_tm27_intr()  lcsr->intr_clear |= 0x100
195
196#define Lower_tm27_intr()
197
198#ifdef M162_INIT
199#undef EXTERN
200#define EXTERN
201#else
202#undef EXTERN
203#define EXTERN extern
204#endif
205
206/*
207 *  Device Driver Table Entries
208 */
209
210/*
211 * NOTE: Use the standard Console driver entry
212 */
213 
214/*
215 * NOTE: Use the standard Clock driver entry
216 */
217
218/* miscellaneous stuff assumed to exist */
219
220extern rtems_configuration_table BSP_Configuration;
221
222extern m68k_isr_entry M68Kvec[];   /* vector table address */
223
224/* functions */
225
226void bsp_cleanup( void );
227
228m68k_isr_entry set_vector(
229  rtems_isr_entry     handler,
230  rtems_vector_number vector,
231  int                 type
232);
233
234#ifdef __cplusplus
235}
236#endif
237
238#endif
239/* end of include file */
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