source: rtems/c/src/lib/libbsp/m68k/mvme162/include/bsp.h @ 497428a2

4.104.114.84.95
Last change on this file since 497428a2 was 497428a2, checked in by Joel Sherrill <joel.sherrill@…>, on May 30, 1995 at 7:42:36 PM

cpu/*types.h added and successfully compiled.
IDLE task priority changed from 0 to 255 during initialization.

  • Property mode set to 100644
File size: 6.5 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all MVME162 board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
6 *  On-Line Applications Research Corporation (OAR).
7 *  All rights assigned to U.S. Government, 1994.
8 *
9 *  This material may be reproduced by or for the U.S. Government pursuant
10 *  to the copyright license under the clause at DFARS 252.227-7013.  This
11 *  notice must appear in all copies of this file and its derivatives.
12 *
13 *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
14 *  EISCAT Scientific Association. M.Savitski
15 *
16 *  This material is a part of the MVME162 Board Support Package
17 *  for the RTEMS executive. Its licensing policies are those of the
18 *  RTEMS above.
19 *
20 *  $Id$
21 */
22
23#ifndef __MVME162_h
24#define __MVME162_h
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30#include <rtems.h>
31#include <iosupp.h>
32#include <z8530.h>
33
34/*
35// Following defines must reflect the setup of the particular MVME162
36//-----------------------------------
37*/
38#define GROUP_BASE_ADDRESS    0x0000F200
39#define BOARD_BASE_ADDRESS    0x00000000
40/* Base for local interrupters' vectors (with enable bit set) */
41#define VECTOR_BASE           0x67800000
42/* RAM limits */
43#define RAM_START             0x00100000
44#define RAM_END               0x00200000
45/*
46//-----------------------------------
47*/
48static volatile struct lcsr {
49  unsigned long     slave_adr[2];
50  unsigned long     slave_trn[2];
51  unsigned long     slave_ctl;
52  unsigned long     mastr_adr[4];
53  unsigned long     mastr_trn;
54  unsigned long     mastr_att;
55  unsigned long     mastr_ctl;
56  unsigned long     dma_ctl_1;
57  unsigned long     dma_ctl_2;
58  unsigned long     dma_loc_cnt;
59  unsigned long     dma_vme_cnt;
60  unsigned long     dma_byte_cnt;
61  unsigned long     dma_adr_cnt;
62  unsigned long     dma_status;
63  unsigned long     to_ctl;
64  unsigned long     timer_cmp_1;
65  unsigned long     timer_cnt_1;
66  unsigned long     timer_cmp_2;
67  unsigned long     timer_cnt_2;
68  unsigned long     board_ctl;
69  unsigned long     prescaler_cnt;
70  unsigned long     intr_stat;
71  unsigned long     intr_ena;
72  unsigned long     intr_soft_set;
73  unsigned long     intr_clear;
74  unsigned long     intr_level[4];
75  unsigned long     vector_base;
76} *lcsr = (void *) 0xFFF40000;
77
78#define USE_CHANNEL_A   1                /* 1 = use channel A for console */
79#define USE_CHANNEL_B   0                /* 1 = use channel B for console */
80
81/* Constants */
82
83#if   (USE_CHANNEL_A == 1)
84  #define CONSOLE_CONTROL  0xFFF45005
85  #define CONSOLE_DATA     0xFFF45007
86#elif (USE_CHANNEL_B == 1)
87  #define CONSOLE_CONTROL  0xFFF45001
88  #define CONSOLE_DATA     0xFFF45003
89#endif
90
91/*
92// The following registers are located in the VMEbus short
93// IO space and respond to address modifier codes $29 and $2D.
94// On FORCE SPARC CPU use address gcsr_vme and device /dev/vme16d32.
95*/
96static volatile struct gcsr {
97  unsigned char       chip_revision;
98  unsigned char       chip_id;
99  unsigned char       lmsig;
100  unsigned char       board_scr;
101  unsigned short      gpr[6];
102} *gcsr_vme = (void *) (GROUP_BASE_ADDRESS + BOARD_BASE_ADDRESS),
103  *gcsr = (void *) 0xFFF40100;
104
105static volatile unsigned short  *ipio[6] = {  (unsigned short *) 0xFFF58000,
106                                              (unsigned short *) 0xFFF58100,
107                                              (unsigned short *) 0xFFF58200,
108                                              (unsigned short *) 0xFFF58300,
109                                              (unsigned short *) 0xFFF58400,
110                                              (unsigned short *) 0xFFF58500
111                                           };
112
113static volatile unsigned short  *ipid[6] = {  (unsigned short *) 0xFFF58080,
114                                              (unsigned short *) 0xFFF58180,
115                                              (unsigned short *) 0xFFF58280,
116                                              (unsigned short *) 0xFFF58380,
117                                              (unsigned short *) 0xFFF58080,
118                                              (unsigned short *) 0xFFF58280
119                                           };
120
121static volatile struct ipic_space {
122  struct sing {
123    unsigned short    io_space[64];
124    unsigned short    id_space[32];
125    unsigned short    id_reptd[32];
126  } single[4];
127  struct twin {
128    unsigned short    io_space[128];
129    unsigned short    io_reptd[128];
130  } twin[2];
131} *ipic_space = (void *) 0xFFF58000;
132
133static volatile struct ipic_csr {
134  unsigned char     chip_id;
135  unsigned char     chip_rev;
136  unsigned char     res[2];
137  unsigned short    a_31_16_base;
138  unsigned short    b_31_16_base;
139  unsigned short    c_31_16_base;
140  unsigned short    d_31_16_base;
141  unsigned char     a_23_16_size;
142  unsigned char     b_23_16_size;
143  unsigned char     c_23_16_size;
144  unsigned char     d_23_16_size;
145  unsigned short    a_intr_cnt;
146  unsigned short    b_intr_cnt;
147  unsigned short    c_intr_cnt;
148  unsigned short    d_intr_cnt;
149} *ipic_csr = (void *) 0xFFFBC000;
150
151/*
152 *  Define the time limits for RTEMS Test Suite test durations.
153 *  Long test and short test duration limits are provided.  These
154 *  values are in seconds and need to be converted to ticks for the
155 *  application.
156 *
157 */
158
159#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
160#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
161
162/*
163 *  Define the interrupt mechanism for Time Test 27
164 *
165 *  NOTE: Not implemented
166 */
167
168#define MUST_WAIT_FOR_INTERRUPT 0
169
170#define Install_tm27_vector( handler )
171
172#define Cause_tm27_intr()
173
174#define Clear_tm27_intr()
175
176#define Lower_tm27_intr()
177
178/*
179 *  Simple spin delay in microsecond units for device drivers.
180 *  This is very dependent on the clock speed of the target.
181 */
182
183#define delay( microseconds ) \
184  { register rtems_unsigned32 _delay=(microseconds); \
185    register rtems_unsigned32 _tmp=123; \
186    asm volatile( "0: \
187                     nbcd      %0 ; \
188                     nbcd      %0 ; \
189                     dbf       %1,0b" \
190                  : "=d" (_tmp), "=d" (_delay) \
191                  : "0"  (_tmp), "1"  (_delay) ); \
192  }
193
194/* Constants */
195
196#ifdef 1626_INIT
197#undef EXTERN
198#define EXTERN
199#else
200#undef EXTERN
201#define EXTERN extern
202#endif
203
204/* miscellaneous stuff assumed to exist */
205
206extern rtems_configuration_table BSP_Configuration;
207
208extern m68k_isr_entry M68Kvec[];   /* vector table address */
209
210/* functions */
211
212void bsp_cleanup( void );
213
214m68k_isr_entry set_vector(
215  rtems_isr_entry     handler,
216  rtems_vector_number vector,
217  int                 type
218);
219
220#ifdef __cplusplus
221}
222#endif
223
224#endif
225/* end of include file */
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