source: rtems/c/src/lib/libbsp/m68k/mvme162/include/bsp.h @ 09b6a093

Last change on this file since 09b6a093 was 09b6a093, checked in by Joel Sherrill <joel.sherrill@…>, on 05/24/00 at 17:06:54

Significantly lowered the default memory requirements:

  • CONFIGURE_RTEMS_INIT_TASKS_TABLE was 10 now 0
  • CONFIGURE_POSIX_INIT_THREAD_TABLE was 10 now 0
  • CONFIGURE_ITRON_INIT_TASK_TABLE was 10 now 0
  • CONFIGURE_LIBIO_MAXIMUM_FILE_DESCRIPTORS was 20 now 3
  • added CONFIGURE_NUMBER_OF_TERMIOS_PORTS and defaulted to 1
  • added CONFIGURE_TERMIOS_DISABLED defaulted to "enabled"
  • miniIMFS is now the default

Added configuration error checks that:

+ Ensure > 0 tasks/threads are configured
+ Ensure at least one inititalization task/thread is defined

bsp.h now defines these so BSP specific requirements
are accounted for.

+ CONFIGURE_NUMBER_OF_TERMIOS_PORTS
+ CONFIGURE_INTERRUPT_STACK_MEMORY

console_reserve_resources and rtems_termios_reserve_resources
are no longer required and considered obsolete. Calls to
rtems_termios_reserve_resources have been eliminated although
the routine is still there and the body "if 0'ed".

We are very close to having NO reason to modify the
configuration tables in the BSP. Be warned that eventually
we would like to see the need for BSP_Configuration
eliminated!

  • Property mode set to 100644
File size: 7.6 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all MVME162fx board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.OARcorp.com/rtems/license.html.
11 *
12 *  Modifications of respective RTEMS file: COPYRIGHT (c) 1994.
13 *  EISCAT Scientific Association. M.Savitski
14 *
15 *  This material is a part of the MVME162 Board Support Package
16 *  for the RTEMS executive. Its licensing policies are those of the
17 *  RTEMS above.
18 *
19 *  $Id$
20 */
21
22#ifndef __MVME162_h
23#define __MVME162_h
24
25#ifdef __cplusplus
26extern "C" {
27#endif
28
29#include <rtems.h>
30#include <clockdrv.h>
31#include <console.h>
32#include <iosupp.h>
33
34/*
35 *  confdefs.h overrides for this BSP:
36 *   - number of termios serial ports (defaults to 1)
37 *   - Interrupt stack space is not minimum if defined.
38 */
39
40/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
41#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
42
43/*
44 * Following defines must reflect the setup of the particular MVME162
45 */
46
47#define GROUP_BASE_ADDRESS    0x0000F200
48#define BOARD_BASE_ADDRESS    0xFFFF0000
49
50/* Base for local interrupters' vectors (with enable bit set) */
51
52#define MASK_INT              0x00800000
53#define VBR0                  0x6
54#define VBR1                  0x7
55
56/* RAM limits */
57
58#define RAM_START             0x00100000
59#define RAM_END               0x00200000
60
61/*
62 * ----------------------------------
63 */
64
65typedef volatile struct {
66  unsigned long     slave_adr[2];
67  unsigned long     slave_trn[2];
68  unsigned long     slave_ctl;
69  unsigned long     mastr_adr[4];
70  unsigned long     mastr_trn;
71  unsigned long     mastr_att;
72  unsigned long     mastr_ctl;
73  unsigned long     dma_ctl_1;
74  unsigned long     dma_ctl_2;
75  unsigned long     dma_loc_cnt;
76  unsigned long     dma_vme_cnt;
77  unsigned long     dma_byte_cnt;
78  unsigned long     dma_adr_cnt;
79  unsigned long     dma_status;
80  unsigned long     to_ctl;
81  unsigned long     timer_cmp_1;
82  unsigned long     timer_cnt_1;
83  unsigned long     timer_cmp_2;
84  unsigned long     timer_cnt_2;
85  unsigned long     board_ctl;
86  unsigned long     prescaler_cnt;
87  unsigned long     intr_stat;
88  unsigned long     intr_ena;
89  unsigned long     intr_soft_set;
90  unsigned long     intr_clear;
91  unsigned long     intr_level[4];
92  unsigned long     vector_base;
93} lcsr_regs;
94
95#define lcsr      ((lcsr_regs * const) 0xFFF40000)
96
97typedef volatile struct {
98
99  unsigned char     chipID;
100  unsigned char     chipREV;
101  unsigned char     gen_control;
102  unsigned char     vector_base;
103 
104  unsigned long     timer_cmp_1;
105  unsigned long     timer_cnt_1;
106  unsigned long     timer_cmp_2;
107  unsigned long     timer_cnt_2;
108 
109  unsigned char     LSB_prescaler_count;
110  unsigned char     prescaler_clock_adjust;
111  unsigned char     time_ctl_2;
112  unsigned char     time_ctl_1;
113 
114  unsigned char     time_int_ctl_4;
115  unsigned char     time_int_ctl_3;
116  unsigned char     time_int_ctl_2;
117  unsigned char     time_int_ctl_1;
118 
119  unsigned char     dram_err_int_ctl;
120  unsigned char     SCC_int_ctl;
121  unsigned char     time_ctl_4;
122  unsigned char     time_ctl_3;
123 
124  unsigned short    DRAM_space_base;
125  unsigned short    SRAM_space_base;
126 
127  unsigned char     DRAM_size;
128  unsigned char     DRAM_SRAM_opt;
129  unsigned char     SRAM_size;
130  unsigned char     reserved;
131
132  unsigned char     LANC_error;
133  unsigned char     reserved1;
134  unsigned char     LANC_int_ctl;
135  unsigned char     LANC_berr_ctl;
136
137  unsigned char     SCSI_error;
138  unsigned char     general_inputs;
139  unsigned char     MVME_162_version;
140  unsigned char     SCSI_int_ctl;
141
142  unsigned long     timer_cmp_3;
143  unsigned long     timer_cnt_3;
144  unsigned long     timer_cmp_4;
145  unsigned long     timer_cnt_4;
146 
147  unsigned char     bus_clk;
148  unsigned char     PROM_acc_time_ctl;
149  unsigned char     FLASH_acc_time_ctl;
150  unsigned char     ABORT_int_ctl;
151 
152  unsigned char     RESET_ctl;
153  unsigned char     watchdog_timer_ctl;
154  unsigned char     acc_watchdog_time_base_sel;
155  unsigned char     reserved2;
156 
157  unsigned char     DRAM_ctl;
158  unsigned char     reserved4;
159  unsigned char     MPU_status;
160  unsigned char     reserved3;
161 
162  unsigned long     prescaler_count;
163 
164} mcchip_regs;
165
166#define mcchip      ((mcchip_regs * const) 0xFFF42000)
167
168/*----------------------------------------------------------------*/
169
170/*
171 * SCC Z8523(0) defines and macros
172 * -------------------------------
173 * Prototypes for the low-level serial io are also included here,
174 * because such stuff is bsp-specific (yet). The function bodies
175 * are in console.c
176 *
177 * NOTE from Eric Vaitl <evaitl@viasat.com>:
178 *
179 * I dropped RTEMS into a 162FX today (the MVME162-513). The 162FX has a
180 * bug in the MC2 chip (revision 1) such that the SCC data register is
181 * not accessible, it has to be accessed indirectly through the SCC
182 * control register.
183 */
184
185enum {portB, portA};
186
187rtems_boolean char_ready(int port, char *ch);
188char char_wait(int port);
189void char_put(int port, char ch);
190
191#define TX_BUFFER_EMPTY   0x04
192#define RX_DATA_AVAILABLE 0x01
193#define SCC_VECTOR        0x40
194
195typedef volatile struct {
196  unsigned char pad1;
197  volatile unsigned char          csr;
198  unsigned char pad2;
199  volatile unsigned char          buf;
200} scc_regs;
201
202#define scc       ((scc_regs * const) 0xFFF45000)
203
204#define ZWRITE0(port, v)  (scc[port].csr = (unsigned char)(v))
205#define ZREAD0(port)  (scc[port].csr)
206
207#define ZREAD(port, n)  (ZWRITE0(port, n), (scc[port].csr))
208#define ZREADD(port)  (scc[port].csr=0x08, scc[port].csr )
209
210#define ZWRITE(port, n, v) (ZWRITE0(port, n), ZWRITE0(port, v))
211#define ZWRITED(port, v)  (scc[port].csr = 0x08, \
212                           scc[port].csr = (unsigned char)(v))
213/*----------------------------------------------------------------*/
214
215/*
216 * The following registers are located in the VMEbus short
217 * IO space and respond to address modifier codes $29 and $2D.
218 * On FORCE CPU use address gcsr_vme and device /dev/vme16d32.
219*/
220typedef volatile struct {
221  unsigned char       chip_revision;
222  unsigned char       chip_id;
223  unsigned char       lmsig;
224  unsigned char       board_scr;
225  unsigned short      gpr[6];
226} gcsr_regs;
227
228#define gcsr_vme ((gcsr_regs * const) (GROUP_BASE_ADDRESS + BOARD_BASE_ADDRESS))
229#define gcsr     ((gcsr_regs * const) 0xFFF40100)
230
231/*
232 *  Define the time limits for RTEMS Test Suite test durations.
233 *  Long test and short test duration limits are provided.  These
234 *  values are in seconds and need to be converted to ticks for the
235 *  application.
236 *
237 */
238
239#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
240#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
241
242/*
243 *  Define the interrupt mechanism for Time Test 27
244 *
245 *  NOTE: We use software interrupt 0
246 */
247
248#define MUST_WAIT_FOR_INTERRUPT 0
249
250#define Install_tm27_vector( handler ) \
251            set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \
252            lcsr->intr_level[2] |= 3; \
253            lcsr->intr_ena |= 0x100;
254
255#define Cause_tm27_intr()  lcsr->intr_soft_set |= 0x100
256
257#define Clear_tm27_intr()  lcsr->intr_clear |= 0x100
258
259#define Lower_tm27_intr()
260
261#ifdef M162_INIT
262#undef EXTERN
263#define EXTERN
264#else
265#undef EXTERN
266#define EXTERN extern
267#endif
268
269/*
270 *  Device Driver Table Entries
271 */
272
273/*
274 * NOTE: Use the standard Console driver entry
275 */
276 
277/*
278 * NOTE: Use the standard Clock driver entry
279 */
280
281/* miscellaneous stuff assumed to exist */
282
283extern rtems_configuration_table BSP_Configuration;
284
285extern m68k_isr_entry M68Kvec[];   /* vector table address */
286
287/* functions */
288
289void bsp_cleanup( void );
290
291m68k_isr_entry set_vector(
292  rtems_isr_entry     handler,
293  rtems_vector_number vector,
294  int                 type
295);
296
297#ifdef __cplusplus
298}
299#endif
300
301#endif
302/* end of include file */
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