[ac7d5ef0] | 1 | /* bsp.h |
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| 2 | * |
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| 3 | * This include file contains all MVME162 board IO definitions. |
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| 4 | * |
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| 5 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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| 6 | * On-Line Applications Research Corporation (OAR). |
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| 7 | * All rights assigned to U.S. Government, 1994. |
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| 8 | * |
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| 9 | * This material may be reproduced by or for the U.S. Government pursuant |
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| 10 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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| 11 | * notice must appear in all copies of this file and its derivatives. |
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| 12 | * |
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| 13 | * Modifications of respective RTEMS file: COPYRIGHT (c) 1994. |
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| 14 | * EISCAT Scientific Association. M.Savitski |
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| 15 | * |
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| 16 | * This material is a part of the MVME162 Board Support Package |
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| 17 | * for the RTEMS executive. Its licensing policies are those of the |
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| 18 | * RTEMS above. |
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| 19 | * |
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| 20 | * $Id$ |
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| 21 | */ |
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| 22 | |
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| 23 | #ifndef __MVME162_h |
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| 24 | #define __MVME162_h |
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| 25 | |
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| 26 | #ifdef __cplusplus |
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| 27 | extern "C" { |
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| 28 | #endif |
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| 29 | |
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| 30 | #include <rtems.h> |
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| 31 | #include <iosupp.h> |
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| 32 | #include <z8530.h> |
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| 33 | |
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| 34 | /* |
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| 35 | // Following defines must reflect the setup of the particular MVME162 |
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| 36 | //----------------------------------- |
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| 37 | */ |
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| 38 | #define GROUP_BASE_ADDRESS 0x0000F200 |
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| 39 | #define BOARD_BASE_ADDRESS 0x00000000 |
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| 40 | /* Base for local interrupters' vectors (with enable bit set) */ |
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| 41 | #define VECTOR_BASE 0x67800000 |
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| 42 | /* RAM limits */ |
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| 43 | #define RAM_START 0x00100000 |
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| 44 | #define RAM_END 0x00200000 |
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| 45 | /* |
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| 46 | //----------------------------------- |
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| 47 | */ |
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| 48 | static volatile struct lcsr { |
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| 49 | unsigned long slave_adr[2]; |
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| 50 | unsigned long slave_trn[2]; |
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| 51 | unsigned long slave_ctl; |
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| 52 | unsigned long mastr_adr[4]; |
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| 53 | unsigned long mastr_trn; |
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| 54 | unsigned long mastr_att; |
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| 55 | unsigned long mastr_ctl; |
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| 56 | unsigned long dma_ctl_1; |
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| 57 | unsigned long dma_ctl_2; |
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| 58 | unsigned long dma_loc_cnt; |
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| 59 | unsigned long dma_vme_cnt; |
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| 60 | unsigned long dma_byte_cnt; |
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| 61 | unsigned long dma_adr_cnt; |
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| 62 | unsigned long dma_status; |
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| 63 | unsigned long to_ctl; |
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| 64 | unsigned long timer_cmp_1; |
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| 65 | unsigned long timer_cnt_1; |
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| 66 | unsigned long timer_cmp_2; |
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| 67 | unsigned long timer_cnt_2; |
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| 68 | unsigned long board_ctl; |
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| 69 | unsigned long prescaler_cnt; |
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| 70 | unsigned long intr_stat; |
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| 71 | unsigned long intr_ena; |
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| 72 | unsigned long intr_soft_set; |
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| 73 | unsigned long intr_clear; |
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| 74 | unsigned long intr_level[4]; |
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| 75 | unsigned long vector_base; |
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| 76 | } *lcsr = (void *) 0xFFF40000; |
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| 77 | |
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| 78 | #define USE_CHANNEL_A 1 /* 1 = use channel A for console */ |
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| 79 | #define USE_CHANNEL_B 0 /* 1 = use channel B for console */ |
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| 80 | |
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| 81 | /* Constants */ |
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| 82 | |
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| 83 | #if (USE_CHANNEL_A == 1) |
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| 84 | #define CONSOLE_CONTROL 0xFFF45005 |
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| 85 | #define CONSOLE_DATA 0xFFF45007 |
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| 86 | #elif (USE_CHANNEL_B == 1) |
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| 87 | #define CONSOLE_CONTROL 0xFFF45001 |
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| 88 | #define CONSOLE_DATA 0xFFF45003 |
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| 89 | #endif |
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| 90 | |
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| 91 | /* |
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| 92 | // The following registers are located in the VMEbus short |
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| 93 | // IO space and respond to address modifier codes $29 and $2D. |
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| 94 | // On FORCE SPARC CPU use address gcsr_vme and device /dev/vme16d32. |
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| 95 | */ |
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| 96 | static volatile struct gcsr { |
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| 97 | unsigned char chip_revision; |
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| 98 | unsigned char chip_id; |
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| 99 | unsigned char lmsig; |
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| 100 | unsigned char board_scr; |
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| 101 | unsigned short gpr[6]; |
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| 102 | } *gcsr_vme = (void *) (GROUP_BASE_ADDRESS + BOARD_BASE_ADDRESS), |
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| 103 | *gcsr = (void *) 0xFFF40100; |
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| 104 | |
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| 105 | static volatile unsigned short *ipio[6] = { (unsigned short *) 0xFFF58000, |
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| 106 | (unsigned short *) 0xFFF58100, |
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| 107 | (unsigned short *) 0xFFF58200, |
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| 108 | (unsigned short *) 0xFFF58300, |
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| 109 | (unsigned short *) 0xFFF58400, |
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| 110 | (unsigned short *) 0xFFF58500 |
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| 111 | }; |
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| 112 | |
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| 113 | static volatile unsigned short *ipid[6] = { (unsigned short *) 0xFFF58080, |
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| 114 | (unsigned short *) 0xFFF58180, |
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| 115 | (unsigned short *) 0xFFF58280, |
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| 116 | (unsigned short *) 0xFFF58380, |
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| 117 | (unsigned short *) 0xFFF58080, |
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| 118 | (unsigned short *) 0xFFF58280 |
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| 119 | }; |
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| 120 | |
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| 121 | static volatile struct ipic_space { |
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| 122 | struct sing { |
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| 123 | unsigned short io_space[64]; |
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| 124 | unsigned short id_space[32]; |
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| 125 | unsigned short id_reptd[32]; |
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| 126 | } single[4]; |
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| 127 | struct twin { |
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| 128 | unsigned short io_space[128]; |
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| 129 | unsigned short io_reptd[128]; |
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| 130 | } twin[2]; |
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| 131 | } *ipic_space = (void *) 0xFFF58000; |
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| 132 | |
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| 133 | static volatile struct ipic_csr { |
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| 134 | unsigned char chip_id; |
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| 135 | unsigned char chip_rev; |
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| 136 | unsigned char res[2]; |
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| 137 | unsigned short a_31_16_base; |
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| 138 | unsigned short b_31_16_base; |
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| 139 | unsigned short c_31_16_base; |
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| 140 | unsigned short d_31_16_base; |
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| 141 | unsigned char a_23_16_size; |
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| 142 | unsigned char b_23_16_size; |
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| 143 | unsigned char c_23_16_size; |
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| 144 | unsigned char d_23_16_size; |
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| 145 | unsigned short a_intr_cnt; |
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| 146 | unsigned short b_intr_cnt; |
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| 147 | unsigned short c_intr_cnt; |
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| 148 | unsigned short d_intr_cnt; |
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| 149 | } *ipic_csr = (void *) 0xFFFBC000; |
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| 150 | |
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| 151 | /* |
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| 152 | * Define the time limits for RTEMS Test Suite test durations. |
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| 153 | * Long test and short test duration limits are provided. These |
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| 154 | * values are in seconds and need to be converted to ticks for the |
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| 155 | * application. |
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| 156 | * |
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| 157 | */ |
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| 158 | |
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| 159 | #define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ |
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| 160 | #define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ |
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| 161 | |
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| 162 | /* |
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| 163 | * Define the interrupt mechanism for Time Test 27 |
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| 164 | * |
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| 165 | * NOTE: Not implemented |
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| 166 | */ |
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| 167 | |
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| 168 | #define MUST_WAIT_FOR_INTERRUPT 0 |
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| 169 | |
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| 170 | #define Install_tm27_vector( handler ) |
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| 171 | |
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| 172 | #define Cause_tm27_intr() |
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| 173 | |
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| 174 | #define Clear_tm27_intr() |
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| 175 | |
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| 176 | #define Lower_tm27_intr() |
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| 177 | |
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| 178 | /* |
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| 179 | * Simple spin delay in microsecond units for device drivers. |
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| 180 | * This is very dependent on the clock speed of the target. |
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| 181 | */ |
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| 182 | |
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| 183 | #define delay( microseconds ) \ |
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| 184 | { register rtems_unsigned32 _delay=(microseconds); \ |
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| 185 | register rtems_unsigned32 _tmp=123; \ |
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| 186 | asm volatile( "0: \ |
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| 187 | nbcd %0 ; \ |
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| 188 | nbcd %0 ; \ |
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| 189 | dbf %1,0b" \ |
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| 190 | : "=d" (_tmp), "=d" (_delay) \ |
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| 191 | : "0" (_tmp), "1" (_delay) ); \ |
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| 192 | } |
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| 193 | |
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| 194 | /* Constants */ |
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| 195 | |
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| 196 | #ifdef 1626_INIT |
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| 197 | #undef EXTERN |
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| 198 | #define EXTERN |
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| 199 | #else |
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| 200 | #undef EXTERN |
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| 201 | #define EXTERN extern |
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| 202 | #endif |
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| 203 | |
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| 204 | /* miscellaneous stuff assumed to exist */ |
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| 205 | |
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| 206 | extern rtems_configuration_table BSP_Configuration; |
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| 207 | |
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[497428a2] | 208 | extern m68k_isr_entry M68Kvec[]; /* vector table address */ |
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[ac7d5ef0] | 209 | |
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| 210 | /* functions */ |
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| 211 | |
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| 212 | void bsp_cleanup( void ); |
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| 213 | |
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[497428a2] | 214 | m68k_isr_entry set_vector( |
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[ac7d5ef0] | 215 | rtems_isr_entry handler, |
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| 216 | rtems_vector_number vector, |
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| 217 | int type |
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| 218 | ); |
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| 219 | |
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| 220 | #ifdef __cplusplus |
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| 221 | } |
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| 222 | #endif |
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| 223 | |
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| 224 | #endif |
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| 225 | /* end of include file */ |
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