[ac7d5ef0] | 1 | /* |
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| 2 | * This file contains the MVME162 console IO package. |
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| 3 | * |
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| 4 | * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. |
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| 5 | * On-Line Applications Research Corporation (OAR). |
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| 6 | * All rights assigned to U.S. Government, 1994. |
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| 7 | * |
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| 8 | * This material may be reproduced by or for the U.S. Government pursuant |
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| 9 | * to the copyright license under the clause at DFARS 252.227-7013. This |
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| 10 | * notice must appear in all copies of this file and its derivatives. |
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| 11 | * |
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| 12 | * Modifications of respective RTEMS file: COPYRIGHT (c) 1994. |
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| 13 | * EISCAT Scientific Association. M.Savitski |
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| 14 | * |
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| 15 | * This material is a part of the MVME162 Board Support Package |
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| 16 | * for the RTEMS executive. Its licensing policies are those of the |
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| 17 | * RTEMS above. |
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| 18 | * |
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| 19 | * $Id$ |
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| 20 | */ |
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| 21 | |
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| 22 | #define M162_INIT |
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| 23 | |
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| 24 | #include <rtems.h> |
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| 25 | #include "console.h" |
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| 26 | #include "bsp.h" |
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[c6fb8e90] | 27 | #include "ringbuf.h" |
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[ac7d5ef0] | 28 | |
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[c6fb8e90] | 29 | Ring_buffer_t Buffer[2]; |
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| 30 | |
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| 31 | /* |
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| 32 | * Interrupt handler for receiver interrupts |
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[ac7d5ef0] | 33 | */ |
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| 34 | |
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[c6fb8e90] | 35 | rtems_isr C_Receive_ISR(rtems_vector_number vector) |
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| 36 | { |
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| 37 | register int ipend, port; |
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| 38 | |
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| 39 | ZWRITE0(1, 0x38); /* reset highest IUS */ |
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| 40 | |
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| 41 | ipend = ZREAD(1, 3); /* read int pending from A side */ |
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| 42 | |
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| 43 | if (ipend == 0x04) port = 0; /* channel B intr pending */ |
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| 44 | else if (ipend == 0x20) port = 1; /* channel A intr pending */ |
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| 45 | else return; |
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| 46 | |
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| 47 | Ring_buffer_Add_character(&Buffer[port], ZREADD(port)); |
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| 48 | |
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| 49 | if (ZREAD(port, 1) & 0x70) { /* check error stat */ |
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| 50 | ZWRITE0(port, 0x30); /* reset error */ |
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| 51 | } |
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| 52 | } |
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| 53 | |
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[ac7d5ef0] | 54 | rtems_device_driver console_initialize( |
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| 55 | rtems_device_major_number major, |
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| 56 | rtems_device_minor_number minor, |
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| 57 | void *arg, |
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| 58 | rtems_id self, |
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| 59 | rtems_unsigned32 *status |
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| 60 | ) |
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| 61 | { |
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[c6fb8e90] | 62 | int i; |
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| 63 | |
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| 64 | /* |
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| 65 | * Initialise receiver interrupts on both ports |
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| 66 | */ |
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| 67 | |
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| 68 | for (i = 0; i <= 1; i++) { |
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| 69 | Ring_buffer_Initialize( &Buffer[i] ); |
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| 70 | ZWRITE(i, 2, SCC_VECTOR); |
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| 71 | ZWRITE(i, 10, 0); |
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| 72 | ZWRITE(i, 1, 0x10); /* int on all Rx chars or special condition */ |
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| 73 | ZWRITE(i, 9, 8); /* master interrupt enable */ |
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| 74 | } |
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| 75 | |
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| 76 | set_vector(C_Receive_ISR, SCC_VECTOR, 1); /* install ISR for ports A and B */ |
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| 77 | |
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| 78 | mcchip->vector_base = 0; |
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| 79 | mcchip->gen_control = 2; /* MIEN */ |
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| 80 | mcchip->SCC_int_ctl = 0x13; /* SCC IEN, IPL3 */ |
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| 81 | |
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[ac7d5ef0] | 82 | *status = RTEMS_SUCCESSFUL; |
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| 83 | } |
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| 84 | |
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[c6fb8e90] | 85 | /* |
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| 86 | * Non-blocking char input |
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[ac7d5ef0] | 87 | */ |
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| 88 | |
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[c6fb8e90] | 89 | rtems_boolean char_ready(int port, char *ch) |
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[ac7d5ef0] | 90 | { |
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[c6fb8e90] | 91 | if ( Ring_buffer_Is_empty( &Buffer[port] ) ) |
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| 92 | return FALSE; |
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[ac7d5ef0] | 93 | |
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[c6fb8e90] | 94 | Ring_buffer_Remove_character( &Buffer[port], *ch ); |
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| 95 | |
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| 96 | return TRUE; |
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[ac7d5ef0] | 97 | } |
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| 98 | |
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[c6fb8e90] | 99 | /* |
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| 100 | * Block on char input |
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[ac7d5ef0] | 101 | */ |
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| 102 | |
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[c6fb8e90] | 103 | char char_wait(int port) |
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[ac7d5ef0] | 104 | { |
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[c6fb8e90] | 105 | unsigned char tmp_char; |
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| 106 | |
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| 107 | while ( !char_ready(port, &tmp_char) ); |
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| 108 | return tmp_char; |
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[ac7d5ef0] | 109 | } |
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| 110 | |
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[c6fb8e90] | 111 | /* |
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| 112 | * This routine transmits a character out the SCC. It no longer supports |
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| 113 | * XON/XOFF flow control. |
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[ac7d5ef0] | 114 | */ |
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| 115 | |
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[c6fb8e90] | 116 | void char_put(int port, char ch) |
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[ac7d5ef0] | 117 | { |
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[c6fb8e90] | 118 | while (1) { |
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| 119 | if (ZREAD0(port) & TX_BUFFER_EMPTY) break; |
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[ac7d5ef0] | 120 | } |
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[c6fb8e90] | 121 | ZWRITED(port, ch); |
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[ac7d5ef0] | 122 | } |
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| 123 | |
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| 124 | /* |
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[c6fb8e90] | 125 | * Map port A (1) to stdin, stdout, and stderr. |
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| 126 | * Map everything else to port B (0). |
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[ac7d5ef0] | 127 | */ |
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| 128 | |
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[c6fb8e90] | 129 | int __read(int fd, char *buf, int nbytes) |
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[ac7d5ef0] | 130 | { |
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[c6fb8e90] | 131 | int i, port; |
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| 132 | |
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| 133 | if ( fd <= 2 ) port = 1; |
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| 134 | else port = 0; |
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[ac7d5ef0] | 135 | |
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| 136 | for (i = 0; i < nbytes; i++) { |
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[c6fb8e90] | 137 | *(buf + i) = char_wait(port); |
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[ac7d5ef0] | 138 | if ((*(buf + i) == '\n') || (*(buf + i) == '\r')) { |
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| 139 | (*(buf + i++)) = '\n'; |
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| 140 | (*(buf + i)) = 0; |
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| 141 | break; |
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| 142 | } |
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| 143 | } |
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| 144 | return (i); |
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| 145 | } |
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| 146 | |
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| 147 | /* |
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[c6fb8e90] | 148 | * Map port A (1) to stdin, stdout, and stderr. |
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| 149 | * Map everything else to port B (0). |
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[ac7d5ef0] | 150 | */ |
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| 151 | |
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[c6fb8e90] | 152 | int __write(int fd, char *buf, int nbytes) |
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[ac7d5ef0] | 153 | { |
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[c6fb8e90] | 154 | int i, port; |
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| 155 | |
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| 156 | if ( fd <= 2 ) port = 1; |
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| 157 | else port = 0; |
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| 158 | |
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[ac7d5ef0] | 159 | for (i = 0; i < nbytes; i++) { |
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| 160 | if (*(buf + i) == '\n') { |
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[c6fb8e90] | 161 | char_put (port, '\r'); |
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[ac7d5ef0] | 162 | } |
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[c6fb8e90] | 163 | char_put (port, *(buf + i)); |
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[ac7d5ef0] | 164 | } |
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| 165 | return (nbytes); |
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| 166 | } |
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