1 | /* Clock_init() |
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2 | * |
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3 | * This routine initializes the Tick Timer 2 on the MVME162 board. |
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4 | * The tick frequency is 1 millisecond. |
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5 | * |
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6 | * Input parameters: NONE |
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7 | * |
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8 | * Output parameters: NONE |
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9 | * |
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10 | * COPYRIGHT (c) 1989-1999. |
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11 | * On-Line Applications Research Corporation (OAR). |
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12 | * |
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13 | * The license and distribution terms for this file may be |
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14 | * found in the file LICENSE in this distribution or at |
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15 | * http://www.rtems.com/license/LICENSE. |
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16 | * |
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17 | * Modifications of respective RTEMS file: COPYRIGHT (c) 1994. |
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18 | * EISCAT Scientific Association. M.Savitski |
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19 | * |
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20 | * This material is a part of the MVME162 Board Support Package |
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21 | * for the RTEMS executive. Its licensing policies are those of the |
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22 | * RTEMS above. |
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23 | * |
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24 | * $Id$ |
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25 | */ |
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26 | |
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27 | #include <stdlib.h> |
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28 | |
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29 | #include <bsp.h> |
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30 | #include <rtems/libio.h> |
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31 | |
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32 | #define MS_COUNT 1000 /* T2's countdown constant (1 ms) */ |
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33 | #define CLOCK_INT_LEVEL 6 /* T2's interrupt level */ |
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34 | |
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35 | rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ |
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36 | volatile rtems_unsigned32 Clock_driver_ticks; /* ticks since initialization */ |
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37 | rtems_isr_entry Old_ticker; |
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38 | |
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39 | void Clock_exit( void ); |
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40 | |
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41 | #define CLOCK_VECTOR (VBR0 * 0x10 + 0x9) |
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42 | /* |
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43 | * These are set by clock driver during its init |
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44 | */ |
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45 | |
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46 | rtems_device_major_number rtems_clock_major = ~0; |
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47 | rtems_device_minor_number rtems_clock_minor; |
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48 | |
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49 | |
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50 | /* |
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51 | * ISR Handler |
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52 | */ |
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53 | |
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54 | rtems_isr Clock_isr(rtems_vector_number vector) |
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55 | { |
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56 | Clock_driver_ticks += 1; |
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57 | lcsr->timer_cnt_2 = 0; /* clear counter */ |
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58 | lcsr->intr_clear |= 0x02000000; |
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59 | |
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60 | if ( Clock_isrs == 1 ) { |
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61 | rtems_clock_tick(); |
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62 | Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; |
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63 | } |
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64 | else |
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65 | Clock_isrs -= 1; |
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66 | } |
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67 | |
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68 | void Install_clock(rtems_isr_entry clock_isr ) |
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69 | { |
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70 | |
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71 | Clock_driver_ticks = 0; |
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72 | Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; |
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73 | |
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74 | Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 ); |
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75 | lcsr->vector_base |= MASK_INT; /* unmask VMEchip2 interrupts */ |
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76 | lcsr->to_ctl = 0xE7; /* prescaler to 1 MHz (see Appendix A1) */ |
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77 | lcsr->timer_cmp_2 = MS_COUNT; |
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78 | lcsr->timer_cnt_2 = 0; /* clear counter */ |
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79 | lcsr->board_ctl |= 0x700; /* increment, reset-on-compare, and */ |
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80 | /* clear-overflow-cnt */ |
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81 | |
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82 | lcsr->intr_level[0] |= CLOCK_INT_LEVEL * 0x10; /* set int level */ |
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83 | lcsr->intr_ena |= 0x02000000; /* enable tick timer 2 interrupt */ |
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84 | |
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85 | atexit( Clock_exit ); |
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86 | } |
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87 | |
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88 | void Clock_exit( void ) |
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89 | { |
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90 | /* Dummy for now. See other m68k BSP's for code examples */ |
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91 | } |
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92 | |
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93 | rtems_device_driver Clock_initialize( |
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94 | rtems_device_major_number major, |
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95 | rtems_device_minor_number minor, |
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96 | void *pargp |
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97 | ) |
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98 | { |
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99 | Install_clock( Clock_isr ); |
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100 | |
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101 | /* |
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102 | * make major/minor avail to others such as shared memory driver |
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103 | */ |
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104 | |
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105 | rtems_clock_major = major; |
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106 | rtems_clock_minor = minor; |
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107 | |
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108 | return RTEMS_SUCCESSFUL; |
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109 | } |
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110 | |
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111 | rtems_device_driver Clock_control( |
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112 | rtems_device_major_number major, |
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113 | rtems_device_minor_number minor, |
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114 | void *pargp |
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115 | ) |
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116 | { |
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117 | rtems_unsigned32 isrlevel; |
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118 | rtems_libio_ioctl_args_t *args = pargp; |
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119 | |
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120 | if (args == 0) |
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121 | goto done; |
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122 | |
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123 | /* |
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124 | * This is hokey, but until we get a defined interface |
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125 | * to do this, it will just be this simple... |
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126 | */ |
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127 | |
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128 | if (args->command == rtems_build_name('I', 'S', 'R', ' ')) |
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129 | { |
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130 | Clock_isr(CLOCK_VECTOR); |
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131 | } |
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132 | else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) |
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133 | { |
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134 | rtems_interrupt_disable( isrlevel ); |
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135 | (void) set_vector( args->buffer, CLOCK_VECTOR, 1 ); |
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136 | rtems_interrupt_enable( isrlevel ); |
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137 | } |
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138 | |
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139 | done: |
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140 | return RTEMS_SUCCESSFUL; |
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141 | } |
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142 | |
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