1 | /* |
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2 | * This routine starts the application. It includes application, |
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3 | * board, and monitor specific initialization and configuration. |
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4 | * The generic CPU dependent initialization has been performed |
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5 | * before this routine is invoked. |
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6 | * |
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7 | * COPYRIGHT (c) 1989-1999. |
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8 | * On-Line Applications Research Corporation (OAR). |
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9 | * |
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10 | * The license and distribution terms for this file may be |
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11 | * found in the file LICENSE in this distribution or at |
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12 | * http://www.OARcorp.com/rtems/license.html. |
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13 | * |
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14 | * MVME147 port for TNI - Telecom Bretagne |
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15 | * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr) |
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16 | * May 1996 |
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17 | * |
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18 | * $Id$ |
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19 | */ |
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20 | |
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21 | #include <bsp.h> |
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22 | #include <rtems/libio.h> |
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23 | |
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24 | #include <libcsupport.h> |
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25 | |
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26 | #include <string.h> |
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27 | |
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28 | /* |
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29 | * The original table from the application and our copy of it with |
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30 | * some changes. |
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31 | */ |
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32 | |
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33 | extern rtems_configuration_table Configuration; |
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34 | rtems_configuration_table BSP_Configuration; |
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35 | |
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36 | rtems_cpu_table Cpu_table; |
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37 | |
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38 | char *rtems_progname; |
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39 | |
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40 | /* |
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41 | * Use the shared implementations of the following routines |
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42 | */ |
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43 | |
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44 | void bsp_postdriver_hook(void); |
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45 | void bsp_libc_init( void *, unsigned32, int ); |
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46 | void bsp_pretasking_hook(void); /* m68k version */ |
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47 | |
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48 | /* |
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49 | * bsp_start |
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50 | * |
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51 | * This routine does the bulk of the system initialization. |
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52 | */ |
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53 | |
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54 | void bsp_start( void ) |
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55 | { |
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56 | m68k_isr_entry *monitors_vector_table; |
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57 | int index; |
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58 | rtems_unsigned8 node_number; |
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59 | extern void *_WorkspaceBase; |
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60 | extern void *_RamSize; |
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61 | extern unsigned long _M68k_Ramsize; |
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62 | |
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63 | _M68k_Ramsize = (unsigned long)&_RamSize; /* RAM size set in linker script */ |
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64 | |
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65 | monitors_vector_table = (m68k_isr_entry *)0; /* 147Bug Vectors are at 0 */ |
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66 | m68k_set_vbr( monitors_vector_table ); |
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67 | |
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68 | for ( index=2 ; index<=255 ; index++ ) |
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69 | M68Kvec[ index ] = monitors_vector_table[ 32 ]; |
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70 | |
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71 | M68Kvec[ 2 ] = monitors_vector_table[ 2 ]; /* bus error vector */ |
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72 | M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */ |
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73 | M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */ |
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74 | M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */ |
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75 | |
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76 | m68k_set_vbr( &M68Kvec ); |
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77 | |
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78 | pcc->int_base_vector = PCC_BASE_VECTOR & 0xF0; |
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79 | /* Set the PCC int vectors base */ |
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80 | |
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81 | /* VME shared memory configuration */ |
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82 | /* Only the first node shares its top 128k DRAM */ |
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83 | |
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84 | vme_lcsr->utility_interrupt_vector = VME_BASE_VECTOR & 0xF8; |
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85 | /* Set VMEchip base interrupt vector */ |
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86 | vme_lcsr->utility_interrupt_mask |= 0x02; |
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87 | /* Enable SIGLP interruption (see shm support) */ |
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88 | pcc->general_purpose_control &= 0x10; |
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89 | /* Enable VME master interruptions */ |
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90 | |
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91 | if (vme_lcsr->system_controller & 0x01) { |
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92 | /* the board is system controller */ |
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93 | vme_lcsr->system_controller = 0x08; |
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94 | /* Make VME access round-robin */ |
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95 | } |
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96 | |
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97 | |
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98 | node_number = |
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99 | (rtems_unsigned8) |
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100 | (Configuration.User_multiprocessing_table->node - 1) & 0xF; |
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101 | /* Get and store node ID, first node_number = 0 */ |
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102 | vme_gcsr->board_identification = node_number; |
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103 | |
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104 | vme_lcsr->gcsr_base_address = node_number; |
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105 | /* Setup the base address of this board's gcsr */ |
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106 | vme_lcsr->timer_configuration = 0x6a; |
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107 | /* Enable VME time outs, maximum periods */ |
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108 | |
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109 | if (node_number == 0) { |
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110 | pcc->slave_base_address = 0x01; |
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111 | /* Set local DRAM base address on the VME bus to the DRAM size */ |
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112 | |
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113 | vme_lcsr->vme_bus_requester = 0x80; |
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114 | while (! (vme_lcsr->vme_bus_requester & 0x40)); |
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115 | /* Get VMEbus mastership */ |
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116 | vme_lcsr->slave_address_modifier = 0xfb; |
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117 | /* Share everything */ |
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118 | vme_lcsr->slave_configuration = 0x80; |
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119 | /* Share local DRAM */ |
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120 | vme_lcsr->vme_bus_requester = 0x0; |
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121 | /* release bus */ |
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122 | } else { |
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123 | pcc->slave_base_address = 0; |
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124 | /* Set local DRAM base address on the VME bus to 0 */ |
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125 | |
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126 | vme_lcsr->vme_bus_requester = 0x80; |
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127 | while (! (vme_lcsr->vme_bus_requester & 0x40)); |
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128 | /* Get VMEbus mastership */ |
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129 | vme_lcsr->slave_address_modifier = 0x08; |
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130 | /* Share only the short adress range */ |
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131 | vme_lcsr->slave_configuration = 0; |
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132 | /* Don't share local DRAM */ |
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133 | vme_lcsr->vme_bus_requester = 0x0; |
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134 | /* release bus */ |
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135 | } |
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136 | |
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137 | vme_lcsr->master_address_modifier = 0; |
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138 | /* Automatically set the address modifier */ |
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139 | vme_lcsr->master_configuration = 1; |
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140 | /* Disable D32 transfers : they don't work on my VMEbus rack */ |
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141 | |
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142 | m68k_enable_caching(); |
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143 | |
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144 | /* |
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145 | * we only use a hook to get the C library initialized. |
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146 | */ |
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147 | |
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148 | Cpu_table.pretasking_hook = bsp_pretasking_hook; /* init libc, etc. */ |
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149 | Cpu_table.postdriver_hook = bsp_postdriver_hook; |
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150 | Cpu_table.interrupt_vector_table = (m68k_isr_entry *) &M68Kvec; |
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151 | Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY; |
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152 | |
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153 | BSP_Configuration.work_space_start = (void *) &_WorkspaceBase; |
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154 | } |
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