source: rtems/c/src/lib/libbsp/m68k/mvme147/include/bsp.h @ 553aa5f

4.104.114.84.95
Last change on this file since 553aa5f was 553aa5f, checked in by Ralf Corsepius <ralf.corsepius@…>, on Apr 1, 2004 at 10:10:01 AM

2004-04-01 Ralf Corsepius <ralf_corsepius@…>

  • include/bsp.h: Include <rtems/clockdrv.h> instead of <clockdrv.h>.
  • startup/bspclean.c: Include <rtems/clockdrv.h> instead of <clockdrv.h>.
  • include/bsp.h: Include <rtems/console.h> instead of <console.h>.
  • include/bsp.h: Include <rtems/iosupp.h> instead of <iosupp.h>.
  • Property mode set to 100644
File size: 5.4 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all MVME147 board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  MVME147 port for TNI - Telecom Bretagne
13 *  by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr)
14 *  May 1996
15 *
16 *  $Id$
17 */
18
19#ifndef __MVME147_h
20#define __MVME147_h
21
22#ifdef __cplusplus
23extern "C" {
24#endif
25
26#include <bspopts.h>
27
28#include <rtems.h>
29#include <rtems/clockdrv.h>
30#include <rtems/console.h>
31#include <rtems/iosupp.h>
32
33/*
34 *  confdefs.h overrides for this BSP:
35 *   - number of termios serial ports (defaults to 1)
36 *   - Interrupt stack space is not minimum if defined.
37 */
38
39/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
40#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
41
42/* Constants */
43
44#define RAM_START 0x00005000
45#define RAM_END   0x00400000
46
47  /* MVME 147 Peripheral controller chip
48     see MVME147/D1, 3.4 */
49
50struct pcc_map {
51  /* 32 bit registers */
52  uint32_t         dma_table_address;            /* 0xfffe1000 */
53  uint32_t         dma_data_address;             /* 0xfffe1004 */
54  uint32_t         dma_bytecount;                /* 0xfffe1008 */
55  uint32_t         dma_data_holding;             /* 0xfffe100c */
56
57  /* 16 bit registers */
58  uint16_t         timer1_preload;               /* 0xfffe1010 */
59  uint16_t         timer1_count;                 /* 0xfffe1012 */
60  uint16_t         timer2_preload;               /* 0xfffe1014 */
61  uint16_t         timer2_count;                 /* 0xfffe1016 */
62
63  /* 8 bit registers */
64  uint8_t         timer1_int_control;            /* 0xfffe1018 */
65  uint8_t         timer1_control;                /* 0xfffe1019 */
66  uint8_t         timer2_int_control;            /* 0xfffe101a */
67  uint8_t         timer2_control;                /* 0xfffe101b */
68
69  uint8_t         acfail_int_control;            /* 0xfffe101c */
70  uint8_t         watchdog_control;              /* 0xfffe101d */
71
72  uint8_t         printer_int_control;           /* 0xfffe101e */
73  uint8_t         printer_control;               /* 0xfffe102f */
74
75  uint8_t         dma_int_control;               /* 0xfffe1020 */
76  uint8_t         dma_control;                   /* 0xfffe1021 */
77  uint8_t         bus_error_int_control;         /* 0xfffe1022 */
78  uint8_t         dma_status;                    /* 0xfffe1023 */
79  uint8_t         abort_int_control;             /* 0xfffe1024 */
80  uint8_t         table_address_function_code;   /* 0xfffe1025 */
81  uint8_t         serial_port_int_control;       /* 0xfffe1026 */
82  uint8_t         general_purpose_control;       /* 0xfffe1027 */
83  uint8_t         lan_int_control;               /* 0xfffe1028 */
84  uint8_t         general_purpose_status;        /* 0xfffe1029 */
85  uint8_t         scsi_port_int_control;         /* 0xfffe102a */
86  uint8_t         slave_base_address;            /* 0xfffe102b */
87  uint8_t         software_int_1_control;        /* 0xfffe102c */
88  uint8_t         int_base_vector;               /* 0xfffe102d */
89  uint8_t         software_int_2_control;        /* 0xfffe102e */
90  uint8_t         revision_level;                /* 0xfffe102f */
91};
92
93#define pcc      ((volatile struct pcc_map * const) 0xfffe1000)
94
95#define z8530 0xfffe3001
96
97
98/* interrupt vectors - see MVME146/D1 4.14 */
99#define PCC_BASE_VECTOR        0x40 /* First user int */
100#define SCC_VECTOR             PCC_BASE_VECTOR+3
101#define TIMER_1_VECTOR         PCC_BASE_VECTOR+8
102#define TIMER_2_VECTOR         PCC_BASE_VECTOR+9 
103#define SOFT_1_VECTOR          PCC_BASE_VECTOR+10
104#define SOFT_2_VECTOR          PCC_BASE_VECTOR+11
105
106#define USE_CHANNEL_A   1                /* 1 = use channel A for console */
107#define USE_CHANNEL_B   0                /* 1 = use channel B for console */
108
109#if (USE_CHANNEL_A == 1)
110#define CONSOLE_CONTROL  0xfffe3002
111#define CONSOLE_DATA     0xfffe3003
112#elif (USE_CHANNEL_B == 1)
113#define CONSOLE_CONTROL  0xfffe3000
114#define CONSOLE_DATA     0xfffe3001
115#endif
116
117
118
119#define FOREVER       1                  /* infinite loop */
120
121#ifdef M147_INIT
122#undef EXTERN
123#define EXTERN
124#else
125#undef EXTERN
126#define EXTERN extern
127#endif
128
129/*
130 *  Define the time limits for RTEMS Test Suite test durations.
131 *  Long test and short test duration limits are provided.  These
132 *  values are in seconds and need to be converted to ticks for the
133 *  application.
134 *
135 */
136
137#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
138#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
139
140/*
141 *  Define the interrupt mechanism for Time Test 27
142 *
143 *  NOTE: Use the MPCSR vector for the MVME147
144 */
145
146#define MUST_WAIT_FOR_INTERRUPT 0
147
148#define Install_tm27_vector( handler ) set_vector( (handler), \
149                                                   SOFT_1_VECTOR, 1 )
150
151#define Cause_tm27_intr()  pcc->software_int_1_control = 0x0c
152  /* generate level 4 sotware int. */
153
154#define Clear_tm27_intr()  pcc->software_int_1_control = 0x00
155
156#define Lower_tm27_intr()
157
158
159/* miscellaneous stuff assumed to exist */
160
161extern rtems_configuration_table BSP_Configuration;
162
163extern m68k_isr_entry M68Kvec[];   /* vector table address */
164
165/*
166 *  Device Driver Table Entries
167 */
168
169/*
170 * NOTE: Use the standard Console driver entry
171 */
172 
173/*
174 * NOTE: Use the standard Clock driver entry
175 */
176
177/* functions */
178
179void bsp_cleanup( void );
180
181m68k_isr_entry set_vector(
182  rtems_isr_entry     handler,
183  rtems_vector_number vector,
184  int                 type
185);
186
187#ifdef __cplusplus
188}
189#endif
190
191#endif
192/* end of include file */
193
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