1 | /* |
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2 | * COPYRIGHT (c) 1989-1999. |
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3 | * On-Line Applications Research Corporation (OAR). |
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4 | * |
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5 | * The license and distribution terms for this file may be |
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6 | * found in the file LICENSE in this distribution or at |
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7 | * http://www.rtems.org/license/LICENSE. |
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8 | */ |
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9 | |
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10 | #include <rtems/btimer.h> |
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11 | #include <bsp.h> |
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12 | #include <rtems/zilog/z8036.h> |
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13 | |
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14 | #define TIMER 0xfffb0000 /* address of Z8036 on MVME136 */ |
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15 | |
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16 | int Ttimer_val; |
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17 | bool benchmark_timer_find_average_overhead; |
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18 | |
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19 | rtems_isr timerisr(void); |
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20 | |
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21 | void benchmark_timer_initialize(void) |
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22 | { |
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23 | (void) set_vector( timerisr, 66, 0 ); /* install ISR */ |
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24 | |
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25 | Ttimer_val = 0; /* clear timer ISR count */ |
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26 | Z8x36_WRITE( TIMER, MASTER_INTR, 0x01 ); /* reset */ |
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27 | Z8x36_WRITE( TIMER, MASTER_INTR, 0x00 ); /* clear reset */ |
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28 | Z8x36_WRITE( TIMER, MASTER_INTR, 0xe2 ); /* disable lower chain, no vec */ |
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29 | /* set right justified addr */ |
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30 | /* and master int enable */ |
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31 | Z8x36_WRITE( TIMER, CT1_MODE_SPEC, 0x80 ); /* T1 continuous, and */ |
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32 | /* cycle/pulse output */ |
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33 | |
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34 | *((uint16_t*)0xfffb0016) = 0x0000; /* write countdown value */ |
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35 | /* |
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36 | Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 ); |
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37 | Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 ); |
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38 | */ |
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39 | Z8x36_WRITE( TIMER, MASTER_CFG, 0xc4 ); /* enable timer1 */ |
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40 | |
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41 | Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xc6 ); /* set INTR enable (IE), */ |
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42 | /* trigger command */ |
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43 | /* (TCB) and gate */ |
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44 | /* command (GCB) bits */ |
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45 | *((uint8_t*)0xfffb0038) &= 0xfd; /* enable timer INTR on */ |
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46 | /* VME controller */ |
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47 | } |
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48 | |
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49 | #define AVG_OVERHEAD 6 /* It typically takes 3.0 microseconds */ |
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50 | /* (6 countdowns) to start/stop the timer. */ |
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51 | #define LEAST_VALID 10 /* Don't trust a value lower than this */ |
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52 | |
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53 | benchmark_timer_t benchmark_timer_read(void) |
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54 | { |
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55 | /* |
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56 | uint8_t msb, lsb; |
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57 | */ |
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58 | uint32_t remaining, total; |
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59 | |
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60 | Z8x36_WRITE( TIMER, CT1_CMD_STATUS, 0xce ); /* read the counter value */ |
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61 | remaining = 0xffff - *((uint16_t*) 0xfffb0010); |
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62 | /* |
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63 | Z8x36_READ( TIMER, CT1_CUR_CNT_MSB, msb ); |
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64 | Z8x36_READ( TIMER, CT1_CUR_CNT_LSB, lsb ); |
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65 | |
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66 | remaining = 0xffff - ((msb << 8) + lsb); |
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67 | */ |
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68 | total = (Ttimer_val * 0x10000) + remaining; |
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69 | |
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70 | if ( benchmark_timer_find_average_overhead == true ) |
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71 | return total; /* in one-half microsecond units */ |
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72 | |
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73 | else { |
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74 | if ( total < LEAST_VALID ) |
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75 | return 0; /* below timer resolution */ |
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76 | return (total-AVG_OVERHEAD) >> 1; |
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77 | } |
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78 | } |
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79 | |
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80 | void benchmark_timer_disable_subtracting_average_overhead( |
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81 | bool find_flag |
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82 | ) |
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83 | { |
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84 | benchmark_timer_find_average_overhead = find_flag; |
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85 | } |
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