source: rtems/c/src/lib/libbsp/m68k/mvme136/timer/timer.c @ 67c191b2

4.9
Last change on this file since 67c191b2 was 67c191b2, checked in by Joel Sherrill <joel.sherrill@…>, on 09/30/08 at 16:28:39

2008-09-30 Joel Sherrill <joel.sherrill@…>

  • timer/timer.c: Eliminate uses of old benchmark timer names.
  • Property mode set to 100644
File size: 2.8 KB
Line 
1/*
2 *  COPYRIGHT (c) 1989-1999.
3 *  On-Line Applications Research Corporation (OAR).
4 *
5 *  The license and distribution terms for this file may be
6 *  found in the file LICENSE in this distribution or at
7 *  http://www.rtems.com/license/LICENSE.
8 *
9 *  $Id$
10 */
11
12#include <bsp.h>
13#include <rtems/zilog/z8036.h>
14
15#define TIMER 0xfffb0000   /* address of Z8036 on MVME136 */
16
17int Ttimer_val;
18bool benchmark_timer_find_average_overhead;
19
20rtems_isr timerisr(void);
21
22void benchmark_timer_initialize(void)
23{
24  (void) set_vector( timerisr, 66, 0 );       /* install ISR */
25
26  Ttimer_val = 0;                             /* clear timer ISR count */
27  Z8x36_WRITE( TIMER, MASTER_INTR, 0x01 ); /* reset */
28  Z8x36_WRITE( TIMER, MASTER_INTR, 0x00 ); /* clear reset */
29  Z8x36_WRITE( TIMER, MASTER_INTR, 0xe2 ); /* disable lower chain, no vec */
30                                           /*  set right justified addr */
31                                              /*  and master int enable */
32  Z8x36_WRITE( TIMER, CT1_MODE_SPEC,  0x80 ); /* T1 continuous, and   */
33                                              /* cycle/pulse output   */
34
35  *((uint16_t*)0xfffb0016) = 0x0000; /* write countdown value */
36/*
37  Z8x36_WRITE( TIMER, CT1_TIME_CONST_MSB, 0x00 );
38  Z8x36_WRITE( TIMER, CT1_TIME_CONST_LSB, 0x00 );
39*/
40  Z8x36_WRITE( TIMER, MASTER_CFG,         0xc4 ); /* enable timer1        */
41
42  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,     0xc6 ); /* set INTR enable (IE), */
43                                                 /*  trigger command      */
44                                                 /*  (TCB) and gate       */
45                                                 /* command (GCB) bits    */
46  *((uint8_t*)0xfffb0038) &= 0xfd;      /* enable timer INTR on  */
47                                                 /*    VME controller     */
48}
49
50#define AVG_OVERHEAD      6  /* It typically takes 3.0 microseconds */
51                             /* (6 countdowns) to start/stop the timer. */
52#define LEAST_VALID       10 /* Don't trust a value lower than this */
53
54int benchmark_timer_read(void)
55{
56/*
57  uint8_t          msb, lsb;
58*/
59  uint32_t         remaining, total;
60
61  Z8x36_WRITE( TIMER, CT1_CMD_STATUS,  0xce ); /* read the counter value */
62remaining = 0xffff - *((uint16_t*) 0xfffb0010);
63/*
64  Z8x36_READ(  TIMER, CT1_CUR_CNT_MSB, msb );
65  Z8x36_READ(  TIMER, CT1_CUR_CNT_LSB, lsb );
66
67  remaining = 0xffff - ((msb << 8) + lsb);
68*/
69  total = (Ttimer_val * 0x10000) + remaining;
70
71  if ( benchmark_timer_find_average_overhead == true )
72    return total;          /* in one-half microsecond units */
73
74  else {
75    if ( total < LEAST_VALID )
76      return 0;            /* below timer resolution */
77    return (total-AVG_OVERHEAD) >> 1;
78  }
79}
80
81void benchmark_timer_disable_subtracting_average_overhead(
82  bool find_flag
83)
84{
85  benchmark_timer_find_average_overhead = find_flag;
86}
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