source: rtems/c/src/lib/libbsp/m68k/mvme136/include/bsp.h @ bd9c3d1

4.104.114.84.95
Last change on this file since bd9c3d1 was bd9c3d1, checked in by Joel Sherrill <joel.sherrill@…>, on Apr 15, 1998 at 8:50:31 PM

Numerous changes which in total greatly reduced the amount of source
code in each BSP's bspstart.c. These changes were:

+ confdefs.h now knows libio's semaphore requirements
+ shared/main.c now copies Configuration to BSP_Configuration
+ shared/main.c fills in the Cpu_table with default values

This removed the need for rtems_libio_config() and the constant
BSP_LIBIO_MAX_FDS in every BSP. Plus now the maximum number of open
files can now be set on the gcc command line.

  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all MVME136 board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1998.
6 *  On-Line Applications Research Corporation (OAR).
7 *  Copyright assigned to U.S. Government, 1994.
8 *
9 *  The license and distribution terms for this file may be
10 *  found in the file LICENSE in this distribution or at
11 *  http://www.OARcorp.com/rtems/license.html.
12 *
13 *  $Id$
14 */
15
16#ifndef __MVME136_h
17#define __MVME136_h
18
19#ifdef __cplusplus
20extern "C" {
21#endif
22
23#include <rtems.h>
24#include <clockdrv.h>
25#include <console.h>
26#include <iosupp.h>
27
28/*
29 *  Define the time limits for RTEMS Test Suite test durations.
30 *  Long test and short test duration limits are provided.  These
31 *  values are in seconds and need to be converted to ticks for the
32 *  application.
33 *
34 */
35
36#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
37#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
38
39/*
40 *  Define the interrupt mechanism for Time Test 27
41 *
42 *  NOTE: Use the MPCSR vector for the MVME136
43 */
44
45#define MUST_WAIT_FOR_INTERRUPT 0
46
47#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 )
48
49#define Cause_tm27_intr()  (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x80
50
51#define Clear_tm27_intr()  (*(volatile rtems_unsigned8 *)0xfffb006b) = 0x00
52
53#define Lower_tm27_intr()
54
55/*
56 *  Simple spin delay in microsecond units for device drivers.
57 *  This is very dependent on the clock speed of the target.
58 */
59
60#define delay( microseconds ) \
61  { register rtems_unsigned32 _delay=(microseconds); \
62    register rtems_unsigned32 _tmp=123; \
63    asm volatile( "0: \
64                     nbcd      %0 ; \
65                     nbcd      %0 ; \
66                     dbf       %1,0b" \
67                  : "=d" (_tmp), "=d" (_delay) \
68                  : "0"  (_tmp), "1"  (_delay) ); \
69  }
70
71/* Constants */
72
73#define RAM_START 0
74#define RAM_END   0x100000
75
76#define M681ADDR      0xfffb0040         /* address of the M68681 chip */
77#define RXRDYB        0x01               /* status reg recv ready mask */
78#define TXRDYB        0x04               /* status reg trans ready mask */
79#define PARITYERR     0x20               /* status reg parity error mask */
80#define FRAMEERR      0x40               /* status reg frame error mask */
81
82
83#define FOREVER       1                  /* infinite loop */
84
85/* Structures */
86
87struct r_m681_info {
88  char fill1[ 5 ];                       /* channel A regs ( not used ) */
89  char isr;                              /* interrupt status reg */
90  char fill2[ 2 ];                       /* counter regs (not used) */
91  char mr1mr2b;                          /* MR1B and MR2B regs */
92  char srb;                              /* status reg channel B */
93  char fill3;                            /* do not access */
94  char rbb;                              /* receive buffer channel B */
95  char ivr;                              /* interrupt vector register */
96};
97
98struct w_m681_info {
99  char fill1[ 4 ];                       /* channel A regs (not used) */
100  char acr;                              /* auxillary control reg */
101  char imr;                              /* interrupt mask reg */
102  char fill2[ 2 ];                       /* counter regs (not used) */
103  char mr1mr2b;                          /* MR1B and MR2B regs */
104  char csrb;                             /* clock select reg */
105  char crb;                              /* command reg */
106  char tbb;                              /* transmit buffer channel B */
107  char ivr;                              /* interrupt vector register */
108};
109
110#ifdef M136_INIT
111#undef EXTERN
112#define EXTERN
113#else
114#undef EXTERN
115#define EXTERN extern
116#endif
117
118/* miscellaneous stuff assumed to exist */
119
120extern rtems_configuration_table BSP_Configuration;
121
122/* M68681 DUART chip register variables */
123
124EXTERN volatile struct r_m681_info *_Read_m681;  /* M68681 read registers */
125EXTERN volatile struct w_m681_info *_Write_m681; /* M68681 write registers */
126
127extern m68k_isr_entry M68Kvec[];   /* vector table address */
128
129/*
130 *  Device Driver Table Entries
131 */
132
133/*
134 * NOTE: Use the standard Console driver entry
135 */
136 
137/*
138 * NOTE: Use the standard Clock driver entry
139 */
140
141/* functions */
142
143void bsp_cleanup( void );
144
145m68k_isr_entry set_vector(
146  rtems_isr_entry     handler,
147  rtems_vector_number vector,
148  int                 type
149);
150
151#ifdef __cplusplus
152}
153#endif
154
155#endif
156/* end of include file */
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