source: rtems/c/src/lib/libbsp/m68k/mvme136/include/bsp.h @ 162ffb4

4.104.114.84.95
Last change on this file since 162ffb4 was 162ffb4, checked in by Ralf Corsepius <ralf.corsepius@…>, on Mar 31, 2004 at 4:42:37 AM

2004-03-31 Ralf Corsepius <ralf_corsepius@…>

  • clock/ckinit.c, include/bsp.h, shmsupp/getcfg.c, shmsupp/lock.c, shmsupp/mpisr.c, startup/bspstart.c, timer/timer.c: Convert to using c99 fixed size types.
  • Property mode set to 100644
File size: 4.5 KB
Line 
1/*  bsp.h
2 *
3 *  This include file contains all MVME136 board IO definitions.
4 *
5 *  COPYRIGHT (c) 1989-1999.
6 *  On-Line Applications Research Corporation (OAR).
7 *
8 *  The license and distribution terms for this file may be
9 *  found in the file LICENSE in this distribution or at
10 *  http://www.rtems.com/license/LICENSE.
11 *
12 *  $Id$
13 */
14
15#ifndef __MVME136_h
16#define __MVME136_h
17
18#ifdef __cplusplus
19extern "C" {
20#endif
21
22#include <bspopts.h>
23
24#include <rtems.h>
25#include <clockdrv.h>
26#include <console.h>
27#include <iosupp.h>
28
29/*
30 *  confdefs.h overrides for this BSP:
31 *   - number of termios serial ports (defaults to 1)
32 *   - Interrupt stack space is not minimum if defined.
33 */
34
35/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
36#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
37
38/*
39 *  Define the time limits for RTEMS Test Suite test durations.
40 *  Long test and short test duration limits are provided.  These
41 *  values are in seconds and need to be converted to ticks for the
42 *  application.
43 *
44 */
45
46#define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
47#define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
48
49/*
50 *  Define the interrupt mechanism for Time Test 27
51 *
52 *  NOTE: Use the MPCSR vector for the MVME136
53 */
54
55#define MUST_WAIT_FOR_INTERRUPT 0
56
57#define Install_tm27_vector( handler ) set_vector( (handler), 75, 1 )
58
59#define Cause_tm27_intr()  (*(volatile uint8_t*)0xfffb006b) = 0x80
60
61#define Clear_tm27_intr()  (*(volatile uint8_t*)0xfffb006b) = 0x00
62
63#define Lower_tm27_intr()
64
65/*
66 *  Simple spin delay in microsecond units for device drivers.
67 *  This is very dependent on the clock speed of the target.
68 */
69
70#define rtems_bsp_delay( microseconds ) \
71  { register uint32_t         _delay=(microseconds); \
72    register uint32_t         _tmp=123; \
73    asm volatile( "0: \
74                     nbcd      %0 ; \
75                     nbcd      %0 ; \
76                     dbf       %1,0b" \
77                  : "=d" (_tmp), "=d" (_delay) \
78                  : "0"  (_tmp), "1"  (_delay) ); \
79  }
80
81/* Constants */
82
83#define RAM_START 0
84#define RAM_END   0x100000
85
86#define M681ADDR      0xfffb0040         /* address of the M68681 chip */
87#define RXRDYB        0x01               /* status reg recv ready mask */
88#define TXRDYB        0x04               /* status reg trans ready mask */
89#define PARITYERR     0x20               /* status reg parity error mask */
90#define FRAMEERR      0x40               /* status reg frame error mask */
91
92
93#define FOREVER       1                  /* infinite loop */
94
95/* Structures */
96
97struct r_m681_info {
98  char fill1[ 5 ];                       /* channel A regs ( not used ) */
99  char isr;                              /* interrupt status reg */
100  char fill2[ 2 ];                       /* counter regs (not used) */
101  char mr1mr2b;                          /* MR1B and MR2B regs */
102  char srb;                              /* status reg channel B */
103  char fill3;                            /* do not access */
104  char rbb;                              /* receive buffer channel B */
105  char ivr;                              /* interrupt vector register */
106};
107
108struct w_m681_info {
109  char fill1[ 4 ];                       /* channel A regs (not used) */
110  char acr;                              /* auxillary control reg */
111  char imr;                              /* interrupt mask reg */
112  char fill2[ 2 ];                       /* counter regs (not used) */
113  char mr1mr2b;                          /* MR1B and MR2B regs */
114  char csrb;                             /* clock select reg */
115  char crb;                              /* command reg */
116  char tbb;                              /* transmit buffer channel B */
117  char ivr;                              /* interrupt vector register */
118};
119
120#ifdef M136_INIT
121#undef EXTERN
122#define EXTERN
123#else
124#undef EXTERN
125#define EXTERN extern
126#endif
127
128/* miscellaneous stuff assumed to exist */
129
130extern rtems_configuration_table BSP_Configuration;
131
132/* M68681 DUART chip register variables */
133
134EXTERN volatile struct r_m681_info *_Read_m681;  /* M68681 read registers */
135EXTERN volatile struct w_m681_info *_Write_m681; /* M68681 write registers */
136
137extern m68k_isr_entry M68Kvec[];   /* vector table address */
138
139/*
140 *  Device Driver Table Entries
141 */
142
143/*
144 * NOTE: Use the standard Console driver entry
145 */
146 
147/*
148 * NOTE: Use the standard Clock driver entry
149 */
150
151/* functions */
152
153void bsp_cleanup( void );
154
155m68k_isr_entry set_vector(
156  rtems_isr_entry     handler,
157  rtems_vector_number vector,
158  int                 type
159);
160
161#ifdef __cplusplus
162}
163#endif
164
165#endif
166/* end of include file */
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