[ac7d5ef0] | 1 | /* Clock_init() |
---|
| 2 | * |
---|
| 3 | * This routine initializes the Z80386 1 on the MVME136 board. |
---|
| 4 | * The tick frequency is 1 millisecond. |
---|
| 5 | * |
---|
| 6 | * Input parameters: NONE |
---|
| 7 | * |
---|
| 8 | * Output parameters: NONE |
---|
| 9 | * |
---|
[08311cc3] | 10 | * COPYRIGHT (c) 1989-1999. |
---|
[ac7d5ef0] | 11 | * On-Line Applications Research Corporation (OAR). |
---|
| 12 | * |
---|
[98e4ebf5] | 13 | * The license and distribution terms for this file may be |
---|
| 14 | * found in the file LICENSE in this distribution or at |
---|
[9977ac6] | 15 | * http://www.rtems.com/license/LICENSE. |
---|
[ac7d5ef0] | 16 | * |
---|
| 17 | * $Id$ |
---|
| 18 | */ |
---|
| 19 | |
---|
| 20 | #include <stdlib.h> |
---|
| 21 | |
---|
| 22 | #include <bsp.h> |
---|
[3a4ae6c] | 23 | #include <rtems/libio.h> |
---|
[bab5ff96] | 24 | #include <rtems/zilog/z8036.h> |
---|
[ac7d5ef0] | 25 | |
---|
| 26 | #define MICRVAL 0xe2 /* disable lower chain, no vec */ |
---|
| 27 | /* set right justified addr */ |
---|
| 28 | /* and master int enable */ |
---|
| 29 | #define MCCRVAL 0xc4 /* enable T1 and port B */ |
---|
| 30 | /* timers independent */ |
---|
| 31 | #define MS_COUNT 0x07d0 /* T1's countdown constant (1 ms) */ |
---|
| 32 | #define T1MSRVAL 0x80 /* T1 cont. cycle/pulse output */ |
---|
| 33 | #define T1CSRVAL 0xc6 /* enable interrupt, allow and */ |
---|
| 34 | /* and trigger countdown */ |
---|
| 35 | |
---|
[3a4ae6c] | 36 | #define TIMER 0xfffb0000 |
---|
| 37 | #define RELOAD 0x24 /* clr IP & IUS,allow countdown */ |
---|
[6128a4a] | 38 | |
---|
[3a4ae6c] | 39 | #define CLOCK_VECTOR 66 |
---|
| 40 | |
---|
[162ffb4] | 41 | uint32_t Clock_isrs; /* ISRs until next tick */ |
---|
[3a4ae6c] | 42 | |
---|
[162ffb4] | 43 | volatile uint32_t Clock_driver_ticks; /* ticks since initialization */ |
---|
[3a4ae6c] | 44 | |
---|
[ac7d5ef0] | 45 | rtems_isr_entry Old_ticker; |
---|
| 46 | |
---|
[3a4ae6c] | 47 | void Clock_exit( void ); |
---|
[ac7d5ef0] | 48 | |
---|
[3a4ae6c] | 49 | /* |
---|
| 50 | * These are set by clock driver during its init |
---|
| 51 | */ |
---|
[6128a4a] | 52 | |
---|
[3a4ae6c] | 53 | rtems_device_major_number rtems_clock_major = ~0; |
---|
| 54 | rtems_device_minor_number rtems_clock_minor; |
---|
[6128a4a] | 55 | |
---|
[3a4ae6c] | 56 | /* |
---|
| 57 | * ISR Handler |
---|
| 58 | */ |
---|
[6128a4a] | 59 | |
---|
[3a4ae6c] | 60 | rtems_isr Clock_isr( |
---|
| 61 | rtems_vector_number vector |
---|
[ac7d5ef0] | 62 | ) |
---|
| 63 | { |
---|
[3a4ae6c] | 64 | Clock_driver_ticks += 1; |
---|
| 65 | ((volatile struct z8036_map *) TIMER)->CT1_CMD_STATUS = RELOAD; |
---|
[ac7d5ef0] | 66 | |
---|
[3a4ae6c] | 67 | if ( Clock_isrs == 1 ) { |
---|
| 68 | rtems_clock_tick(); |
---|
[12bd47e] | 69 | Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000; |
---|
[3a4ae6c] | 70 | } |
---|
| 71 | else |
---|
| 72 | Clock_isrs -= 1; |
---|
[ac7d5ef0] | 73 | } |
---|
| 74 | |
---|
| 75 | void Install_clock( |
---|
| 76 | rtems_isr_entry clock_isr |
---|
| 77 | ) |
---|
| 78 | { |
---|
| 79 | volatile struct z8036_map *timer; |
---|
| 80 | |
---|
| 81 | Clock_driver_ticks = 0; |
---|
[12bd47e] | 82 | Clock_isrs = rtems_configuration_get_microseconds_per_tick() / 1000; |
---|
[ac7d5ef0] | 83 | |
---|
[0dd1d44] | 84 | Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 ); |
---|
| 85 | timer = (struct z8036_map *) 0xfffb0000; |
---|
| 86 | timer->MASTER_INTR = MICRVAL; |
---|
| 87 | timer->CT1_MODE_SPEC = T1MSRVAL; |
---|
[ac7d5ef0] | 88 | |
---|
[162ffb4] | 89 | *((uint16_t*)0xfffb0016) = MS_COUNT; /* write countdown value */ |
---|
[3a4ae6c] | 90 | |
---|
[0dd1d44] | 91 | /* |
---|
| 92 | * timer->CT1_TIME_CONST_MSB = (MS_COUNT >> 8); |
---|
| 93 | * timer->CT1_TIME_CONST_LSB = (MS_COUNT & 0xff); |
---|
| 94 | */ |
---|
[3a4ae6c] | 95 | |
---|
[0dd1d44] | 96 | timer->MASTER_CFG = MCCRVAL; |
---|
| 97 | timer->CT1_CMD_STATUS = T1CSRVAL; |
---|
[ac7d5ef0] | 98 | |
---|
[0dd1d44] | 99 | /* |
---|
| 100 | * Enable interrupt via VME interrupt mask register |
---|
| 101 | */ |
---|
[162ffb4] | 102 | (*(uint8_t*)0xfffb0038) &= 0xfd; |
---|
[ac7d5ef0] | 103 | |
---|
[0dd1d44] | 104 | atexit( Clock_exit ); |
---|
[ac7d5ef0] | 105 | } |
---|
| 106 | |
---|
| 107 | void Clock_exit( void ) |
---|
| 108 | { |
---|
| 109 | volatile struct z8036_map *timer; |
---|
| 110 | |
---|
[0dd1d44] | 111 | timer = (struct z8036_map *) 0xfffb0000; |
---|
| 112 | timer->MASTER_INTR = 0x62; |
---|
| 113 | timer->CT1_MODE_SPEC = 0x00; |
---|
| 114 | timer->MASTER_CFG = 0xf4; |
---|
| 115 | timer->CT1_CMD_STATUS = 0x00; |
---|
| 116 | /* do not restore old vector */ |
---|
[ac7d5ef0] | 117 | } |
---|
[3a4ae6c] | 118 | |
---|
| 119 | rtems_device_driver Clock_initialize( |
---|
| 120 | rtems_device_major_number major, |
---|
| 121 | rtems_device_minor_number minor, |
---|
| 122 | void *pargp |
---|
| 123 | ) |
---|
| 124 | { |
---|
| 125 | Install_clock( Clock_isr ); |
---|
| 126 | |
---|
| 127 | /* |
---|
| 128 | * make major/minor avail to others such as shared memory driver |
---|
| 129 | */ |
---|
| 130 | |
---|
| 131 | rtems_clock_major = major; |
---|
| 132 | rtems_clock_minor = minor; |
---|
[6128a4a] | 133 | |
---|
[3a4ae6c] | 134 | return RTEMS_SUCCESSFUL; |
---|
| 135 | } |
---|