[70f5ab38] | 1 | /** |
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| 2 | * @file |
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| 3 | * |
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| 4 | * MRM332 C Start Up Code |
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| 5 | */ |
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| 6 | |
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[274fa77] | 7 | /* |
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[70f5ab38] | 8 | * COPYRIGHT (c) 2000. |
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| 9 | * Matt Cross <profesor@gweep.net> |
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| 10 | * |
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| 11 | * The license and distribution terms for this file may be |
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| 12 | * found in the file LICENSE in this distribution or at |
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| 13 | * http://www.rtems.com/license/LICENSE. |
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| 14 | * |
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[274fa77] | 15 | */ |
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| 16 | |
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| 17 | #include <mrm332.h> |
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[e2d51fc4] | 18 | #include <rtems/m68k/sim.h> |
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[274fa77] | 19 | #define __START_C__ |
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| 20 | #include "bsp.h" |
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| 21 | |
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[1fec9e0] | 22 | rtems_isr_entry M68Kvec[256]; |
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| 23 | rtems_isr_entry vectors[256]; |
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[274fa77] | 24 | |
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[c5612edf] | 25 | void boot_card(const char *cmdline); |
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[274fa77] | 26 | |
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| 27 | /* |
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| 28 | * This prototype really should have the noreturn attribute but |
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| 29 | * that causes a warning. Not sure how to fix that. |
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| 30 | */ |
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| 31 | /* void dumby_start () __attribute__ ((noreturn)); */ |
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[4377b904] | 32 | void start_c(void); |
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[274fa77] | 33 | |
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[4377b904] | 34 | void start_c(void) { |
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[274fa77] | 35 | |
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| 36 | /* Synthesizer Control Register */ |
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| 37 | /* see section(s) 4.8 */ |
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| 38 | /* end include in ram_init.S */ |
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| 39 | *SYNCR = (unsigned short int) |
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| 40 | ( SAM(MRM_W,15,VCO) | SAM(0x0,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) ); |
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| 41 | while (! (*SYNCR & SLOCK)); /* protect from clock overshoot */ |
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| 42 | /* include in ram_init.S */ |
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| 43 | *SYNCR = (unsigned short int) |
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| 44 | ( SAM(MRM_W,15,VCO) | SAM(MRM_X,14,PRESCALE) | SAM(MRM_Y,8,COUNTER) ); |
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| 45 | |
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| 46 | /* System Protection Control Register */ |
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| 47 | /* !!! can only write to once after reset !!! */ |
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| 48 | /* see section 3.8.4 of the SIM Reference Manual */ |
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| 49 | *SYPCR = (unsigned char)( HME | BME ); |
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| 50 | |
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| 51 | /* Periodic Interrupr Control Register */ |
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| 52 | /* see section 3.8.2 of the SIM Reference Manual */ |
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| 53 | *PICR = (unsigned short int) |
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| 54 | ( SAM(0,8,PIRQL) | SAM(MRM_PIV,0,PIV) ); |
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| 55 | /* ^^^ zero disables interrupt, don't enable here or ram_init will |
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| 56 | be wrong. It's enabled below. */ |
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| 57 | |
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| 58 | /* Periodic Interrupt Timer Register */ |
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| 59 | /* see section 3.8.3 of the SIM Reference Manual */ |
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| 60 | *PITR = (unsigned short int)( SAM(0x09,0,PITM) ); |
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| 61 | /* 1.098mS interrupt, assuming 32.768 KHz input clock */ |
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| 62 | |
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| 63 | /* Port C Data */ |
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| 64 | /* load values before enabled */ |
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| 65 | *PORTC = (unsigned char) 0x0; |
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| 66 | |
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| 67 | /* Port E and F Data Register */ |
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| 68 | /* see section 9 of the SIM Reference Manual */ |
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| 69 | *PORTE0 = (unsigned char) 0; |
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| 70 | *PORTF0 = (unsigned char) 0; |
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| 71 | |
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| 72 | /* Port E and F Data Direction Register */ |
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| 73 | /* see section 9 of the SIM Reference Manual */ |
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| 74 | *DDRE = (unsigned char) 0xff; |
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| 75 | *DDRF = (unsigned char) 0xfd; |
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[6128a4a] | 76 | |
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[274fa77] | 77 | /* Port E and F Pin Assignment Register */ |
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| 78 | /* see section 9 of the SIM Reference Manual */ |
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| 79 | *PEPAR = (unsigned char) 0; |
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| 80 | *PFPAR = (unsigned char) 0; |
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| 81 | |
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| 82 | /* end of SIM initalization code */ |
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| 83 | /* end include in ram_init.S */ |
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| 84 | |
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| 85 | /* |
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| 86 | * Initialize RAM by copying the .data section out of ROM (if |
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| 87 | * needed) and "zero-ing" the .bss section. |
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| 88 | */ |
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| 89 | { |
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| 90 | register char *src = _etext; |
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| 91 | register char *dst = _copy_start; |
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| 92 | |
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| 93 | if (_copy_data_from_rom) |
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| 94 | /* ROM has data at end of text; copy it. */ |
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| 95 | while (dst < _edata) |
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| 96 | *dst++ = *src++; |
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[6128a4a] | 97 | |
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[274fa77] | 98 | /* Zero bss */ |
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| 99 | for (dst = _clear_start; dst< end; dst++) |
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| 100 | { |
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| 101 | *dst = 0; |
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| 102 | } |
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| 103 | } |
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| 104 | |
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| 105 | /* |
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| 106 | * Initialize vector table. |
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| 107 | */ |
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| 108 | { |
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[1fec9e0] | 109 | rtems_isr_entry *monitors_vector_table; |
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[274fa77] | 110 | |
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| 111 | m68k_get_vbr(monitors_vector_table); |
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| 112 | |
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| 113 | M68Kvec[ 4 ] = monitors_vector_table[ 4 ]; /* breakpoints vector */ |
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| 114 | M68Kvec[ 9 ] = monitors_vector_table[ 9 ]; /* trace vector */ |
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| 115 | M68Kvec[ 31 ] = monitors_vector_table[ 31 ]; /* level 7 interrupt */ |
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| 116 | M68Kvec[ 47 ] = monitors_vector_table[ 47 ]; /* system call vector */ |
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| 117 | M68Kvec[ 66 ] = monitors_vector_table[ 66 ]; /* user defined */ |
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[6128a4a] | 118 | |
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[274fa77] | 119 | m68k_set_vbr(&M68Kvec); |
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| 120 | } |
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| 121 | |
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| 122 | /* |
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| 123 | * Initalize the board. |
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| 124 | */ |
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[6128a4a] | 125 | |
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[c218824d] | 126 | /* Spurious should be called in the predriver hook */ |
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| 127 | /* Spurious_Initialize(); */ |
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[da2fc6c0] | 128 | /*console_init(); */ |
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[274fa77] | 129 | |
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| 130 | /* |
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| 131 | * Execute main with arguments argc and agrv. |
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| 132 | */ |
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[c5612edf] | 133 | boot_card((void*)0); |
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[274fa77] | 134 | reboot(); |
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| 135 | |
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| 136 | } |
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