source: rtems/c/src/lib/libbsp/m68k/mrm332/include/mrm332.h @ f05b2ac

4.104.114.84.95
Last change on this file since f05b2ac was f05b2ac, checked in by Ralf Corsepius <ralf.corsepius@…>, on 04/21/04 at 16:01:48

Remove duplicate white lines.

  • Property mode set to 100644
File size: 1.5 KB
Line 
1/*  mrm332.h
2 *
3 *  $Id$
4 */
5
6#ifndef _MRM332_H_
7#define _MRM332_H_
8
9/* SIM_MM (SIM Module Mapping) determines the location of the control
10   register block. When MM=0, register addresses range fom 0x7ff000 to
11   0x7FFFFF. When MM=1, register addresses range from 0xfff000 to
12   0xffffff. */
13#define SIM_MM 1
14
15/* Interrupt related definitions */
16#define SIM_IARB 15
17#define QSM_IARB 10
18
19#define MRM_PIV 64
20#define ISRL_PIT 4              /* zero disables PIT */
21
22#define EFI_QIVR 66             /* 66=>SCI and 67=>QSPI interrupt */
23#define ISRL_QSPI 0
24
25#define EFI_SPINT 24            /* spurious interrupt */
26#define EFI_INT1 25             /* CTS interrupt */
27#define ISRL_SCI 6
28
29/* System Clock definitions */
30#define XTAL 32768.0            /* crystal frequency in Hz */
31
32#if 0
33/* Default MRM clock rate (8.388688 MHz) set by CPU32: */
34#define MRM_W 0                 /* system clock parameters */
35#define MRM_X 0
36#define MRM_Y 0x3f
37#endif
38
39#if 1
40/* 16.77722 MHz: */
41#define MRM_W 1                 /* system clock parameters */
42#define MRM_X 1
43#define MRM_Y 0x0f
44#endif
45
46#if 0
47/* 25.16582 MHz: */
48#define MRM_W 1                 /* system clock parameters */
49#define MRM_X 1
50#define MRM_Y 0x17
51#endif
52
53#define SYS_CLOCK (XTAL*4.0*(MRM_Y+1)*(1 << (2*MRM_W+MRM_X)))
54#define SCI_BAUD 19200          /* RS232 Baud Rate */
55
56/* macros/functions */
57
58#ifndef ASM
59
60/*
61 *  This prototype really should have the noreturn attribute but
62 *  that causes a warning. Not sure how to fix that.
63 */
64/*   static void reboot(void) __attribute__ ((noreturn)); */
65static void reboot(void);
66__inline__ static void reboot() {asm("trap #15; .word 0x0063");}
67
68#endif /* ASM */
69
70#endif /* _MRM_H_ */
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