4.104.115
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1 | /* |
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2 | * BSP startup |
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3 | * |
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4 | * This routine starts the application. It includes application, |
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5 | * board, and monitor specific initialization and configuration. |
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6 | * The generic CPU dependent initialization has been performed |
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7 | * before this routine is invoked. |
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8 | * |
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9 | * Author: |
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10 | * David Fiddes, D.J@fiddes.surfaid.org |
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11 | * http://www.calm.hw.ac.uk/davidf/coldfire/ |
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12 | * |
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13 | * COPYRIGHT (c) 1989-1998. |
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14 | * On-Line Applications Research Corporation (OAR). |
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15 | * |
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16 | * The license and distribution terms for this file may be |
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17 | * found in the file LICENSE in this distribution or at |
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18 | * http://www.rtems.com/license/LICENSE. |
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19 | * |
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20 | * $Id$ |
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21 | */ |
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22 | |
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23 | #include <bsp.h> |
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24 | #include <rtems/rtems/cache.h> |
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25 | |
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26 | /* |
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27 | * bsp_start |
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28 | * |
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29 | * This routine does the bulk of the system initialisation. |
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30 | */ |
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31 | void bsp_start(void) |
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32 | { |
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33 | /* cfinit invalidates cache and sets acr registers */ |
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34 | |
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35 | /* |
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36 | * Enable the cache, we only need to enable the instruction cache as the |
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37 | * 532x has a unified data and instruction cache. |
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38 | */ |
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39 | rtems_cache_enable_instruction(); |
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40 | } |
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41 | |
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42 | uint32_t bsp_get_CPU_clock_speed(void) |
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43 | { |
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44 | return 240000000; |
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45 | } |
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46 | |
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47 | uint32_t bsp_get_BUS_clock_speed(void) |
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48 | { |
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49 | return 80000000; |
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50 | } |
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