source: rtems/c/src/lib/libbsp/m68k/mcf5329/network/network.c @ 6b56ec3

4.104.114.95
Last change on this file since 6b56ec3 was 6b56ec3, checked in by Joel Sherrill <joel.sherrill@…>, on 06/20/08 at 14:58:34

2008-06-20 Matthew Riek <matthew.riek@…>

  • ChangeLog?, Makefile.am, README, bsp_specs, configure.ac, gdb-init, preinstall.am, clock/clock.c, console/console.c, include/bsp.h, include/bspopts.h.in, include/coverhd.h, include/tm27.h, network/network.c, start/start.S, startup/bspclean.c, startup/bspstart.c, startup/cfinit.c, startup/init5329.c, startup/linkcmds, startup/linkcmdsflash, timer/timer.c: New files.
  • Property mode set to 100644
File size: 22.4 KB
Line 
1
2/*
3 * RTEMS/TCPIP driver for MCF5329 Fast Ethernet Controller
4 *
5 * TO DO: Check network stack code -- force longword alignment of all tx mbufs?
6 */
7
8#include <bsp.h>
9#include <stdio.h>
10#include <errno.h>
11#include <stdarg.h>
12#include <string.h>
13#include <rtems.h>
14#include <rtems/error.h>
15#include <rtems/rtems_bsdnet.h>
16
17#include <sys/param.h>
18#include <sys/mbuf.h>
19#include <sys/socket.h>
20#include <sys/sockio.h>
21
22#include <net/ethernet.h>
23#include <net/if.h>
24
25#include <netinet/in.h>
26#include <netinet/if_ether.h>
27
28/*
29 * Number of interfaces supported by this driver
30 */
31#define NIFACES 1
32
33#define FEC_INTC0_TX_VECTOR (64+36)
34#define FEC_INTC0_RX_VECTOR (64+40)
35
36/*
37 * Default number of buffer descriptors set aside for this driver.
38 * The number of transmit buffer descriptors has to be quite large
39 * since a single frame often uses three or more buffer descriptors.
40 */
41#define RX_BUF_COUNT     32
42#define TX_BUF_COUNT     20
43#define TX_BD_PER_BUF    3
44
45#define INET_ADDR_MAX_BUF_SIZE (sizeof "255.255.255.255")
46
47/*
48 * RTEMS event used by interrupt handler to signal daemons.
49 * This must *not* be the same event used by the TCP/IP task synchronization.
50 */
51#define TX_INTERRUPT_EVENT RTEMS_EVENT_1
52#define RX_INTERRUPT_EVENT RTEMS_EVENT_1
53
54/*
55 * RTEMS event used to start transmit daemon.
56 * This must not be the same as INTERRUPT_EVENT.
57 */
58#define START_TRANSMIT_EVENT RTEMS_EVENT_2
59
60/*
61 * Receive buffer size -- Allow for a full ethernet packet plus CRC (1518).
62 * Round off to nearest multiple of RBUF_ALIGN.
63 */
64#define MAX_MTU_SIZE    1518
65#define RBUF_ALIGN      4
66#define RBUF_SIZE       ((MAX_MTU_SIZE + RBUF_ALIGN) & ~RBUF_ALIGN)
67
68#if (MCLBYTES < RBUF_SIZE)
69#  error "Driver must have MCLBYTES > RBUF_SIZE"
70#endif
71
72typedef struct mcf5329BufferDescriptor_
73{
74  volatile uint16_t status;
75  uint16_t length;
76  volatile void *buffer;
77} mcf5329BufferDescriptor_t;
78
79/*
80 * Per-device data
81 */
82struct mcf5329_enet_struct
83{
84  struct arpcom arpcom;
85  struct mbuf **rxMbuf;
86  struct mbuf **txMbuf;
87  int acceptBroadcast;
88  int rxBdCount;
89  int txBdCount;
90  int txBdHead;
91  int txBdTail;
92  int txBdActiveCount;
93  mcf5329BufferDescriptor_t *rxBdBase;
94  mcf5329BufferDescriptor_t *txBdBase;
95  rtems_id rxDaemonTid;
96  rtems_id txDaemonTid;
97
98  /*
99   * Statistics
100   */
101  unsigned long rxInterrupts;
102  unsigned long txInterrupts;
103  unsigned long txRawWait;
104  unsigned long txRealign;
105};
106static struct mcf5329_enet_struct enet_driver[NIFACES];
107
108static rtems_isr mcf5329_fec_rx_interrupt_handler(rtems_vector_number v)
109{
110  MCF_FEC_EIR = MCF_FEC_EIR_RXF;
111  MCF_FEC_EIMR &= ~MCF_FEC_EIMR_RXF;
112  enet_driver[0].rxInterrupts++;
113  rtems_event_send(enet_driver[0].rxDaemonTid, RX_INTERRUPT_EVENT);
114}
115
116static rtems_isr mcf5329_fec_tx_interrupt_handler(rtems_vector_number v)
117{
118  MCF_FEC_EIR = MCF_FEC_EIR_TXF;
119  MCF_FEC_EIMR &= ~MCF_FEC_EIMR_TXF;
120  enet_driver[0].txInterrupts++;
121  rtems_event_send(enet_driver[0].txDaemonTid, TX_INTERRUPT_EVENT);
122}
123
124/*
125 * Allocate buffer descriptors from (non-cached) on-chip static RAM
126 * Ensure 128-bit (16-byte) alignment
127 */
128static mcf5329BufferDescriptor_t *mcf5329_bd_allocate(unsigned int count)
129{
130  extern char _CoreSRamBase[];
131  static mcf5329BufferDescriptor_t *bdp =
132    (mcf5329BufferDescriptor_t *) _CoreSRamBase;
133  mcf5329BufferDescriptor_t *p = bdp;
134
135  bdp += count;
136  if ((int) bdp & 0xF)
137    bdp =
138      (mcf5329BufferDescriptor_t *) ((char *) bdp + (16 - ((int) bdp & 0xF)));
139  return p;
140}
141
142#if UNUSED
143
144/*
145 * Read MII register
146 * Busy-waits, but transfer time should be short!
147 */
148static int getMII(int phyNumber, int regNumber)
149{
150  MCF_FEC_MMFR = (0x1 << 30) |
151    (0x2 << 28) | (phyNumber << 23) | (regNumber << 18) | (0x2 << 16);
152  while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) ;
153  MCF_FEC_EIR = MCF_FEC_EIR_MII;
154  return MCF_FEC_MMFR & 0xFFFF;
155}
156#endif
157
158/*
159 * Write MII register
160 * Busy-waits, but transfer time should be short!
161 */
162static void setMII(int phyNumber, int regNumber, int value)
163{
164  MCF_FEC_MMFR = (0x1 << 30) |
165    (0x1 << 28) |
166    (phyNumber << 23) | (regNumber << 18) | (0x2 << 16) | (value & 0xFFFF);
167  while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) ;
168  MCF_FEC_EIR = MCF_FEC_EIR_MII;
169}
170
171static void mcf5329_fec_initialize_hardware(struct mcf5329_enet_struct *sc)
172{
173  int i;
174  const unsigned char *hwaddr = 0;
175  rtems_status_code status;
176  rtems_isr_entry old_handler;
177  uint32_t clock_speed = bsp_get_BUS_clock_speed();
178
179  /*
180   * Issue reset to FEC
181   */
182  MCF_FEC_ECR = MCF_FEC_ECR_RESET;
183  rtems_task_wake_after(1);
184  MCF_FEC_ECR = 0;
185
186  /*
187   * Configuration of I/O ports is done outside of this function
188   */
189#if 0
190  imm->gpio.pbcnt |= MCF_GPIO_PBCNT_SET_FEC;      /* Set up port b FEC pins */
191#endif
192
193  /*
194   * Set our physical address
195   */
196  hwaddr = sc->arpcom.ac_enaddr;
197  MCF_FEC_PALR = (hwaddr[0] << 24) | (hwaddr[1] << 16) |
198    (hwaddr[2] << 8) | (hwaddr[3] << 0);
199  MCF_FEC_PAUR = (hwaddr[4] << 24) | (hwaddr[5] << 16);
200
201  /*
202   * Clear the hash table
203   */
204  MCF_FEC_GAUR = 0;
205  MCF_FEC_GALR = 0;
206
207  /*
208   * Set up receive buffer size
209   */
210  MCF_FEC_EMRBR = 1520;                           /* Standard Ethernet */
211
212  /*
213   * Allocate mbuf pointers
214   */
215  sc->rxMbuf = malloc(sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT);
216  sc->txMbuf = malloc(sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT);
217  if (!sc->rxMbuf || !sc->txMbuf)
218    rtems_panic("No memory for mbuf pointers");
219
220  /*
221   * Set receiver and transmitter buffer descriptor bases
222   */
223  sc->rxBdBase = mcf5329_bd_allocate(sc->rxBdCount);
224  sc->txBdBase = mcf5329_bd_allocate(sc->txBdCount);
225  MCF_FEC_ERDSR = (int) sc->rxBdBase;
226  MCF_FEC_ETDSR = (int) sc->txBdBase;
227
228  /*
229   * Set up Receive Control Register:
230   *   Not promiscuous
231   *   MII mode
232   *   Full duplex
233   *   No loopback
234   */
235  MCF_FEC_RCR = MCF_FEC_RCR_MAX_FL(MAX_MTU_SIZE) | MCF_FEC_RCR_MII_MODE;
236
237  /*
238   * Set up Transmit Control Register:
239   *   Full duplex
240   *   No heartbeat
241   */
242  MCF_FEC_TCR = MCF_FEC_TCR_FDEN;
243
244  /*
245   * Initialize statistic counters
246   */
247  MCF_FEC_MIBC = MCF_FEC_MIBC_MIB_DISABLE;
248  {
249    vuint32 *vuip = &MCF_FEC_RMON_T_DROP;
250
251    while (vuip <= &MCF_FEC_IEEE_R_OCTETS_OK)
252      *vuip++ = 0;
253  }
254  MCF_FEC_MIBC = 0;
255
256  /*
257   * Set MII speed to <= 2.5 MHz
258   */
259  i = (clock_speed + 5000000 - 1) / 5000000;
260  MCF_FEC_MSCR = MCF_FEC_MSCR_MII_SPEED(i);
261
262  /*
263   * Set PHYS to 100 Mb/s, full duplex
264   */
265  setMII(1, 0, 0x2100);
266
267  /*
268   * Set up receive buffer descriptors
269   */
270  for (i = 0; i < sc->rxBdCount; i++)
271    (sc->rxBdBase + i)->status = 0;
272
273  /*
274   * Set up transmit buffer descriptors
275   */
276  for (i = 0; i < sc->txBdCount; i++) {
277    sc->txBdBase[i].status = 0;
278    sc->txMbuf[i] = NULL;
279  }
280  sc->txBdHead = sc->txBdTail = 0;
281  sc->txBdActiveCount = 0;
282
283  /*
284   * Set up interrupts
285   */
286  status =
287    rtems_interrupt_catch(mcf5329_fec_tx_interrupt_handler,
288                          FEC_INTC0_TX_VECTOR, &old_handler);
289  if (status != RTEMS_SUCCESSFUL)
290    rtems_panic("Can't attach MCF FEC TX interrupt handler: %s\n",
291                rtems_status_text(status));
292  status =
293    rtems_interrupt_catch(mcf5329_fec_rx_interrupt_handler,
294                          FEC_INTC0_RX_VECTOR, &old_handler);
295  if (status != RTEMS_SUCCESSFUL)
296    rtems_panic("Can't attach MCF FEC RX interrupt handler: %s\n",
297                rtems_status_text(status));
298  MCF_INTC0_ICR36 = MCF_INTC_ICR_IL(FEC_IRQ_LEVEL);
299  MCF_INTC0_IMRH &= ~(MCF_INTC_IMRH_INT_MASK36);
300  MCF_INTC0_ICR40 = MCF_INTC_ICR_IL(FEC_IRQ_LEVEL);
301  MCF_INTC0_IMRH &= ~(MCF_INTC_IMRH_INT_MASK40);
302}
303
304/*
305 * Get the MAC address from the hardware.
306 */
307static void
308fec_get_mac_address(volatile struct mcf5329_enet_struct *sc,
309                    unsigned char *hwaddr)
310{
311  unsigned long addr;
312
313  addr = MCF_FEC_PALR;
314
315  hwaddr[0] = (addr >> 24) & 0xff;
316  hwaddr[1] = (addr >> 16) & 0xff;
317  hwaddr[2] = (addr >> 8) & 0xff;
318  hwaddr[3] = (addr >> 0) & 0xff;
319
320  addr = MCF_FEC_PAUR;
321
322  hwaddr[4] = (addr >> 24) & 0xff;
323  hwaddr[5] = (addr >> 16) & 0xff;
324}
325
326/*
327 * Soak up buffer descriptors that have been sent.
328 */
329static void fec_retire_tx_bd(volatile struct mcf5329_enet_struct *sc)
330{
331  struct mbuf *m, *n;
332
333  while ((sc->txBdActiveCount != 0)
334         && ((sc->txBdBase[sc->txBdTail].status & MCF_FEC_TxBD_R) == 0)) {
335    m = sc->txMbuf[sc->txBdTail];
336    MFREE(m, n);
337    if (++sc->txBdTail == sc->txBdCount)
338      sc->txBdTail = 0;
339    sc->txBdActiveCount--;
340  }
341}
342
343static void fec_rxDaemon(void *arg)
344{
345  volatile struct mcf5329_enet_struct *sc =
346    (volatile struct mcf5329_enet_struct *) arg;
347  struct ifnet *ifp = (struct ifnet *) &sc->arpcom.ac_if;
348  struct mbuf *m;
349  volatile uint16_t status;
350  volatile mcf5329BufferDescriptor_t *rxBd;
351  int rxBdIndex;
352
353  /*
354   * Allocate space for incoming packets and start reception
355   */
356  for (rxBdIndex = 0;;) {
357    rxBd = sc->rxBdBase + rxBdIndex;
358    MGETHDR(m, M_WAIT, MT_DATA);
359    MCLGET(m, M_WAIT);
360    m->m_pkthdr.rcvif = ifp;
361    sc->rxMbuf[rxBdIndex] = m;
362    rxBd->buffer = mtod(m, void *);
363
364    rxBd->status = MCF_FEC_RxBD_E;
365    if (++rxBdIndex == sc->rxBdCount) {
366      rxBd->status |= MCF_FEC_RxBD_W;
367      break;
368    }
369  }
370
371  /*
372   * Input packet handling loop
373   */
374  /* Indicate we have some ready buffers available */
375  MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;
376
377  rxBdIndex = 0;
378  for (;;) {
379    rxBd = sc->rxBdBase + rxBdIndex;
380
381    /*
382     * Wait for packet if there's not one ready
383     */
384    if ((status = rxBd->status) & MCF_FEC_RxBD_E) {
385      /*
386       * Clear old events.
387       */
388      MCF_FEC_EIR = MCF_FEC_EIR_RXF;
389
390      /*
391       * Wait for packet to arrive.
392       * Check the buffer descriptor before waiting for the event.
393       * This catches the case when a packet arrives between the
394       * `if' above, and the clearing of the RXF bit in the EIR.
395       */
396      while ((status = rxBd->status) & MCF_FEC_RxBD_E) {
397        rtems_event_set events;
398        int level;
399
400        rtems_interrupt_disable(level);
401        MCF_FEC_EIMR |= MCF_FEC_EIMR_RXF;
402        rtems_interrupt_enable(level);
403        rtems_bsdnet_event_receive(RX_INTERRUPT_EVENT,
404                                   RTEMS_WAIT | RTEMS_EVENT_ANY,
405                                   RTEMS_NO_TIMEOUT, &events);
406      }
407    }
408
409    /*
410     * Check that packet is valid
411     */
412    if (status & MCF_FEC_RxBD_L) {
413      /*
414       * Pass the packet up the chain.
415       * FIXME: Packet filtering hook could be done here.
416       */
417      struct ether_header *eh;
418      int len = rxBd->length - sizeof(uint32_t);;
419
420      /*
421       * Invalidate the cache and push the packet up.
422       * The cache is so small that it's more efficient to just
423       * invalidate the whole thing unless the packet is very small.
424       */
425      m = sc->rxMbuf[rxBdIndex];
426      if (len < 128)
427        rtems_cache_invalidate_multiple_data_lines(m->m_data, len);
428      else
429        rtems_cache_invalidate_entire_data();
430      m->m_len = m->m_pkthdr.len = len - sizeof(struct ether_header);
431      eh = mtod(m, struct ether_header *);
432      m->m_data += sizeof(struct ether_header);
433      ether_input(ifp, eh, m);
434
435      /*
436       * Allocate a new mbuf
437       */
438      MGETHDR(m, M_WAIT, MT_DATA);
439      MCLGET(m, M_WAIT);
440      m->m_pkthdr.rcvif = ifp;
441      sc->rxMbuf[rxBdIndex] = m;
442      rxBd->buffer = mtod(m, void *);
443    }
444
445    /*
446     * Reenable the buffer descriptor
447     */
448    rxBd->status = (status & MCF_FEC_RxBD_W) | MCF_FEC_RxBD_E;
449    MCF_FEC_RDAR = MCF_FEC_RDAR_R_DES_ACTIVE;
450
451    /*
452     * Move to next buffer descriptor
453     */
454    if (++rxBdIndex == sc->rxBdCount)
455      rxBdIndex = 0;
456  }
457}
458
459static void fec_sendpacket(struct ifnet *ifp, struct mbuf *m)
460{
461  struct mcf5329_enet_struct *sc = ifp->if_softc;
462  volatile mcf5329BufferDescriptor_t *firstTxBd, *txBd;
463  uint16_t status;
464  int nAdded;
465
466  /*
467   * Free up buffer descriptors
468   */
469  fec_retire_tx_bd(sc);
470
471  /*
472   * Set up the transmit buffer descriptors.
473   * No need to pad out short packets since the
474   * hardware takes care of that automatically.
475   * No need to copy the packet to a contiguous buffer
476   * since the hardware is capable of scatter/gather DMA.
477   */
478  nAdded = 0;
479  firstTxBd = sc->txBdBase + sc->txBdHead;
480
481  for (;;) {
482    /*
483     * Wait for buffer descriptor to become available
484     */
485    if ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
486      /*
487       * Clear old events.
488       */
489      MCF_FEC_EIR = MCF_FEC_EIR_TXF;
490
491      /*
492       * Wait for buffer descriptor to become available.
493       * Check for buffer descriptors before waiting for the event.
494       * This catches the case when a buffer became available between
495       * the `if' above, and the clearing of the TXF bit in the EIR.
496       */
497      fec_retire_tx_bd(sc);
498      while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) {
499        rtems_event_set events;
500        int level;
501
502        rtems_interrupt_disable(level);
503        MCF_FEC_EIMR |= MCF_FEC_EIMR_TXF;
504        rtems_interrupt_enable(level);
505        sc->txRawWait++;
506        rtems_bsdnet_event_receive(TX_INTERRUPT_EVENT,
507                                   RTEMS_WAIT | RTEMS_EVENT_ANY,
508                                   RTEMS_NO_TIMEOUT, &events);
509        fec_retire_tx_bd(sc);
510      }
511    }
512
513    /*
514     * Don't set the READY flag on the first fragment
515     * until the whole packet has been readied.
516     */
517    status = nAdded ? MCF_FEC_TxBD_R : 0;
518
519    /*
520     * The IP fragmentation routine in ip_output
521     * can produce fragments with zero length.
522     */
523    txBd = sc->txBdBase + sc->txBdHead;
524    if (m->m_len) {
525      char *p = mtod(m, char *);
526
527      /*
528       * Stupid FEC can't handle misaligned data!
529       * Given the way that mbuf's are layed out it should be
530       * safe to shuffle the data down like this.....
531       * Perhaps this code could be improved with a "Duff's Device".
532       */
533      if ((int) p & 0x3) {
534        int l = m->m_len;
535        char *dest = p - ((int) p & 0x3);
536        uint16_t *o = (uint16_t *) dest, *i = (uint16_t *) p;
537
538        while (l > 0) {
539          *o++ = *i++;
540          l -= sizeof(uint16_t);
541        }
542        p = dest;
543        sc->txRealign++;
544      }
545      txBd->buffer = p;
546      txBd->length = m->m_len;
547      sc->txMbuf[sc->txBdHead] = m;
548      nAdded++;
549      if (++sc->txBdHead == sc->txBdCount) {
550        status |= MCF_FEC_TxBD_W;
551        sc->txBdHead = 0;
552      }
553      m = m->m_next;
554    } else {
555      /*
556       * Just toss empty mbufs
557       */
558      struct mbuf *n;
559
560      MFREE(m, n);
561      m = n;
562    }
563    if (m == NULL) {
564      if (nAdded) {
565        txBd->status = status | MCF_FEC_TxBD_R
566          | MCF_FEC_TxBD_L | MCF_FEC_TxBD_TC;
567        if (nAdded > 1)
568          firstTxBd->status |= MCF_FEC_TxBD_R;
569        MCF_FEC_TDAR = MCF_FEC_TDAR_X_DES_ACTIVE;
570        sc->txBdActiveCount += nAdded;
571      }
572      break;
573    }
574    txBd->status = status;
575  }
576}
577
578void fec_txDaemon(void *arg)
579{
580  struct mcf5329_enet_struct *sc = (struct mcf5329_enet_struct *) arg;
581  struct ifnet *ifp = &sc->arpcom.ac_if;
582  struct mbuf *m;
583  rtems_event_set events;
584
585  for (;;) {
586    /*
587     * Wait for packet
588     */
589    rtems_bsdnet_event_receive(START_TRANSMIT_EVENT,
590                               RTEMS_EVENT_ANY | RTEMS_WAIT,
591                               RTEMS_NO_TIMEOUT, &events);
592
593    /*
594     * Send packets till queue is empty
595     */
596    for (;;) {
597      /*
598       * Get the next mbuf chain to transmit.
599       */
600      IF_DEQUEUE(&ifp->if_snd, m);
601      if (!m)
602        break;
603      fec_sendpacket(ifp, m);
604    }
605    ifp->if_flags &= ~IFF_OACTIVE;
606  }
607}
608
609/*
610 * Send packet (caller provides header).
611 */
612static void mcf5329_enet_start(struct ifnet *ifp)
613{
614  struct mcf5329_enet_struct *sc = ifp->if_softc;
615
616  rtems_event_send(sc->txDaemonTid, START_TRANSMIT_EVENT);
617  ifp->if_flags |= IFF_OACTIVE;
618}
619
620static void fec_init(void *arg)
621{
622  struct mcf5329_enet_struct *sc = arg;
623  struct ifnet *ifp = &sc->arpcom.ac_if;
624
625  if (sc->txDaemonTid == 0) {
626    /*
627     * Set up hardware
628     */
629    mcf5329_fec_initialize_hardware(sc);
630
631    /*
632     * Start driver tasks
633     */
634    sc->txDaemonTid = rtems_bsdnet_newproc("FECtx", 4096, fec_txDaemon, sc);
635    sc->rxDaemonTid = rtems_bsdnet_newproc("FECrx", 4096, fec_rxDaemon, sc);
636  }
637
638  /*
639   * Set flags appropriately
640   */
641  if (ifp->if_flags & IFF_PROMISC)
642    MCF_FEC_RCR |= MCF_FEC_RCR_PROM;
643  else
644    MCF_FEC_RCR &= ~MCF_FEC_RCR_PROM;
645
646  /*
647   * Tell the world that we're running.
648   */
649  ifp->if_flags |= IFF_RUNNING;
650
651  /*
652   * Enable receiver and transmitter
653   */
654  MCF_FEC_ECR = MCF_FEC_ECR_ETHER_EN;
655}
656
657static void fec_stop(struct mcf5329_enet_struct *sc)
658{
659  struct ifnet *ifp = &sc->arpcom.ac_if;
660
661  ifp->if_flags &= ~IFF_RUNNING;
662
663  /*
664   * Shut down receiver and transmitter
665   */
666  MCF_FEC_ECR = 0x0;
667}
668
669/*
670 * Show interface statistics
671 */
672static void enet_stats(struct mcf5329_enet_struct *sc)
673{
674  printf("  Rx Interrupts:%-10lu", sc->rxInterrupts);
675  printf("Rx Packet Count:%-10lu", MCF_FEC_RMON_R_PACKETS);
676  printf("   Rx Broadcast:%-10lu\n", MCF_FEC_RMON_R_BC_PKT);
677  printf("   Rx Multicast:%-10lu", MCF_FEC_RMON_R_MC_PKT);
678  printf("CRC/Align error:%-10lu", MCF_FEC_RMON_R_CRC_ALIGN);
679  printf("   Rx Undersize:%-10lu\n", MCF_FEC_RMON_R_UNDERSIZE);
680  printf("    Rx Oversize:%-10lu", MCF_FEC_RMON_R_OVERSIZE);
681  printf("    Rx Fragment:%-10lu", MCF_FEC_RMON_R_FRAG);
682  printf("      Rx Jabber:%-10lu\n", MCF_FEC_RMON_R_JAB);
683  printf("          Rx 64:%-10lu", MCF_FEC_RMON_R_P64);
684  printf("      Rx 65-127:%-10lu", MCF_FEC_RMON_R_P65TO127);
685  printf("     Rx 128-255:%-10lu\n", MCF_FEC_RMON_R_P128TO255);
686  printf("     Rx 256-511:%-10lu", MCF_FEC_RMON_R_P256TO511);
687  printf("    Rx 511-1023:%-10lu", MCF_FEC_RMON_R_512TO1023);
688  printf("   Rx 1024-2047:%-10lu\n", MCF_FEC_RMON_R_1024TO2047);
689  printf("      Rx >=2048:%-10lu", MCF_FEC_RMON_R_P_GTE2048);
690  printf("      Rx Octets:%-10lu", MCF_FEC_RMON_R_OCTETS);
691  printf("     Rx Dropped:%-10lu\n", MCF_FEC_IEEE_R_DROP);
692  printf("    Rx frame OK:%-10lu", MCF_FEC_IEEE_R_FRAME_OK);
693  printf("   Rx CRC error:%-10lu", MCF_FEC_IEEE_R_CRC);
694  printf(" Rx Align error:%-10lu\n", MCF_FEC_IEEE_R_ALIGN);
695  printf("  FIFO Overflow:%-10lu", MCF_FEC_IEEE_R_MACERR);
696  printf("Rx Pause Frames:%-10lu", MCF_FEC_IEEE_R_FDXFC);
697  printf("   Rx Octets OK:%-10lu\n", MCF_FEC_IEEE_R_OCTETS_OK);
698  printf("  Tx Interrupts:%-10lu", sc->txInterrupts);
699  printf("Tx Output Waits:%-10lu", sc->txRawWait);
700  printf("Tx Realignments:%-10lu\n", sc->txRealign);
701  printf(" Tx Unaccounted:%-10lu", MCF_FEC_RMON_T_DROP);
702  printf("Tx Packet Count:%-10lu", MCF_FEC_RMON_T_PACKETS);
703  printf("   Tx Broadcast:%-10lu\n", MCF_FEC_RMON_T_BC_PKT);
704  printf("   Tx Multicast:%-10lu", MCF_FEC_RMON_T_MC_PKT);
705  printf("CRC/Align error:%-10lu", MCF_FEC_RMON_T_CRC_ALIGN);
706  printf("   Tx Undersize:%-10lu\n", MCF_FEC_RMON_T_UNDERSIZE);
707  printf("    Tx Oversize:%-10lu", MCF_FEC_RMON_T_OVERSIZE);
708  printf("    Tx Fragment:%-10lu", MCF_FEC_RMON_T_FRAG);
709  printf("      Tx Jabber:%-10lu\n", MCF_FEC_RMON_T_JAB);
710  printf("  Tx Collisions:%-10lu", MCF_FEC_RMON_T_COL);
711  printf("          Tx 64:%-10lu", MCF_FEC_RMON_T_P64);
712  printf("      Tx 65-127:%-10lu\n", MCF_FEC_RMON_T_P65TO127);
713  printf("     Tx 128-255:%-10lu", MCF_FEC_RMON_T_P128TO255);
714  printf("     Tx 256-511:%-10lu", MCF_FEC_RMON_T_P256TO511);
715  printf("    Tx 511-1023:%-10lu\n", MCF_FEC_RMON_T_P512TO1023);
716  printf("   Tx 1024-2047:%-10lu", MCF_FEC_RMON_T_P1024TO2047);
717  printf("      Tx >=2048:%-10lu", MCF_FEC_RMON_T_P_GTE2048);
718  printf("      Tx Octets:%-10lu\n", MCF_FEC_RMON_T_OCTETS);
719  printf("     Tx Dropped:%-10lu", MCF_FEC_IEEE_T_DROP);
720  printf("    Tx Frame OK:%-10lu", MCF_FEC_IEEE_T_FRAME_OK);
721  printf(" Tx 1 Collision:%-10lu\n", MCF_FEC_IEEE_T_1COL);
722  printf("Tx >1 Collision:%-10lu", MCF_FEC_IEEE_T_MCOL);
723  printf("    Tx Deferred:%-10lu", MCF_FEC_IEEE_T_DEF);
724  printf(" Late Collision:%-10lu\n", MCF_FEC_IEEE_T_LCOL);
725  printf(" Excessive Coll:%-10lu", MCF_FEC_IEEE_T_EXCOL);
726  printf("  FIFO Underrun:%-10lu", MCF_FEC_IEEE_T_MACERR);
727  printf("  Carrier Error:%-10lu\n", MCF_FEC_IEEE_T_CSERR);
728  printf("   Tx SQE Error:%-10lu", MCF_FEC_IEEE_T_SQE);
729  printf("Tx Pause Frames:%-10lu", MCF_FEC_IEEE_T_FDXFC);
730  printf("   Tx Octets OK:%-10lu\n", MCF_FEC_IEEE_T_OCTETS_OK);
731}
732
733static int fec_ioctl(struct ifnet *ifp, ioctl_command_t command, caddr_t data)
734{
735  struct mcf5329_enet_struct *sc = ifp->if_softc;
736  int error = 0;
737
738  switch (command) {
739    case SIOCGIFADDR:
740    case SIOCSIFADDR:
741      ether_ioctl(ifp, command, data);
742      break;
743
744    case SIOCSIFFLAGS:
745      switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) {
746        case IFF_RUNNING:
747          fec_stop(sc);
748          break;
749
750        case IFF_UP:
751          fec_init(sc);
752          break;
753
754        case IFF_UP | IFF_RUNNING:
755          fec_stop(sc);
756          fec_init(sc);
757          break;
758
759        default:
760          break;
761      }
762      break;
763
764    case SIO_RTEMS_SHOW_STATS:
765      enet_stats(sc);
766      break;
767
768      /*
769       * FIXME: All sorts of multicast commands need to be added here!
770       */
771    default:
772      error = EINVAL;
773      break;
774  }
775  return error;
776}
777
778int
779rtems_fec_driver_attach(struct rtems_bsdnet_ifconfig *config, int attaching)
780{
781  struct mcf5329_enet_struct *sc;
782  struct ifnet *ifp;
783  int mtu;
784  int unitNumber;
785  char *unitName;
786  unsigned char *hwaddr;
787
788  /*
789   * Parse driver name
790   */
791  if ((unitNumber = rtems_bsdnet_parse_driver_name(config, &unitName)) < 0)
792    return 0;
793
794  /*
795   * Is driver free?
796   */
797  if ((unitNumber < 0) || (unitNumber >= NIFACES)) {
798    printf("mcf5329: bad FEC unit number.\n");
799    return 0;
800  }
801  sc = &enet_driver[unitNumber];
802  ifp = &sc->arpcom.ac_if;
803  if (ifp->if_softc != NULL) {
804    printf("mcf5329: driver already in use.\n");
805    return 0;
806  }
807
808  /*
809   * Process options
810   */
811  if (config->hardware_address)
812    memcpy(sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
813  else
814    fec_get_mac_address(sc, sc->arpcom.ac_enaddr);
815
816  hwaddr = config->hardware_address;
817  printf("%s%d: mac: %02x:%02x:%02x:%02x:%02x:%02x\n",
818         unitName, unitNumber,
819         hwaddr[0], hwaddr[1], hwaddr[2], hwaddr[3], hwaddr[4], hwaddr[5]);
820
821  if (config->mtu)
822    mtu = config->mtu;
823  else
824    mtu = ETHERMTU;
825  if (config->rbuf_count)
826    sc->rxBdCount = config->rbuf_count;
827  else
828    sc->rxBdCount = RX_BUF_COUNT;
829  if (config->xbuf_count)
830    sc->txBdCount = config->xbuf_count;
831  else
832    sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF;
833
834  sc->acceptBroadcast = !config->ignore_broadcast;
835
836  /*
837   * Set up network interface values
838   */
839  ifp->if_softc = sc;
840  ifp->if_unit = unitNumber;
841  ifp->if_name = unitName;
842  ifp->if_mtu = mtu;
843  ifp->if_init = fec_init;
844  ifp->if_ioctl = fec_ioctl;
845  ifp->if_start = mcf5329_enet_start;
846  ifp->if_output = ether_output;
847  ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX;
848  if (ifp->if_snd.ifq_maxlen == 0)
849    ifp->if_snd.ifq_maxlen = ifqmaxlen;
850
851  /*
852   * Attach the interface
853   */
854  if_attach(ifp);
855  ether_ifattach(ifp);
856  return 1;
857};
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