source: rtems/c/src/lib/libbsp/m68k/mcf5329/clock/clock.c @ 6b56ec3

4.104.114.9
Last change on this file since 6b56ec3 was 6b56ec3, checked in by Joel Sherrill <joel.sherrill@…>, on Jun 20, 2008 at 2:58:34 PM

2008-06-20 Matthew Riek <matthew.riek@…>

  • ChangeLog?, Makefile.am, README, bsp_specs, configure.ac, gdb-init, preinstall.am, clock/clock.c, console/console.c, include/bsp.h, include/bspopts.h.in, include/coverhd.h, include/tm27.h, network/network.c, start/start.S, startup/bspclean.c, startup/bspstart.c, startup/cfinit.c, startup/init5329.c, startup/linkcmds, startup/linkcmdsflash, timer/timer.c: New files.
  • Property mode set to 100644
File size: 2.3 KB
Line 
1
2/*
3 * Use the last periodic interval timer (PIT2) as the system clock.
4 *
5 *  $Id$
6 */
7
8#include <rtems.h>
9#include <bsp.h>
10
11/*
12 * Use INTC1 base
13 */
14#define CLOCK_VECTOR (128+46)
15
16static uint32_t s_pcntrAtTick = 0;
17static uint32_t s_nanoScale = 0;
18
19/*
20 * Provide nanosecond extension
21 */
22static uint32_t bsp_clock_nanoseconds_since_last_tick(void)
23{
24  uint32_t i;
25
26  if (MCF_PIT3_PCSR & MCF_PIT_PCSR_PIF) {
27    i = s_pcntrAtTick + (MCF_PIT3_PMR - MCF_PIT3_PCNTR);
28  } else {
29    i = s_pcntrAtTick - MCF_PIT3_PCNTR;
30  }
31  return i * s_nanoScale;
32}
33
34#define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick
35
36/*
37 * Periodic interval timer interrupt handler
38 */
39#define Clock_driver_support_at_tick()             \
40    do {                                           \
41        s_pcntrAtTick = MCF_PIT3_PCNTR;            \
42        MCF_PIT3_PCSR |= MCF_PIT_PCSR_PIF;         \
43    } while (0)                                    \
44
45
46/*
47 * Attach clock interrupt handler
48 */
49#define Clock_driver_support_install_isr( _new, _old )             \
50    do {                                                           \
51        _old = (rtems_isr_entry)set_vector(_new, CLOCK_VECTOR, 1); \
52    } while(0)
53
54/*
55 * Turn off the clock
56 */
57static void Clock_driver_support_shutdown_hardware()
58{
59  MCF_PIT3_PCSR &= ~MCF_PIT_PCSR_EN;
60}
61
62/*
63 * Set up the clock hardware
64 *
65 * We need to have 1 interrupt every BSP_Configuration.microseconds_per_tick
66 */
67static void Clock_driver_support_initialize_hardware()
68{
69  int level;
70  uint32_t pmr;
71  uint32_t preScaleCode = 0;
72  uint32_t clk = bsp_get_BUS_clock_speed();
73  uint32_t tps = 1000000 / Configuration.microseconds_per_tick;
74
75  while (preScaleCode < 15) {
76    pmr = (clk >> preScaleCode) / tps;
77    if (pmr < (1 << 15))
78      break;
79    preScaleCode++;
80  }
81  s_nanoScale = 1000000000 / (clk >> preScaleCode);
82
83  MCF_INTC1_ICR46 = MCF_INTC_ICR_IL(PIT3_IRQ_LEVEL);
84 
85  rtems_interrupt_disable(level);
86  MCF_INTC1_IMRH &= ~MCF_INTC_IMRH_INT_MASK46;
87  MCF_PIT3_PCSR &= ~MCF_PIT_PCSR_EN;
88  rtems_interrupt_enable(level);
89
90  MCF_PIT3_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
91    MCF_PIT_PCSR_OVW | MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD;
92  MCF_PIT3_PMR = pmr;
93  MCF_PIT3_PCSR = MCF_PIT_PCSR_PRE(preScaleCode) |
94    MCF_PIT_PCSR_PIE | MCF_PIT_PCSR_RLD | MCF_PIT_PCSR_EN;
95  s_pcntrAtTick = MCF_PIT3_PCNTR;
96}
97
98#include "../../../shared/clockdrv_shell.c"
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